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@ -287,8 +287,6 @@ |
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GENERATED_GBL_DATA_SIZE) |
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GENERATED_GBL_DATA_SIZE) |
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/* Enable the PL to be downloaded */ |
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/* Enable the PL to be downloaded */ |
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#define CONFIG_FPGA |
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#define CONFIG_FPGA_XILINX |
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#define CONFIG_FPGA_ZYNQPL |
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#define CONFIG_FPGA_ZYNQPL |
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/* FIT support */ |
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/* FIT support */ |
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@ -319,7 +317,6 @@ |
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/* Disable dcache for SPL just for sure */ |
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/* Disable dcache for SPL just for sure */ |
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#ifdef CONFIG_SPL_BUILD |
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#ifdef CONFIG_SPL_BUILD |
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#define CONFIG_SYS_DCACHE_OFF |
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#define CONFIG_SYS_DCACHE_OFF |
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#undef CONFIG_FPGA |
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#endif |
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#endif |
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/* Address in RAM where the parameters must be copied by SPL. */ |
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/* Address in RAM where the parameters must be copied by SPL. */ |
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