commit
8155efbd7a
@ -1,57 +0,0 @@ |
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/* |
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* (C) Copyright 2002 |
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
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/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ |
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OUTPUT_ARCH(arm) |
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ENTRY(_start) |
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SECTIONS |
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{ |
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. = 0x00000000; |
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|
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. = ALIGN(4); |
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.text : |
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{ |
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cpu/arm926ejs/start.o (.text) |
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*(.text) |
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} |
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|
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. = ALIGN(4); |
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.rodata : { *(.rodata) } |
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|
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. = ALIGN(4); |
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.data : { *(.data) } |
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|
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. = ALIGN(4); |
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.got : { *(.got) } |
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|
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. = .; |
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__u_boot_cmd_start = .; |
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.u_boot_cmd : { *(.u_boot_cmd) } |
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__u_boot_cmd_end = .; |
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|
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. = ALIGN(4); |
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__bss_start = .; |
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.bss : { *(.bss) } |
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_end = .; |
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} |
@ -0,0 +1,57 @@ |
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#
|
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# (C) Copyright 2003-2008
|
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
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#
|
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# (C) Copyright 2008
|
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# Stelian Pop <stelian.pop@leadtechdesign.com>
|
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# Lead Tech Design <www.leadtechdesign.com>
|
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#
|
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# See file CREDITS for list of people who contributed to this
|
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# project.
|
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#
|
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
|
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#
|
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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# MA 02111-1307 USA
|
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#
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|
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include $(TOPDIR)/config.mk |
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|
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LIB = $(obj)lib$(BOARD).a
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|
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COBJS-y += at91sam9261ek.o
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COBJS-y += led.o
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COBJS-y += partition.o
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COBJS-$(CONFIG_CMD_NAND) += nand.o
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|
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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|
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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|
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clean: |
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rm -f $(SOBJS) $(OBJS)
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|
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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|
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#########################################################################
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|
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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|
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sinclude $(obj).depend |
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|
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#########################################################################
|
@ -0,0 +1,258 @@ |
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/*
|
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* (C) Copyright 2007-2008 |
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* Stelian Pop <stelian.pop@leadtechdesign.com> |
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* Lead Tech Design <www.leadtechdesign.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
||||
* project. |
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* |
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* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
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* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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#include <common.h> |
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#include <asm/arch/at91sam9261.h> |
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#include <asm/arch/at91sam9261_matrix.h> |
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#include <asm/arch/at91sam9_smc.h> |
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#include <asm/arch/at91_pmc.h> |
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#include <asm/arch/at91_rstc.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/arch/io.h> |
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#include <lcd.h> |
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#include <atmel_lcdc.h> |
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#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) |
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#include <net.h> |
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#endif |
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|
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DECLARE_GLOBAL_DATA_PTR; |
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|
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/* ------------------------------------------------------------------------- */ |
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/*
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* Miscelaneous platform dependent initialisations |
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*/ |
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|
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static void at91sam9261ek_serial_hw_init(void) |
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{ |
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#ifdef CONFIG_USART0 |
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at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ |
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at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); |
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#endif |
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|
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#ifdef CONFIG_USART1 |
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at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ |
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at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); |
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#endif |
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|
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#ifdef CONFIG_USART2 |
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at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ |
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at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); |
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#endif |
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|
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#ifdef CONFIG_USART3 /* DBGU */ |
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at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ |
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at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); |
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#endif |
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} |
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|
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#ifdef CONFIG_CMD_NAND |
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static void at91sam9261ek_nand_hw_init(void) |
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{ |
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unsigned long csa; |
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|
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/* Enable CS3 */ |
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csa = at91_sys_read(AT91_MATRIX_EBICSA); |
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at91_sys_write(AT91_MATRIX_EBICSA, |
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csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
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|
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/* Configure SMC CS3 for NAND/SmartMedia */ |
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at91_sys_write(AT91_SMC_SETUP(3), |
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AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | |
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AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); |
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at91_sys_write(AT91_SMC_PULSE(3), |
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AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) | |
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AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); |
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at91_sys_write(AT91_SMC_CYCLE(3), |
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AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); |
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at91_sys_write(AT91_SMC_MODE(3), |
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AT91_SMC_READMODE | AT91_SMC_WRITEMODE | |
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AT91_SMC_EXNWMODE_DISABLE | |
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#ifdef CFG_NAND_DBW_16 |
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AT91_SMC_DBW_16 | |
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#else /* CFG_NAND_DBW_8 */ |
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AT91_SMC_DBW_8 | |
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#endif |
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AT91_SMC_TDF_(1)); |
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|
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); |
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|
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/* Configure RDY/BSY */ |
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at91_set_gpio_input(AT91_PIN_PC15, 1); |
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|
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/* Enable NandFlash */ |
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at91_set_gpio_output(AT91_PIN_PC14, 1); |
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|
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at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ |
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at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ |
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} |
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#endif |
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|
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#ifdef CONFIG_HAS_DATAFLASH |
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static void at91sam9261ek_spi_hw_init(void) |
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{ |
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at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ |
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|
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at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ |
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at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ |
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at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ |
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|
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/* Enable clock */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0); |
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} |
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#endif |
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|
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#ifdef CONFIG_DRIVER_DM9000 |
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static void at91sam9261ek_dm9000_hw_init(void) |
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{ |
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/* Configure SMC CS2 for DM9000 */ |
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at91_sys_write(AT91_SMC_SETUP(2), |
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AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | |
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AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); |
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at91_sys_write(AT91_SMC_PULSE(2), |
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AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | |
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AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); |
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at91_sys_write(AT91_SMC_CYCLE(2), |
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AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); |
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at91_sys_write(AT91_SMC_MODE(2), |
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AT91_SMC_READMODE | AT91_SMC_WRITEMODE | |
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AT91_SMC_EXNWMODE_DISABLE | |
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AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | |
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AT91_SMC_TDF_(1)); |
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|
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/* Configure Reset signal as output */ |
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at91_set_gpio_output(AT91_PIN_PC10, 0); |
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|
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/* Configure Interrupt pin as input, no pull-up */ |
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at91_set_gpio_input(AT91_PIN_PC11, 0); |
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} |
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#endif |
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|
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#ifdef CONFIG_LCD |
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vidinfo_t panel_info = { |
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vl_col: 240, |
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vl_row: 320, |
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vl_clk: 4965000, |
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vl_sync: ATMEL_LCDC_INVLINE_INVERTED | |
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ATMEL_LCDC_INVFRAME_INVERTED, |
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vl_bpix: 3, |
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vl_tft: 1, |
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vl_hsync_len: 5, |
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vl_left_margin: 1, |
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vl_right_margin:33, |
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vl_vsync_len: 1, |
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vl_upper_margin:1, |
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vl_lower_margin:0, |
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mmio: AT91SAM9261_LCDC_BASE, |
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}; |
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|
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void lcd_enable(void) |
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{ |
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at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */ |
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} |
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|
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void lcd_disable(void) |
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{ |
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at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */ |
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} |
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|
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static void at91sam9261ek_lcd_hw_init(void) |
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{ |
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at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ |
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at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ |
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at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ |
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at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ |
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at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ |
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at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ |
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at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */ |
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at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */ |
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at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */ |
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at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */ |
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at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */ |
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at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */ |
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at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */ |
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at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */ |
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at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */ |
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at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */ |
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at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */ |
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at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */ |
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at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */ |
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at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ |
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at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ |
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at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ |
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|
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at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); |
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|
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gd->fb_base = AT91SAM9261_SRAM_BASE; |
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} |
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#endif |
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|
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int board_init(void) |
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{ |
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/* Enable Ctrlc */ |
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console_init_f(); |
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|
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/* arch number of AT91SAM9261EK-Board */ |
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gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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|
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at91sam9261ek_serial_hw_init(); |
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#ifdef CONFIG_CMD_NAND |
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at91sam9261ek_nand_hw_init(); |
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#endif |
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#ifdef CONFIG_HAS_DATAFLASH |
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at91sam9261ek_spi_hw_init(); |
||||
#endif |
||||
#ifdef CONFIG_DRIVER_DM9000 |
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at91sam9261ek_dm9000_hw_init(); |
||||
#endif |
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#ifdef CONFIG_LCD |
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at91sam9261ek_lcd_hw_init(); |
||||
#endif |
||||
return 0; |
||||
} |
||||
|
||||
int dram_init(void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM; |
||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; |
||||
return 0; |
||||
} |
||||
|
||||
#ifdef CONFIG_RESET_PHY_R |
||||
void reset_phy(void) |
||||
{ |
||||
#ifdef CONFIG_DRIVER_DM9000 |
||||
/*
|
||||
* Initialize ethernet HW addr prior to starting Linux, |
||||
* needed for nfsroot |
||||
*/ |
||||
eth_init(gd->bd); |
||||
#endif |
||||
} |
||||
#endif |
@ -0,0 +1 @@ |
||||
TEXT_BASE = 0x23f00000
|
@ -0,0 +1,78 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/at91sam9261.h> |
||||
#include <asm/arch/at91_pmc.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/io.h> |
||||
|
||||
#define RED_LED AT91_PIN_PA23 /* this is the power led */ |
||||
#define GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ |
||||
#define YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ |
||||
|
||||
void red_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(RED_LED, 1); |
||||
} |
||||
|
||||
void red_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(RED_LED, 0); |
||||
} |
||||
|
||||
void green_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(GREEN_LED, 0); |
||||
} |
||||
|
||||
void green_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(GREEN_LED, 1); |
||||
} |
||||
|
||||
void yellow_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(YELLOW_LED, 0); |
||||
} |
||||
|
||||
void yellow_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(YELLOW_LED, 1); |
||||
} |
||||
|
||||
|
||||
void coloured_LED_init(void) |
||||
{ |
||||
/* Enable clock */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA); |
||||
|
||||
at91_set_gpio_output(RED_LED, 1); |
||||
at91_set_gpio_output(GREEN_LED, 1); |
||||
at91_set_gpio_output(YELLOW_LED, 1); |
||||
|
||||
at91_set_gpio_value(RED_LED, 0); |
||||
at91_set_gpio_value(GREEN_LED, 1); |
||||
at91_set_gpio_value(YELLOW_LED, 1); |
||||
} |
@ -0,0 +1,79 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/at91sam9261.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/at91_pio.h> |
||||
|
||||
#include <nand.h> |
||||
|
||||
/*
|
||||
* hardware specific access to control-lines |
||||
*/ |
||||
#define MASK_ALE (1 << 22) /* our ALE is AD22 */ |
||||
#define MASK_CLE (1 << 21) /* our CLE is AD21 */ |
||||
|
||||
static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) |
||||
{ |
||||
struct nand_chip *this = mtd->priv; |
||||
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; |
||||
|
||||
IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); |
||||
switch (cmd) { |
||||
case NAND_CTL_SETCLE: |
||||
IO_ADDR_W |= MASK_CLE; |
||||
break; |
||||
case NAND_CTL_SETALE: |
||||
IO_ADDR_W |= MASK_ALE; |
||||
break; |
||||
case NAND_CTL_CLRNCE: |
||||
at91_set_gpio_value(AT91_PIN_PC14, 1); |
||||
break; |
||||
case NAND_CTL_SETNCE: |
||||
at91_set_gpio_value(AT91_PIN_PC14, 0); |
||||
break; |
||||
} |
||||
this->IO_ADDR_W = (void *) IO_ADDR_W; |
||||
} |
||||
|
||||
static int at91sam9261ek_nand_ready(struct mtd_info *mtd) |
||||
{ |
||||
return at91_get_gpio_value(AT91_PIN_PC15); |
||||
} |
||||
|
||||
int board_nand_init(struct nand_chip *nand) |
||||
{ |
||||
nand->eccmode = NAND_ECC_SOFT; |
||||
#ifdef CFG_NAND_DBW_16 |
||||
nand->options = NAND_BUSWIDTH_16; |
||||
#endif |
||||
nand->hwcontrol = at91sam9261ek_nand_hwcontrol; |
||||
nand->dev_ready = at91sam9261ek_nand_ready; |
||||
nand->chip_delay = 20; |
||||
|
||||
return 0; |
||||
} |
@ -0,0 +1,40 @@ |
||||
/*
|
||||
* (C) Copyright 2008 |
||||
* Ulf Samuelsson <ulf@atmel.com> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
*/ |
||||
#include <common.h> |
||||
#include <config.h> |
||||
#include <asm/hardware.h> |
||||
#include <dataflash.h> |
||||
|
||||
AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; |
||||
|
||||
struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { |
||||
{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ |
||||
{CFG_DATAFLASH_LOGIC_ADDR_CS3, 3} |
||||
}; |
||||
|
||||
/*define the area offsets*/ |
||||
dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { |
||||
{0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, |
||||
{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, |
||||
{0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, |
||||
{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, |
||||
{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, |
||||
}; |
@ -0,0 +1,57 @@ |
||||
#
|
||||
# (C) Copyright 2003-2008
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008
|
||||
# Stelian Pop <stelian.pop@leadtechdesign.com>
|
||||
# Lead Tech Design <www.leadtechdesign.com>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS-y += at91sam9263ek.o
|
||||
COBJS-y += led.o
|
||||
COBJS-y += partition.o
|
||||
COBJS-$(CONFIG_CMD_NAND) += nand.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
||||
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
||||
|
||||
clean: |
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean |
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
@ -0,0 +1,305 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/sizes.h> |
||||
#include <asm/arch/at91sam9263.h> |
||||
#include <asm/arch/at91sam9263_matrix.h> |
||||
#include <asm/arch/at91sam9_smc.h> |
||||
#include <asm/arch/at91_pmc.h> |
||||
#include <asm/arch/at91_rstc.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/io.h> |
||||
#include <lcd.h> |
||||
#include <atmel_lcdc.h> |
||||
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) |
||||
#include <net.h> |
||||
#endif |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
/*
|
||||
* Miscelaneous platform dependent initialisations |
||||
*/ |
||||
|
||||
static void at91sam9263ek_serial_hw_init(void) |
||||
{ |
||||
#ifdef CONFIG_USART0 |
||||
at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ |
||||
at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_USART1 |
||||
at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ |
||||
at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_USART2 |
||||
at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ |
||||
at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_USART3 /* DBGU */ |
||||
at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ |
||||
at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); |
||||
#endif |
||||
} |
||||
|
||||
#ifdef CONFIG_CMD_NAND |
||||
static void at91sam9263ek_nand_hw_init(void) |
||||
{ |
||||
unsigned long csa; |
||||
|
||||
/* Enable CS3 */ |
||||
csa = at91_sys_read(AT91_MATRIX_EBI0CSA); |
||||
at91_sys_write(AT91_MATRIX_EBI0CSA, |
||||
csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); |
||||
|
||||
/* Configure SMC CS3 for NAND/SmartMedia */ |
||||
at91_sys_write(AT91_SMC_SETUP(3), |
||||
AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | |
||||
AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); |
||||
at91_sys_write(AT91_SMC_PULSE(3), |
||||
AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | |
||||
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); |
||||
at91_sys_write(AT91_SMC_CYCLE(3), |
||||
AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); |
||||
at91_sys_write(AT91_SMC_MODE(3), |
||||
AT91_SMC_READMODE | AT91_SMC_WRITEMODE | |
||||
AT91_SMC_EXNWMODE_DISABLE | |
||||
#ifdef CFG_NAND_DBW_16 |
||||
AT91_SMC_DBW_16 | |
||||
#else /* CFG_NAND_DBW_8 */ |
||||
AT91_SMC_DBW_8 | |
||||
#endif |
||||
AT91_SMC_TDF_(2)); |
||||
|
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA | |
||||
1 << AT91SAM9263_ID_PIOCDE); |
||||
|
||||
/* Configure RDY/BSY */ |
||||
at91_set_gpio_input(AT91_PIN_PA22, 1); |
||||
|
||||
/* Enable NandFlash */ |
||||
at91_set_gpio_output(AT91_PIN_PD15, 1); |
||||
} |
||||
#endif |
||||
|
||||
#ifdef CONFIG_HAS_DATAFLASH |
||||
static void at91sam9263ek_spi_hw_init(void) |
||||
{ |
||||
at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */ |
||||
|
||||
at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ |
||||
at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ |
||||
at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ |
||||
|
||||
/* Enable clock */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); |
||||
} |
||||
#endif |
||||
|
||||
#ifdef CONFIG_MACB |
||||
static void at91sam9263ek_macb_hw_init(void) |
||||
{ |
||||
/* Enable clock */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); |
||||
|
||||
/*
|
||||
* Disable pull-up on: |
||||
* RXDV (PC25) => PHY normal mode (not Test mode) |
||||
* ERX0 (PE25) => PHY ADDR0 |
||||
* ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0 |
||||
* |
||||
* PHY has internal pull-down |
||||
*/ |
||||
writel(pin_to_mask(AT91_PIN_PC25), |
||||
pin_to_controller(AT91_PIN_PC0) + PIO_PUDR); |
||||
writel(pin_to_mask(AT91_PIN_PE25) | |
||||
pin_to_mask(AT91_PIN_PE26), |
||||
pin_to_controller(AT91_PIN_PE0) + PIO_PUDR); |
||||
|
||||
/* Need to reset PHY -> 500ms reset */ |
||||
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | |
||||
AT91_RSTC_ERSTL | (0x0D << 8) | |
||||
AT91_RSTC_URSTEN); |
||||
|
||||
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); |
||||
|
||||
/* Wait for end hardware reset */ |
||||
while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); |
||||
|
||||
/* Re-enable pull-up */ |
||||
writel(pin_to_mask(AT91_PIN_PC25), |
||||
pin_to_controller(AT91_PIN_PC0) + PIO_PUER); |
||||
writel(pin_to_mask(AT91_PIN_PE25) | |
||||
pin_to_mask(AT91_PIN_PE26), |
||||
pin_to_controller(AT91_PIN_PE0) + PIO_PUER); |
||||
|
||||
at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */ |
||||
at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */ |
||||
at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */ |
||||
at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */ |
||||
at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */ |
||||
at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */ |
||||
at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */ |
||||
at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */ |
||||
at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */ |
||||
at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */ |
||||
|
||||
#ifndef CONFIG_RMII |
||||
at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */ |
||||
at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ |
||||
at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ |
||||
at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ |
||||
at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ |
||||
at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ |
||||
at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ |
||||
at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ |
||||
#endif |
||||
|
||||
} |
||||
#endif |
||||
|
||||
#ifdef CONFIG_USB_OHCI_NEW |
||||
static void at91sam9263ek_uhp_hw_init(void) |
||||
{ |
||||
/* Enable VBus on UHP ports */ |
||||
at91_set_gpio_output(AT91_PIN_PA21, 0); |
||||
at91_set_gpio_output(AT91_PIN_PA24, 0); |
||||
} |
||||
#endif |
||||
|
||||
#ifdef CONFIG_LCD |
||||
vidinfo_t panel_info = { |
||||
vl_col: 240, |
||||
vl_row: 320, |
||||
vl_clk: 4965000, |
||||
vl_sync: ATMEL_LCDC_INVLINE_INVERTED | |
||||
ATMEL_LCDC_INVFRAME_INVERTED, |
||||
vl_bpix: 3, |
||||
vl_tft: 1, |
||||
vl_hsync_len: 5, |
||||
vl_left_margin: 1, |
||||
vl_right_margin:33, |
||||
vl_vsync_len: 1, |
||||
vl_upper_margin:1, |
||||
vl_lower_margin:0, |
||||
mmio: AT91SAM9263_LCDC_BASE, |
||||
}; |
||||
|
||||
void lcd_enable(void) |
||||
{ |
||||
at91_set_gpio_value(AT91_PIN_PA30, 1); /* power up */ |
||||
} |
||||
|
||||
void lcd_disable(void) |
||||
{ |
||||
at91_set_gpio_value(AT91_PIN_PA30, 0); /* power down */ |
||||
} |
||||
|
||||
static void at91sam9263ek_lcd_hw_init(void) |
||||
{ |
||||
at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ |
||||
at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ |
||||
at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ |
||||
at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ |
||||
at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ |
||||
at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ |
||||
at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ |
||||
at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ |
||||
at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ |
||||
at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ |
||||
at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ |
||||
at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ |
||||
at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ |
||||
at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */ |
||||
at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ |
||||
at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ |
||||
at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ |
||||
at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ |
||||
at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ |
||||
at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */ |
||||
at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ |
||||
at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ |
||||
|
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC); |
||||
|
||||
gd->fb_base = AT91SAM9263_SRAM0_BASE; |
||||
} |
||||
#endif |
||||
|
||||
int board_init(void) |
||||
{ |
||||
/* Enable Ctrlc */ |
||||
console_init_f(); |
||||
|
||||
/* arch number of AT91SAM9263EK-Board */ |
||||
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK; |
||||
/* adress of boot parameters */ |
||||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
||||
|
||||
at91sam9263ek_serial_hw_init(); |
||||
#ifdef CONFIG_CMD_NAND |
||||
at91sam9263ek_nand_hw_init(); |
||||
#endif |
||||
#ifdef CONFIG_HAS_DATAFLASH |
||||
at91sam9263ek_spi_hw_init(); |
||||
#endif |
||||
#ifdef CONFIG_MACB |
||||
at91sam9263ek_macb_hw_init(); |
||||
#endif |
||||
#ifdef CONFIG_USB_OHCI_NEW |
||||
at91sam9263ek_uhp_hw_init(); |
||||
#endif |
||||
#ifdef CONFIG_LCD |
||||
at91sam9263ek_lcd_hw_init(); |
||||
#endif |
||||
return 0; |
||||
} |
||||
|
||||
int dram_init(void) |
||||
{ |
||||
gd->bd->bi_dram[0].start = PHYS_SDRAM; |
||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; |
||||
return 0; |
||||
} |
||||
|
||||
#ifdef CONFIG_RESET_PHY_R |
||||
void reset_phy(void) |
||||
{ |
||||
#ifdef CONFIG_MACB |
||||
/*
|
||||
* Initialize ethernet HW addr prior to starting Linux, |
||||
* needed for nfsroot |
||||
*/ |
||||
eth_init(gd->bd); |
||||
#endif |
||||
} |
||||
#endif |
@ -0,0 +1 @@ |
||||
TEXT_BASE = 0x23f00000
|
@ -0,0 +1,78 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/at91sam9263.h> |
||||
#include <asm/arch/at91_pmc.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/io.h> |
||||
|
||||
#define RED_LED AT91_PIN_PB7 /* this is the power led */ |
||||
#define GREEN_LED AT91_PIN_PB8 /* this is the user1 led */ |
||||
#define YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */ |
||||
|
||||
void red_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(RED_LED, 1); |
||||
} |
||||
|
||||
void red_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(RED_LED, 0); |
||||
} |
||||
|
||||
void green_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(GREEN_LED, 0); |
||||
} |
||||
|
||||
void green_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(GREEN_LED, 1); |
||||
} |
||||
|
||||
void yellow_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(YELLOW_LED, 0); |
||||
} |
||||
|
||||
void yellow_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(YELLOW_LED, 1); |
||||
} |
||||
|
||||
void coloured_LED_init(void) |
||||
{ |
||||
/* Enable clock */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB | |
||||
1 << AT91SAM9263_ID_PIOCDE); |
||||
|
||||
at91_set_gpio_output(RED_LED, 1); |
||||
at91_set_gpio_output(GREEN_LED, 1); |
||||
at91_set_gpio_output(YELLOW_LED, 1); |
||||
|
||||
at91_set_gpio_value(RED_LED, 0); |
||||
at91_set_gpio_value(GREEN_LED, 1); |
||||
at91_set_gpio_value(YELLOW_LED, 1); |
||||
} |
@ -0,0 +1,79 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/at91sam9263.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/at91_pio.h> |
||||
|
||||
#include <nand.h> |
||||
|
||||
/*
|
||||
* hardware specific access to control-lines |
||||
*/ |
||||
#define MASK_ALE (1 << 21) /* our ALE is AD21 */ |
||||
#define MASK_CLE (1 << 22) /* our CLE is AD22 */ |
||||
|
||||
static void at91sam9263ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) |
||||
{ |
||||
struct nand_chip *this = mtd->priv; |
||||
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; |
||||
|
||||
IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); |
||||
switch (cmd) { |
||||
case NAND_CTL_SETCLE: |
||||
IO_ADDR_W |= MASK_CLE; |
||||
break; |
||||
case NAND_CTL_SETALE: |
||||
IO_ADDR_W |= MASK_ALE; |
||||
break; |
||||
case NAND_CTL_CLRNCE: |
||||
at91_set_gpio_value(AT91_PIN_PD15, 1); |
||||
break; |
||||
case NAND_CTL_SETNCE: |
||||
at91_set_gpio_value(AT91_PIN_PD15, 0); |
||||
break; |
||||
} |
||||
this->IO_ADDR_W = (void *) IO_ADDR_W; |
||||
} |
||||
|
||||
static int at91sam9263ek_nand_ready(struct mtd_info *mtd) |
||||
{ |
||||
return at91_get_gpio_value(AT91_PIN_PA22); |
||||
} |
||||
|
||||
int board_nand_init(struct nand_chip *nand) |
||||
{ |
||||
nand->eccmode = NAND_ECC_SOFT; |
||||
#ifdef CFG_NAND_DBW_16 |
||||
nand->options = NAND_BUSWIDTH_16; |
||||
#endif |
||||
nand->hwcontrol = at91sam9263ek_nand_hwcontrol; |
||||
nand->dev_ready = at91sam9263ek_nand_ready; |
||||
nand->chip_delay = 20; |
||||
|
||||
return 0; |
||||
} |
@ -0,0 +1,57 @@ |
||||
#
|
||||
# (C) Copyright 2003-2008
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2008
|
||||
# Stelian Pop <stelian.pop@leadtechdesign.com>
|
||||
# Lead Tech Design <www.leadtechdesign.com>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS-y += at91sam9rlek.o
|
||||
COBJS-y += led.o
|
||||
COBJS-y += partition.o
|
||||
COBJS-$(CONFIG_CMD_NAND) += nand.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS-y))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
||||
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
||||
|
||||
clean: |
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean |
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
@ -0,0 +1,215 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/at91sam9rl.h> |
||||
#include <asm/arch/at91sam9rl_matrix.h> |
||||
#include <asm/arch/at91sam9_smc.h> |
||||
#include <asm/arch/at91_pmc.h> |
||||
#include <asm/arch/at91_rstc.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/io.h> |
||||
#include <lcd.h> |
||||
#include <atmel_lcdc.h> |
||||
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) |
||||
#include <net.h> |
||||
#endif |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
/*
|
||||
* Miscelaneous platform dependent initialisations |
||||
*/ |
||||
|
||||
static void at91sam9rlek_serial_hw_init(void) |
||||
{ |
||||
#ifdef CONFIG_USART0 |
||||
at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ |
||||
at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_USART1 |
||||
at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ |
||||
at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_USART2 |
||||
at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ |
||||
at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); |
||||
#endif |
||||
|
||||
#ifdef CONFIG_USART3 /* DBGU */ |
||||
at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */ |
||||
at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); |
||||
#endif |
||||
} |
||||
|
||||
#ifdef CONFIG_CMD_NAND |
||||
static void at91sam9rlek_nand_hw_init(void) |
||||
{ |
||||
unsigned long csa; |
||||
|
||||
/* Enable CS3 */ |
||||
csa = at91_sys_read(AT91_MATRIX_EBICSA); |
||||
at91_sys_write(AT91_MATRIX_EBICSA, |
||||
csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
||||
|
||||
/* Configure SMC CS3 for NAND/SmartMedia */ |
||||
at91_sys_write(AT91_SMC_SETUP(3), |
||||
AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | |
||||
AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); |
||||
at91_sys_write(AT91_SMC_PULSE(3), |
||||
AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) | |
||||
AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); |
||||
at91_sys_write(AT91_SMC_CYCLE(3), |
||||
AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); |
||||
at91_sys_write(AT91_SMC_MODE(3), |
||||
AT91_SMC_READMODE | AT91_SMC_WRITEMODE | |
||||
AT91_SMC_EXNWMODE_DISABLE | |
||||
#ifdef CFG_NAND_DBW_16 |
||||
AT91_SMC_DBW_16 | |
||||
#else /* CFG_NAND_DBW_8 */ |
||||
AT91_SMC_DBW_8 | |
||||
#endif |
||||
AT91_SMC_TDF_(1)); |
||||
|
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); |
||||
|
||||
/* Configure RDY/BSY */ |
||||
at91_set_gpio_input(AT91_PIN_PD17, 1); |
||||
|
||||
/* Enable NandFlash */ |
||||
at91_set_gpio_output(AT91_PIN_PB6, 1); |
||||
|
||||
at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ |
||||
at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */ |
||||
} |
||||
#endif |
||||
|
||||
#ifdef CONFIG_HAS_DATAFLASH |
||||
static void at91sam9rlek_spi_hw_init(void) |
||||
{ |
||||
at91_set_A_periph(AT91_PIN_PA28, 0); /* SPI0_NPCS0 */ |
||||
|
||||
at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ |
||||
at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ |
||||
at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ |
||||
|
||||
/* Enable clock */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); |
||||
} |
||||
#endif |
||||
|
||||
#ifdef CONFIG_LCD |
||||
vidinfo_t panel_info = { |
||||
vl_col: 240, |
||||
vl_row: 320, |
||||
vl_clk: 4965000, |
||||
vl_sync: ATMEL_LCDC_INVLINE_INVERTED | |
||||
ATMEL_LCDC_INVFRAME_INVERTED, |
||||
vl_bpix: 3, |
||||
vl_tft: 1, |
||||
vl_hsync_len: 5, |
||||
vl_left_margin: 1, |
||||
vl_right_margin:33, |
||||
vl_vsync_len: 1, |
||||
vl_upper_margin:1, |
||||
vl_lower_margin:0, |
||||
mmio: AT91SAM9RL_LCDC_BASE, |
||||
}; |
||||
|
||||
void lcd_enable(void) |
||||
{ |
||||
at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */ |
||||
} |
||||
|
||||
void lcd_disable(void) |
||||
{ |
||||
at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */ |
||||
} |
||||
static void at91sam9rlek_lcd_hw_init(void) |
||||
{ |
||||
at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */ |
||||
at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */ |
||||
at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */ |
||||
at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDDEN */ |
||||
at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDCC */ |
||||
at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */ |
||||
at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */ |
||||
at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */ |
||||
at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */ |
||||
at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */ |
||||
at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */ |
||||
at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */ |
||||
at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */ |
||||
at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */ |
||||
at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */ |
||||
at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */ |
||||
at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */ |
||||
at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */ |
||||
at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */ |
||||
at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ |
||||
at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ |
||||
|
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_LCDC); |
||||
|
||||
gd->fb_base = 0; |
||||
} |
||||
#endif |
||||
|
||||
|
||||
int board_init(void) |
||||
{ |
||||
/* Enable Ctrlc */ |
||||
console_init_f(); |
||||
|
||||
/* arch number of AT91SAM9RLEK-Board */ |
||||
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK; |
||||
/* adress of boot parameters */ |
||||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
||||
|
||||
at91sam9rlek_serial_hw_init(); |
||||
#ifdef CONFIG_CMD_NAND |
||||
at91sam9rlek_nand_hw_init(); |
||||
#endif |
||||
#ifdef CONFIG_HAS_DATAFLASH |
||||
at91sam9rlek_spi_hw_init(); |
||||
#endif |
||||
#ifdef CONFIG_LCD |
||||
at91sam9rlek_lcd_hw_init(); |
||||
#endif |
||||
return 0; |
||||
} |
||||
|
||||
int dram_init(void) |
||||
{ |
||||
gd->bd->bi_dram[0].start = PHYS_SDRAM; |
||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; |
||||
return 0; |
||||
} |
@ -0,0 +1 @@ |
||||
TEXT_BASE = 0x23f00000
|
@ -0,0 +1,77 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/at91sam9rl.h> |
||||
#include <asm/arch/at91_pmc.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/io.h> |
||||
|
||||
#define RED_LED AT91_PIN_PD14 /* this is the power led */ |
||||
#define GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ |
||||
#define YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ |
||||
|
||||
void red_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(RED_LED, 1); |
||||
} |
||||
|
||||
void red_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(RED_LED, 0); |
||||
} |
||||
|
||||
void green_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(GREEN_LED, 0); |
||||
} |
||||
|
||||
void green_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(GREEN_LED, 1); |
||||
} |
||||
|
||||
void yellow_LED_on(void) |
||||
{ |
||||
at91_set_gpio_value(YELLOW_LED, 0); |
||||
} |
||||
|
||||
void yellow_LED_off(void) |
||||
{ |
||||
at91_set_gpio_value(YELLOW_LED, 1); |
||||
} |
||||
|
||||
void coloured_LED_init(void) |
||||
{ |
||||
/* Enable clock */ |
||||
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); |
||||
|
||||
at91_set_gpio_output(RED_LED, 1); |
||||
at91_set_gpio_output(GREEN_LED, 1); |
||||
at91_set_gpio_output(YELLOW_LED, 1); |
||||
|
||||
at91_set_gpio_value(RED_LED, 0); |
||||
at91_set_gpio_value(GREEN_LED, 1); |
||||
at91_set_gpio_value(YELLOW_LED, 1); |
||||
} |
@ -0,0 +1,79 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian.pop@leadtechdesign.com> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/at91sam9rl.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/at91_pio.h> |
||||
|
||||
#include <nand.h> |
||||
|
||||
/*
|
||||
* hardware specific access to control-lines |
||||
*/ |
||||
#define MASK_ALE (1 << 21) /* our ALE is AD21 */ |
||||
#define MASK_CLE (1 << 22) /* our CLE is AD22 */ |
||||
|
||||
static void at91sam9rlek_nand_hwcontrol(struct mtd_info *mtd, int cmd) |
||||
{ |
||||
struct nand_chip *this = mtd->priv; |
||||
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; |
||||
|
||||
IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); |
||||
switch (cmd) { |
||||
case NAND_CTL_SETCLE: |
||||
IO_ADDR_W |= MASK_CLE; |
||||
break; |
||||
case NAND_CTL_SETALE: |
||||
IO_ADDR_W |= MASK_ALE; |
||||
break; |
||||
case NAND_CTL_CLRNCE: |
||||
at91_set_gpio_value(AT91_PIN_PB6, 1); |
||||
break; |
||||
case NAND_CTL_SETNCE: |
||||
at91_set_gpio_value(AT91_PIN_PB6, 0); |
||||
break; |
||||
} |
||||
this->IO_ADDR_W = (void *) IO_ADDR_W; |
||||
} |
||||
|
||||
static int at91sam9rlek_nand_ready(struct mtd_info *mtd) |
||||
{ |
||||
return at91_get_gpio_value(AT91_PIN_PD17); |
||||
} |
||||
|
||||
int board_nand_init(struct nand_chip *nand) |
||||
{ |
||||
nand->eccmode = NAND_ECC_SOFT; |
||||
#ifdef CFG_NAND_DBW_16 |
||||
nand->options = NAND_BUSWIDTH_16; |
||||
#endif |
||||
nand->hwcontrol = at91sam9rlek_nand_hwcontrol; |
||||
nand->dev_ready = at91sam9rlek_nand_ready; |
||||
nand->chip_delay = 20; |
||||
|
||||
return 0; |
||||
} |
@ -0,0 +1,39 @@ |
||||
/*
|
||||
* (C) Copyright 2008 |
||||
* Ulf Samuelsson <ulf@atmel.com> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
* |
||||
*/ |
||||
#include <common.h> |
||||
#include <config.h> |
||||
#include <asm/hardware.h> |
||||
#include <dataflash.h> |
||||
|
||||
AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; |
||||
|
||||
struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { |
||||
{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ |
||||
}; |
||||
|
||||
/*define the area offsets*/ |
||||
dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { |
||||
{0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, |
||||
{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, |
||||
{0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, |
||||
{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, |
||||
{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, |
||||
}; |
@ -0,0 +1,51 @@ |
||||
#
|
||||
# (C) Copyright 2007
|
||||
# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS = $(BOARD).o nand.o
|
||||
SOBJS =
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS) |
||||
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
||||
|
||||
clean: |
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean |
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
@ -0,0 +1,24 @@ |
||||
#
|
||||
# (C) Copyright 2000
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
TEXT_BASE = 0xFFFC0000
|
@ -0,0 +1,79 @@ |
||||
/*
|
||||
* (C) Copyright 2008 |
||||
* Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <config.h> |
||||
#if defined(CONFIG_CMD_NAND) |
||||
#include <asm/gpio.h> |
||||
#include <nand.h> |
||||
|
||||
/*
|
||||
* hardware specific access to control-lines |
||||
*/ |
||||
static void quad100hd_hwcontrol(struct mtd_info *mtd, int cmd) |
||||
{ |
||||
switch(cmd) { |
||||
case NAND_CTL_SETCLE: |
||||
gpio_write_bit(CFG_NAND_CLE, 1); |
||||
break; |
||||
case NAND_CTL_CLRCLE: |
||||
gpio_write_bit(CFG_NAND_CLE, 0); |
||||
break; |
||||
|
||||
case NAND_CTL_SETALE: |
||||
gpio_write_bit(CFG_NAND_ALE, 1); |
||||
break; |
||||
case NAND_CTL_CLRALE: |
||||
gpio_write_bit(CFG_NAND_ALE, 0); |
||||
break; |
||||
|
||||
case NAND_CTL_SETNCE: |
||||
gpio_write_bit(CFG_NAND_CE, 0); |
||||
break; |
||||
case NAND_CTL_CLRNCE: |
||||
gpio_write_bit(CFG_NAND_CE, 1); |
||||
break; |
||||
} |
||||
} |
||||
|
||||
static int quad100hd_nand_ready(struct mtd_info *mtd) |
||||
{ |
||||
return gpio_read_in_bit(CFG_NAND_RDY); |
||||
} |
||||
|
||||
/*
|
||||
* Main initialization routine |
||||
*/ |
||||
int board_nand_init(struct nand_chip *nand) |
||||
{ |
||||
/* Set address of hardware control function */ |
||||
nand->hwcontrol = quad100hd_hwcontrol; |
||||
nand->dev_ready = quad100hd_nand_ready; |
||||
nand->eccmode = NAND_ECC_SOFT; |
||||
/* 15 us command delay time */ |
||||
nand->chip_delay = 20; |
||||
|
||||
/* Return happy */ |
||||
return 0; |
||||
} |
||||
#endif /* CONFIG_CMD_NAND */ |
@ -0,0 +1,93 @@ |
||||
/*
|
||||
* (C) Copyright 2008 |
||||
* Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. |
||||
* |
||||
* Based in part on board/icecube/icecube.c from PPCBoot |
||||
* (C) Copyright 2003 Intrinsyc Software |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <command.h> |
||||
#include <malloc.h> |
||||
#include <environment.h> |
||||
#include <logbuff.h> |
||||
#include <post.h> |
||||
|
||||
#include <asm/processor.h> |
||||
#include <asm/io.h> |
||||
#include <asm/gpio.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
int board_early_init_f(void) |
||||
{ |
||||
/* taken from PPCBoot */ |
||||
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
mtdcr(uicer, 0x00000000); /* disable all ints */ |
||||
mtdcr(uiccr, 0x00000000); |
||||
mtdcr(uicpr, 0xFFFF7FFE); /* set int polarities */ |
||||
mtdcr(uictr, 0x00000000); /* set int trigger levels */ |
||||
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
||||
mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ |
||||
|
||||
mtdcr(CPC0_SRR, 0x00040000); /* Hold PCI bridge in reset */ |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
/*
|
||||
* Check Board Identity: |
||||
*/ |
||||
int checkboard(void) |
||||
{ |
||||
char *s = getenv("serial#"); |
||||
#ifdef DISPLAY_BOARD_INFO |
||||
sys_info_t sysinfo; |
||||
#endif |
||||
|
||||
puts("Board: Quad100hd"); |
||||
|
||||
if (s != NULL) { |
||||
puts(", serial# "); |
||||
puts(s); |
||||
} |
||||
putc('\n'); |
||||
|
||||
#ifdef DISPLAY_BOARD_INFO |
||||
/* taken from ppcboot */ |
||||
get_sys_info(&sysinfo); |
||||
|
||||
printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz); |
||||
printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); |
||||
printf("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); |
||||
printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); |
||||
printf("\tEPB: %lu MHz\n", sysinfo.freqPLB / (sysinfo.pllExtBusDiv * |
||||
1000000)); |
||||
printf("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000); |
||||
#endif |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
long int initdram(int board_type) |
||||
{ |
||||
return CFG_SDRAM_SIZE; |
||||
} |
@ -0,0 +1,133 @@ |
||||
/* |
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
.resetvec 0xFFFFFFFC : |
||||
{ |
||||
*(.resetvec) |
||||
} = 0xffff |
||||
|
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
cpu/ppc4xx/start.o (.text) |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
*(.rodata.str1.4) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x00FF) & 0xFFFFFF00; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
. = .; |
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
||||
. = .; |
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(256); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(256); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss (NOLOAD) : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
@ -0,0 +1,37 @@ |
||||
/*
|
||||
* Command for accessing DataFlash. |
||||
* |
||||
* Copyright (C) 2008 Atmel Corporation |
||||
*/ |
||||
#include <common.h> |
||||
#include <df.h> |
||||
|
||||
static int do_df(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
||||
{ |
||||
const char *cmd; |
||||
|
||||
/* need at least two arguments */ |
||||
if (argc < 2) |
||||
goto usage; |
||||
|
||||
cmd = argv[1]; |
||||
|
||||
if (strcmp(cmd, "init") == 0) { |
||||
df_init(0, 0, 1000000); |
||||
return 0; |
||||
} |
||||
|
||||
if (strcmp(cmd, "info") == 0) { |
||||
df_show_info(); |
||||
return 0; |
||||
} |
||||
|
||||
usage: |
||||
printf("Usage:\n%s\n", cmdtp->usage); |
||||
return 1; |
||||
} |
||||
|
||||
U_BOOT_CMD( |
||||
sf, 2, 1, do_serial_flash, |
||||
"sf - Serial flash sub-system\n", |
||||
"probe [bus:]cs - init flash device on given SPI bus and CS\n") |
@ -0,0 +1,191 @@ |
||||
/*
|
||||
* Command for accessing SPI flash. |
||||
* |
||||
* Copyright (C) 2008 Atmel Corporation |
||||
*/ |
||||
#include <common.h> |
||||
#include <spi_flash.h> |
||||
|
||||
#include <asm/io.h> |
||||
|
||||
#ifndef CONFIG_SF_DEFAULT_SPEED |
||||
# define CONFIG_SF_DEFAULT_SPEED 1000000 |
||||
#endif |
||||
#ifndef CONFIG_SF_DEFAULT_MODE |
||||
# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 |
||||
#endif |
||||
|
||||
static struct spi_flash *flash; |
||||
|
||||
static int do_spi_flash_probe(int argc, char *argv[]) |
||||
{ |
||||
unsigned int bus = 0; |
||||
unsigned int cs; |
||||
unsigned int speed = CONFIG_SF_DEFAULT_SPEED; |
||||
unsigned int mode = CONFIG_SF_DEFAULT_MODE; |
||||
char *endp; |
||||
struct spi_flash *new; |
||||
|
||||
if (argc < 2) |
||||
goto usage; |
||||
|
||||
cs = simple_strtoul(argv[1], &endp, 0); |
||||
if (*argv[1] == 0 || (*endp != 0 && *endp != ':')) |
||||
goto usage; |
||||
if (*endp == ':') { |
||||
if (endp[1] == 0) |
||||
goto usage; |
||||
|
||||
bus = cs; |
||||
cs = simple_strtoul(endp + 1, &endp, 0); |
||||
if (*endp != 0) |
||||
goto usage; |
||||
} |
||||
|
||||
if (argc >= 3) { |
||||
speed = simple_strtoul(argv[2], &endp, 0); |
||||
if (*argv[2] == 0 || *endp != 0) |
||||
goto usage; |
||||
} |
||||
if (argc >= 4) { |
||||
mode = simple_strtoul(argv[3], &endp, 0); |
||||
if (*argv[3] == 0 || *endp != 0) |
||||
goto usage; |
||||
} |
||||
|
||||
new = spi_flash_probe(bus, cs, speed, mode); |
||||
if (!new) { |
||||
printf("Failed to initialize SPI flash at %u:%u\n", bus, cs); |
||||
return 1; |
||||
} |
||||
|
||||
if (flash) |
||||
spi_flash_free(flash); |
||||
flash = new; |
||||
|
||||
printf("%u KiB %s at %u:%u is now current device\n", |
||||
flash->size >> 10, flash->name, bus, cs); |
||||
|
||||
return 0; |
||||
|
||||
usage: |
||||
puts("Usage: sf probe [bus:]cs [hz] [mode]\n"); |
||||
return 1; |
||||
} |
||||
|
||||
static int do_spi_flash_read_write(int argc, char *argv[]) |
||||
{ |
||||
unsigned long addr; |
||||
unsigned long offset; |
||||
unsigned long len; |
||||
void *buf; |
||||
char *endp; |
||||
int ret; |
||||
|
||||
if (argc < 4) |
||||
goto usage; |
||||
|
||||
addr = simple_strtoul(argv[1], &endp, 16); |
||||
if (*argv[1] == 0 || *endp != 0) |
||||
goto usage; |
||||
offset = simple_strtoul(argv[2], &endp, 16); |
||||
if (*argv[2] == 0 || *endp != 0) |
||||
goto usage; |
||||
len = simple_strtoul(argv[3], &endp, 16); |
||||
if (*argv[3] == 0 || *endp != 0) |
||||
goto usage; |
||||
|
||||
buf = map_physmem(addr, len, MAP_WRBACK); |
||||
if (!buf) { |
||||
puts("Failed to map physical memory\n"); |
||||
return 1; |
||||
} |
||||
|
||||
if (strcmp(argv[0], "read") == 0) |
||||
ret = spi_flash_read(flash, offset, len, buf); |
||||
else |
||||
ret = spi_flash_write(flash, offset, len, buf); |
||||
|
||||
unmap_physmem(buf, len); |
||||
|
||||
if (ret) { |
||||
printf("SPI flash %s failed\n", argv[0]); |
||||
return 1; |
||||
} |
||||
|
||||
return 0; |
||||
|
||||
usage: |
||||
printf("Usage: sf %s addr offset len\n", argv[0]); |
||||
return 1; |
||||
} |
||||
|
||||
static int do_spi_flash_erase(int argc, char *argv[]) |
||||
{ |
||||
unsigned long offset; |
||||
unsigned long len; |
||||
char *endp; |
||||
int ret; |
||||
|
||||
if (argc < 3) |
||||
goto usage; |
||||
|
||||
offset = simple_strtoul(argv[1], &endp, 16); |
||||
if (*argv[1] == 0 || *endp != 0) |
||||
goto usage; |
||||
len = simple_strtoul(argv[2], &endp, 16); |
||||
if (*argv[2] == 0 || *endp != 0) |
||||
goto usage; |
||||
|
||||
ret = spi_flash_erase(flash, offset, len); |
||||
if (ret) { |
||||
printf("SPI flash %s failed\n", argv[0]); |
||||
return 1; |
||||
} |
||||
|
||||
return 0; |
||||
|
||||
usage: |
||||
puts("Usage: sf erase offset len\n"); |
||||
return 1; |
||||
} |
||||
|
||||
static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
||||
{ |
||||
const char *cmd; |
||||
|
||||
/* need at least two arguments */ |
||||
if (argc < 2) |
||||
goto usage; |
||||
|
||||
cmd = argv[1]; |
||||
|
||||
if (strcmp(cmd, "probe") == 0) |
||||
return do_spi_flash_probe(argc - 1, argv + 1); |
||||
|
||||
/* The remaining commands require a selected device */ |
||||
if (!flash) { |
||||
puts("No SPI flash selected. Please run `sf probe'\n"); |
||||
return 1; |
||||
} |
||||
|
||||
if (strcmp(cmd, "read") == 0 || strcmp(cmd, "write") == 0) |
||||
return do_spi_flash_read_write(argc - 1, argv + 1); |
||||
if (strcmp(cmd, "erase") == 0) |
||||
return do_spi_flash_erase(argc - 1, argv + 1); |
||||
|
||||
usage: |
||||
printf("Usage:\n%s\n", cmdtp->usage); |
||||
return 1; |
||||
} |
||||
|
||||
U_BOOT_CMD( |
||||
sf, 5, 1, do_spi_flash, |
||||
"sf - SPI flash sub-system\n", |
||||
"probe [bus:]cs [hz] [mode] - init flash device on given SPI bus\n" |
||||
" and chip select\n" |
||||
"sf read addr offset len - read `len' bytes starting at\n" |
||||
" `offset' to memory at `addr'\n" |
||||
"sf write addr offset len - write `len' bytes from memory\n" |
||||
" at `addr' to flash at `offset'\n" |
||||
"sf erase offset len - erase `len' bytes from `offset'\n"); |
@ -0,0 +1,131 @@ |
||||
/*
|
||||
* (C) Copyright 2000-2002 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
||||
* Andreas Heppel <aheppel@sysgo.de> |
||||
* |
||||
* (C) Copyright 2008 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#include <common.h> |
||||
|
||||
#ifdef CFG_ENV_IS_IN_SPI_FLASH |
||||
|
||||
#include <environment.h> |
||||
#include <spi_flash.h> |
||||
|
||||
#ifndef CFG_ENV_SPI_BUS |
||||
# define CFG_ENV_SPI_BUS 0 |
||||
#endif |
||||
#ifndef CFG_ENV_SPI_CS |
||||
# define CFG_ENV_SPI_CS 0 |
||||
#endif |
||||
#ifndef CFG_ENV_SPI_MAX_HZ |
||||
# define CFG_ENV_SPI_MAX_HZ 1000000 |
||||
#endif |
||||
#ifndef CFG_ENV_SPI_MODE |
||||
# define CFG_ENV_SPI_MODE SPI_MODE_3 |
||||
#endif |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
/* references to names in env_common.c */ |
||||
extern uchar default_environment[]; |
||||
extern int default_environment_size; |
||||
|
||||
char * env_name_spec = "SPI Flash"; |
||||
env_t *env_ptr; |
||||
|
||||
static struct spi_flash *env_flash; |
||||
|
||||
uchar env_get_char_spec(int index) |
||||
{ |
||||
return *((uchar *)(gd->env_addr + index)); |
||||
} |
||||
|
||||
int saveenv(void) |
||||
{ |
||||
if (!env_flash) { |
||||
puts("Environment SPI flash not initialized\n"); |
||||
return 1; |
||||
} |
||||
|
||||
puts("Erasing SPI flash..."); |
||||
if (spi_flash_erase(env_flash, CFG_ENV_OFFSET, CFG_ENV_SIZE)) |
||||
return 1; |
||||
|
||||
puts("Writing to SPI flash..."); |
||||
if (spi_flash_write(env_flash, CFG_ENV_OFFSET, CFG_ENV_SIZE, env_ptr)) |
||||
return 1; |
||||
|
||||
puts("done\n"); |
||||
return 0; |
||||
} |
||||
|
||||
void env_relocate_spec(void) |
||||
{ |
||||
int ret; |
||||
|
||||
env_flash = spi_flash_probe(CFG_ENV_SPI_BUS, CFG_ENV_SPI_CS, |
||||
CFG_ENV_SPI_MAX_HZ, CFG_ENV_SPI_MODE); |
||||
if (!env_flash) |
||||
goto err_probe; |
||||
|
||||
ret = spi_flash_read(env_flash, CFG_ENV_OFFSET, CFG_ENV_SIZE, env_ptr); |
||||
if (ret) |
||||
goto err_read; |
||||
|
||||
if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) |
||||
goto err_crc; |
||||
|
||||
gd->env_valid = 1; |
||||
|
||||
return; |
||||
|
||||
err_read: |
||||
spi_flash_free(env_flash); |
||||
env_flash = NULL; |
||||
err_probe: |
||||
err_crc: |
||||
puts("*** Warning - bad CRC, using default environment\n\n"); |
||||
|
||||
if (default_environment_size > CFG_ENV_SIZE) { |
||||
gd->env_valid = 0; |
||||
puts("*** Error - default environment is too large\n\n"); |
||||
return; |
||||
} |
||||
|
||||
memset(env_ptr, 0, sizeof(env_t)); |
||||
memcpy(env_ptr->data, default_environment, default_environment_size); |
||||
env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE); |
||||
gd->env_valid = 1; |
||||
} |
||||
|
||||
int env_init(void) |
||||
{ |
||||
/* SPI flash isn't usable before relocation */ |
||||
gd->env_addr = (ulong)&default_environment[0]; |
||||
gd->env_valid = 1; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
#endif /* CFG_ENV_IS_IN_SPI_FLASH */ |
@ -1,2 +1,3 @@ |
||||
PLATFORM_CPPFLAGS += -march=armv5te
|
||||
PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,)
|
||||
LDSCRIPT := $(SRCTREE)/cpu/arm926ejs/at91sam9/u-boot.lds
|
||||
|
@ -0,0 +1,68 @@ |
||||
/*
|
||||
* Copyright (C) 2005-2008 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#include <common.h> |
||||
|
||||
#include <asm/io.h> |
||||
|
||||
#include <asm/arch/clk.h> |
||||
#include <asm/arch/memory-map.h> |
||||
|
||||
#include "sm.h" |
||||
|
||||
void clk_init(void) |
||||
{ |
||||
uint32_t cksel; |
||||
|
||||
/* in case of soft resets, disable watchdog */ |
||||
sm_writel(WDT_CTRL, SM_BF(KEY, 0x55)); |
||||
sm_writel(WDT_CTRL, SM_BF(KEY, 0xaa)); |
||||
|
||||
#ifdef CONFIG_PLL |
||||
/* Initialize the PLL */ |
||||
sm_writel(PM_PLL0, (SM_BF(PLLCOUNT, CFG_PLL0_SUPPRESS_CYCLES) |
||||
| SM_BF(PLLMUL, CFG_PLL0_MUL - 1) |
||||
| SM_BF(PLLDIV, CFG_PLL0_DIV - 1) |
||||
| SM_BF(PLLOPT, CFG_PLL0_OPT) |
||||
| SM_BF(PLLOSC, 0) |
||||
| SM_BIT(PLLEN))); |
||||
|
||||
/* Wait for lock */ |
||||
while (!(sm_readl(PM_ISR) & SM_BIT(LOCK0))) ; |
||||
#endif |
||||
|
||||
/* Set up clocks for the CPU and all peripheral buses */ |
||||
cksel = 0; |
||||
if (CFG_CLKDIV_CPU) |
||||
cksel |= SM_BIT(CPUDIV) | SM_BF(CPUSEL, CFG_CLKDIV_CPU - 1); |
||||
if (CFG_CLKDIV_HSB) |
||||
cksel |= SM_BIT(HSBDIV) | SM_BF(HSBSEL, CFG_CLKDIV_HSB - 1); |
||||
if (CFG_CLKDIV_PBA) |
||||
cksel |= SM_BIT(PBADIV) | SM_BF(PBASEL, CFG_CLKDIV_PBA - 1); |
||||
if (CFG_CLKDIV_PBB) |
||||
cksel |= SM_BIT(PBBDIV) | SM_BF(PBBSEL, CFG_CLKDIV_PBB - 1); |
||||
sm_writel(PM_CKSEL, cksel); |
||||
|
||||
#ifdef CONFIG_PLL |
||||
/* Use PLL0 as main clock */ |
||||
sm_writel(PM_MCCTRL, SM_BIT(PLLSEL)); |
||||
#endif |
||||
} |
@ -1,64 +0,0 @@ |
||||
/* |
||||
* Copyright (C) 2004-2006 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#include <asm/sysreg.h> |
||||
#include <asm/ptrace.h> |
||||
|
||||
.section .text.exception,"ax" |
||||
.global _evba
|
||||
.type _evba,@function
|
||||
.align 10
|
||||
_evba: |
||||
.irp x,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 |
||||
.align 2
|
||||
rjmp unknown_exception |
||||
.endr |
||||
|
||||
.global timer_interrupt_handler
|
||||
.type timer_interrupt_handler,@function
|
||||
.align 2
|
||||
timer_interrupt_handler: |
||||
/* |
||||
* Increment timer_overflow and re-write COMPARE with 0xffffffff. |
||||
* |
||||
* We're running at interrupt level 3, so we don't need to save |
||||
* r8-r12 or lr to the stack. |
||||
*/ |
||||
lda.w r8, timer_overflow |
||||
ld.w r9, r8[0] |
||||
mov r10, -1 |
||||
mtsr SYSREG_COMPARE, r10 |
||||
sub r9, -1 |
||||
st.w r8[0], r9 |
||||
rete |
||||
|
||||
.type unknown_exception, @function
|
||||
unknown_exception: |
||||
pushm r0-r12 |
||||
sub r8, sp, REG_R12 - REG_R0 - 4 |
||||
mov r9, lr |
||||
mfsr r10, SYSREG_RAR_EX |
||||
mfsr r11, SYSREG_RSR_EX |
||||
pushm r8-r11 |
||||
mfsr r12, SYSREG_ECR |
||||
mov r11, sp |
||||
rcall do_unknown_exception |
||||
1: rjmp 1b |
@ -0,0 +1,47 @@ |
||||
#
|
||||
# (C) Copyright 2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB := $(obj)libspi_flash.a
|
||||
|
||||
COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o
|
||||
COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o
|
||||
|
||||
COBJS := $(COBJS-y)
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
all: $(LIB) |
||||
|
||||
$(LIB): $(obj).depend $(OBJS) |
||||
$(AR) $(ARFLAGS) $@ $(OBJS)
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
@ -0,0 +1,362 @@ |
||||
/*
|
||||
* Atmel SPI DataFlash support |
||||
* |
||||
* Copyright (C) 2008 Atmel Corporation |
||||
*/ |
||||
#define DEBUG |
||||
#include <common.h> |
||||
#include <malloc.h> |
||||
#include <spi_flash.h> |
||||
|
||||
#include "spi_flash_internal.h" |
||||
|
||||
/* AT45-specific commands */ |
||||
#define CMD_AT45_READ_STATUS 0xd7 |
||||
#define CMD_AT45_ERASE_PAGE 0x81 |
||||
#define CMD_AT45_LOAD_PROG_BUF1 0x82 |
||||
#define CMD_AT45_LOAD_BUF1 0x84 |
||||
#define CMD_AT45_LOAD_PROG_BUF2 0x85 |
||||
#define CMD_AT45_LOAD_BUF2 0x87 |
||||
#define CMD_AT45_PROG_BUF1 0x88 |
||||
#define CMD_AT45_PROG_BUF2 0x89 |
||||
|
||||
/* AT45 status register bits */ |
||||
#define AT45_STATUS_P2_PAGE_SIZE (1 << 0) |
||||
#define AT45_STATUS_READY (1 << 7) |
||||
|
||||
/* DataFlash family IDs, as obtained from the second idcode byte */ |
||||
#define DF_FAMILY_AT26F 0 |
||||
#define DF_FAMILY_AT45 1 |
||||
#define DF_FAMILY_AT26DF 2 /* AT25DF and AT26DF */ |
||||
|
||||
struct atmel_spi_flash_params { |
||||
u8 idcode1; |
||||
/* Log2 of page size in power-of-two mode */ |
||||
u8 l2_page_size; |
||||
u8 pages_per_block; |
||||
u8 blocks_per_sector; |
||||
u8 nr_sectors; |
||||
const char *name; |
||||
}; |
||||
|
||||
struct atmel_spi_flash { |
||||
const struct atmel_spi_flash_params *params; |
||||
struct spi_flash flash; |
||||
}; |
||||
|
||||
static inline struct atmel_spi_flash * |
||||
to_atmel_spi_flash(struct spi_flash *flash) |
||||
{ |
||||
return container_of(flash, struct atmel_spi_flash, flash); |
||||
} |
||||
|
||||
static const struct atmel_spi_flash_params atmel_spi_flash_table[] = { |
||||
{ |
||||
.idcode1 = 0x28, |
||||
.l2_page_size = 10, |
||||
.pages_per_block = 8, |
||||
.blocks_per_sector = 32, |
||||
.nr_sectors = 32, |
||||
.name = "AT45DB642D", |
||||
}, |
||||
}; |
||||
|
||||
static int at45_wait_ready(struct spi_flash *flash, unsigned long timeout) |
||||
{ |
||||
struct spi_slave *spi = flash->spi; |
||||
unsigned long timebase; |
||||
int ret; |
||||
u8 cmd = CMD_AT45_READ_STATUS; |
||||
u8 status; |
||||
|
||||
timebase = get_timer(0); |
||||
|
||||
ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); |
||||
if (ret) |
||||
return -1; |
||||
|
||||
do { |
||||
ret = spi_xfer(spi, 8, NULL, &status, 0); |
||||
if (ret) |
||||
return -1; |
||||
|
||||
if (status & AT45_STATUS_READY) |
||||
break; |
||||
} while (get_timer(timebase) < timeout); |
||||
|
||||
/* Deactivate CS */ |
||||
spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); |
||||
|
||||
if (status & AT45_STATUS_READY) |
||||
return 0; |
||||
|
||||
/* Timed out */ |
||||
return -1; |
||||
} |
||||
|
||||
/*
|
||||
* Assemble the address part of a command for AT45 devices in |
||||
* non-power-of-two page size mode. |
||||
*/ |
||||
static void at45_build_address(struct atmel_spi_flash *asf, u8 *cmd, u32 offset) |
||||
{ |
||||
unsigned long page_addr; |
||||
unsigned long byte_addr; |
||||
unsigned long page_size; |
||||
unsigned int page_shift; |
||||
|
||||
/*
|
||||
* The "extra" space per page is the power-of-two page size |
||||
* divided by 32. |
||||
*/ |
||||
page_shift = asf->params->l2_page_size; |
||||
page_size = (1 << page_shift) + (1 << (page_shift - 5)); |
||||
page_shift++; |
||||
page_addr = offset / page_size; |
||||
byte_addr = offset % page_size; |
||||
|
||||
cmd[0] = page_addr >> (16 - page_shift); |
||||
cmd[1] = page_addr << (page_shift - 8) | (byte_addr >> 8); |
||||
cmd[2] = byte_addr; |
||||
} |
||||
|
||||
static int dataflash_read_fast_p2(struct spi_flash *flash, |
||||
u32 offset, size_t len, void *buf) |
||||
{ |
||||
u8 cmd[5]; |
||||
|
||||
cmd[0] = CMD_READ_ARRAY_FAST; |
||||
cmd[1] = offset >> 16; |
||||
cmd[2] = offset >> 8; |
||||
cmd[3] = offset; |
||||
cmd[4] = 0x00; |
||||
|
||||
return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); |
||||
} |
||||
|
||||
static int dataflash_read_fast_at45(struct spi_flash *flash, |
||||
u32 offset, size_t len, void *buf) |
||||
{ |
||||
struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); |
||||
u8 cmd[5]; |
||||
|
||||
cmd[0] = CMD_READ_ARRAY_FAST; |
||||
at45_build_address(asf, cmd + 1, offset); |
||||
cmd[4] = 0x00; |
||||
|
||||
return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); |
||||
} |
||||
|
||||
static int dataflash_write_at45(struct spi_flash *flash, |
||||
u32 offset, size_t len, const void *buf) |
||||
{ |
||||
struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); |
||||
unsigned long page_addr; |
||||
unsigned long byte_addr; |
||||
unsigned long page_size; |
||||
unsigned int page_shift; |
||||
size_t chunk_len; |
||||
size_t actual; |
||||
int ret; |
||||
u8 cmd[4]; |
||||
|
||||
page_shift = asf->params->l2_page_size; |
||||
page_size = (1 << page_shift) + (1 << (page_shift - 5)); |
||||
page_shift++; |
||||
page_addr = offset / page_size; |
||||
byte_addr = offset % page_size; |
||||
|
||||
ret = spi_claim_bus(flash->spi); |
||||
if (ret) { |
||||
debug("SF: Unable to claim SPI bus\n"); |
||||
return ret; |
||||
} |
||||
|
||||
for (actual = 0; actual < len; actual += chunk_len) { |
||||
chunk_len = min(len - actual, page_size - byte_addr); |
||||
|
||||
/* Use the same address bits for both commands */ |
||||
cmd[0] = CMD_AT45_LOAD_BUF1; |
||||
cmd[1] = page_addr >> (16 - page_shift); |
||||
cmd[2] = page_addr << (page_shift - 8) | (byte_addr >> 8); |
||||
cmd[3] = byte_addr; |
||||
|
||||
ret = spi_flash_cmd_write(flash->spi, cmd, 4, |
||||
buf + actual, chunk_len); |
||||
if (ret < 0) { |
||||
debug("SF: Loading AT45 buffer failed\n"); |
||||
goto out; |
||||
} |
||||
|
||||
cmd[0] = CMD_AT45_PROG_BUF1; |
||||
ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); |
||||
if (ret < 0) { |
||||
debug("SF: AT45 page programming failed\n"); |
||||
goto out; |
||||
} |
||||
|
||||
ret = at45_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); |
||||
if (ret < 0) { |
||||
debug("SF: AT45 page programming timed out\n"); |
||||
goto out; |
||||
} |
||||
|
||||
page_addr++; |
||||
byte_addr = 0; |
||||
} |
||||
|
||||
debug("SF: AT45: Successfully programmed %u bytes @ 0x%x\n", |
||||
len, offset); |
||||
ret = 0; |
||||
|
||||
out: |
||||
spi_release_bus(flash->spi); |
||||
return ret; |
||||
} |
||||
|
||||
int dataflash_erase_at45(struct spi_flash *flash, u32 offset, size_t len) |
||||
{ |
||||
struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); |
||||
unsigned long page_addr; |
||||
unsigned long page_size; |
||||
unsigned int page_shift; |
||||
size_t actual; |
||||
int ret; |
||||
u8 cmd[4]; |
||||
|
||||
/*
|
||||
* TODO: This function currently uses page erase only. We can |
||||
* probably speed things up by using block and/or sector erase |
||||
* when possible. |
||||
*/ |
||||
|
||||
page_shift = asf->params->l2_page_size; |
||||
page_size = (1 << page_shift) + (1 << (page_shift - 5)); |
||||
page_shift++; |
||||
page_addr = offset / page_size; |
||||
|
||||
if (offset % page_size || len % page_size) { |
||||
debug("SF: Erase offset/length not multiple of page size\n"); |
||||
return -1; |
||||
} |
||||
|
||||
cmd[0] = CMD_AT45_ERASE_PAGE; |
||||
cmd[3] = 0x00; |
||||
|
||||
ret = spi_claim_bus(flash->spi); |
||||
if (ret) { |
||||
debug("SF: Unable to claim SPI bus\n"); |
||||
return ret; |
||||
} |
||||
|
||||
for (actual = 0; actual < len; actual += page_size) { |
||||
cmd[1] = page_addr >> (16 - page_shift); |
||||
cmd[2] = page_addr << (page_shift - 8); |
||||
|
||||
ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); |
||||
if (ret < 0) { |
||||
debug("SF: AT45 page erase failed\n"); |
||||
goto out; |
||||
} |
||||
|
||||
ret = at45_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); |
||||
if (ret < 0) { |
||||
debug("SF: AT45 page erase timed out\n"); |
||||
goto out; |
||||
} |
||||
|
||||
page_addr++; |
||||
} |
||||
|
||||
debug("SF: AT45: Successfully erased %u bytes @ 0x%x\n", |
||||
len, offset); |
||||
ret = 0; |
||||
|
||||
out: |
||||
spi_release_bus(flash->spi); |
||||
return ret; |
||||
} |
||||
|
||||
struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode) |
||||
{ |
||||
const struct atmel_spi_flash_params *params; |
||||
unsigned long page_size; |
||||
unsigned int family; |
||||
struct atmel_spi_flash *asf; |
||||
unsigned int i; |
||||
int ret; |
||||
u8 status; |
||||
|
||||
for (i = 0; i < ARRAY_SIZE(atmel_spi_flash_table); i++) { |
||||
params = &atmel_spi_flash_table[i]; |
||||
if (params->idcode1 == idcode[1]) |
||||
break; |
||||
} |
||||
|
||||
if (i == ARRAY_SIZE(atmel_spi_flash_table)) { |
||||
debug("SF: Unsupported DataFlash ID %02x\n", |
||||
idcode[1]); |
||||
return NULL; |
||||
} |
||||
|
||||
asf = malloc(sizeof(struct atmel_spi_flash)); |
||||
if (!asf) { |
||||
debug("SF: Failed to allocate memory\n"); |
||||
return NULL; |
||||
} |
||||
|
||||
asf->params = params; |
||||
asf->flash.spi = spi; |
||||
asf->flash.name = params->name; |
||||
|
||||
/* Assuming power-of-two page size initially. */ |
||||
page_size = 1 << params->l2_page_size; |
||||
|
||||
family = idcode[1] >> 5; |
||||
|
||||
switch (family) { |
||||
case DF_FAMILY_AT45: |
||||
/*
|
||||
* AT45 chips have configurable page size. The status |
||||
* register indicates which configuration is active. |
||||
*/ |
||||
ret = spi_flash_cmd(spi, CMD_AT45_READ_STATUS, &status, 1); |
||||
if (ret) |
||||
goto err; |
||||
|
||||
debug("SF: AT45 status register: %02x\n", status); |
||||
|
||||
if (!(status & AT45_STATUS_P2_PAGE_SIZE)) { |
||||
asf->flash.read = dataflash_read_fast_at45; |
||||
asf->flash.write = dataflash_write_at45; |
||||
asf->flash.erase = dataflash_erase_at45; |
||||
page_size += 1 << (params->l2_page_size - 5); |
||||
} else { |
||||
asf->flash.read = dataflash_read_fast_p2; |
||||
} |
||||
|
||||
break; |
||||
|
||||
case DF_FAMILY_AT26F: |
||||
case DF_FAMILY_AT26DF: |
||||
asf->flash.read = dataflash_read_fast_p2; |
||||
break; |
||||
|
||||
default: |
||||
debug("SF: Unsupported DataFlash family %u\n", family); |
||||
goto err; |
||||
} |
||||
|
||||
asf->flash.size = page_size * params->pages_per_block |
||||
* params->blocks_per_sector |
||||
* params->nr_sectors; |
||||
|
||||
debug("SF: Detected %s with page size %u, total %u bytes\n", |
||||
params->name, page_size, asf->flash.size); |
||||
|
||||
return &asf->flash; |
||||
|
||||
err: |
||||
free(asf); |
||||
return NULL; |
||||
} |
@ -0,0 +1,162 @@ |
||||
/*
|
||||
* SPI flash interface |
||||
* |
||||
* Copyright (C) 2008 Atmel Corporation |
||||
*/ |
||||
#define DEBUG |
||||
#include <common.h> |
||||
#include <malloc.h> |
||||
#include <spi.h> |
||||
#include <spi_flash.h> |
||||
|
||||
#include "spi_flash_internal.h" |
||||
|
||||
int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len) |
||||
{ |
||||
unsigned long flags = SPI_XFER_BEGIN; |
||||
int ret; |
||||
|
||||
if (len == 0) |
||||
flags |= SPI_XFER_END; |
||||
|
||||
ret = spi_xfer(spi, 8, &cmd, NULL, flags); |
||||
if (ret) { |
||||
debug("SF: Failed to send command %02x: %d\n", cmd, ret); |
||||
return ret; |
||||
} |
||||
|
||||
if (len) { |
||||
ret = spi_xfer(spi, len * 8, NULL, response, SPI_XFER_END); |
||||
if (ret) |
||||
debug("SF: Failed to read response (%zu bytes): %d\n", |
||||
len, ret); |
||||
} |
||||
|
||||
return ret; |
||||
} |
||||
|
||||
int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, |
||||
size_t cmd_len, void *data, size_t data_len) |
||||
{ |
||||
unsigned long flags = SPI_XFER_BEGIN; |
||||
int ret; |
||||
|
||||
if (data_len == 0) |
||||
flags |= SPI_XFER_END; |
||||
|
||||
ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); |
||||
if (ret) { |
||||
debug("SF: Failed to send read command (%zu bytes): %d\n", |
||||
cmd_len, ret); |
||||
} else if (data_len != 0) { |
||||
ret = spi_xfer(spi, data_len * 8, NULL, data, SPI_XFER_END); |
||||
if (ret) |
||||
debug("SF: Failed to read %zu bytes of data: %d\n", |
||||
data_len, ret); |
||||
} |
||||
|
||||
return ret; |
||||
} |
||||
|
||||
int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, |
||||
const void *data, size_t data_len) |
||||
{ |
||||
unsigned long flags = SPI_XFER_BEGIN; |
||||
int ret; |
||||
|
||||
if (data_len == 0) |
||||
flags |= SPI_XFER_END; |
||||
|
||||
ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); |
||||
if (ret) { |
||||
debug("SF: Failed to send read command (%zu bytes): %d\n", |
||||
cmd_len, ret); |
||||
} else if (data_len != 0) { |
||||
ret = spi_xfer(spi, data_len * 8, data, NULL, SPI_XFER_END); |
||||
if (ret) |
||||
debug("SF: Failed to read %zu bytes of data: %d\n", |
||||
data_len, ret); |
||||
} |
||||
|
||||
return ret; |
||||
} |
||||
|
||||
|
||||
int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, |
||||
size_t cmd_len, void *data, size_t data_len) |
||||
{ |
||||
struct spi_slave *spi = flash->spi; |
||||
int ret; |
||||
|
||||
spi_claim_bus(spi); |
||||
ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len); |
||||
spi_release_bus(spi); |
||||
|
||||
return ret; |
||||
} |
||||
|
||||
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, |
||||
unsigned int max_hz, unsigned int spi_mode) |
||||
{ |
||||
struct spi_slave *spi; |
||||
struct spi_flash *flash; |
||||
int ret; |
||||
u8 idcode[3]; |
||||
|
||||
spi = spi_setup_slave(bus, cs, max_hz, spi_mode); |
||||
if (!spi) { |
||||
debug("SF: Failed to set up slave\n"); |
||||
return NULL; |
||||
} |
||||
|
||||
ret = spi_claim_bus(spi); |
||||
if (ret) { |
||||
debug("SF: Failed to claim SPI bus: %d\n", ret); |
||||
goto err_claim_bus; |
||||
} |
||||
|
||||
/* Read the ID codes */ |
||||
ret = spi_flash_cmd(spi, CMD_READ_ID, &idcode, sizeof(idcode)); |
||||
if (ret) |
||||
goto err_read_id; |
||||
|
||||
debug("SF: Got idcode %02x %02x %02x\n", idcode[0], |
||||
idcode[1], idcode[2]); |
||||
|
||||
switch (idcode[0]) { |
||||
#ifdef CONFIG_SPI_FLASH_SPANSION |
||||
case 0x01: |
||||
flash = spi_flash_probe_spansion(spi, idcode); |
||||
break; |
||||
#endif |
||||
#ifdef CONFIG_SPI_FLASH_ATMEL |
||||
case 0x1F: |
||||
flash = spi_flash_probe_atmel(spi, idcode); |
||||
break; |
||||
#endif |
||||
default: |
||||
debug("SF: Unsupported manufacturer %02X\n", idcode[0]); |
||||
flash = NULL; |
||||
break; |
||||
} |
||||
|
||||
if (!flash) |
||||
goto err_manufacturer_probe; |
||||
|
||||
spi_release_bus(spi); |
||||
|
||||
return flash; |
||||
|
||||
err_manufacturer_probe: |
||||
err_read_id: |
||||
spi_release_bus(spi); |
||||
err_claim_bus: |
||||
spi_free_slave(spi); |
||||
return NULL; |
||||
} |
||||
|
||||
void spi_flash_free(struct spi_flash *flash) |
||||
{ |
||||
spi_free_slave(flash->spi); |
||||
free(flash); |
||||
} |
@ -0,0 +1,45 @@ |
||||
/*
|
||||
* SPI flash internal definitions |
||||
* |
||||
* Copyright (C) 2008 Atmel Corporation |
||||
*/ |
||||
|
||||
/* Common parameters */ |
||||
#define SPI_FLASH_PROG_TIMEOUT ((10 * CFG_HZ) / 1000) |
||||
#define SPI_FLASH_PAGE_ERASE_TIMEOUT ((50 * CFG_HZ) / 1000) |
||||
#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CFG_HZ) |
||||
|
||||
/* Common commands */ |
||||
#define CMD_READ_ID 0x9f |
||||
|
||||
#define CMD_READ_ARRAY_SLOW 0x03 |
||||
#define CMD_READ_ARRAY_FAST 0x0b |
||||
#define CMD_READ_ARRAY_LEGACY 0xe8 |
||||
|
||||
/* Send a single-byte command to the device and read the response */ |
||||
int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); |
||||
|
||||
/*
|
||||
* Send a multi-byte command to the device and read the response. Used |
||||
* for flash array reads, etc. |
||||
*/ |
||||
int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, |
||||
size_t cmd_len, void *data, size_t data_len); |
||||
|
||||
/*
|
||||
* Send a multi-byte command to the device followed by (optional) |
||||
* data. Used for programming the flash array, etc. |
||||
*/ |
||||
int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, |
||||
const void *data, size_t data_len); |
||||
|
||||
/*
|
||||
* Same as spi_flash_cmd_read() except it also claims/releases the SPI |
||||
* bus. Used as common part of the ->read() operation. |
||||
*/ |
||||
int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, |
||||
size_t cmd_len, void *data, size_t data_len); |
||||
|
||||
/* Manufacturer-specific probe functions */ |
||||
struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode); |
||||
struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode); |
@ -0,0 +1,210 @@ |
||||
/*
|
||||
* Copyright (C) 2007 Atmel Corporation |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
#include <common.h> |
||||
#include <spi.h> |
||||
#include <malloc.h> |
||||
|
||||
#include <asm/io.h> |
||||
|
||||
#include <asm/arch/clk.h> |
||||
#include <asm/arch/memory-map.h> |
||||
|
||||
#include "atmel_spi.h" |
||||
|
||||
void spi_init() |
||||
{ |
||||
|
||||
} |
||||
|
||||
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, |
||||
unsigned int max_hz, unsigned int mode) |
||||
{ |
||||
struct atmel_spi_slave *as; |
||||
unsigned int scbr; |
||||
u32 csrx; |
||||
void *regs; |
||||
|
||||
if (cs > 3 || !spi_cs_is_valid(bus, cs)) |
||||
return NULL; |
||||
|
||||
switch (bus) { |
||||
case 0: |
||||
regs = (void *)SPI0_BASE; |
||||
break; |
||||
#ifdef SPI1_BASE |
||||
case 1: |
||||
regs = (void *)SPI1_BASE; |
||||
break; |
||||
#endif |
||||
#ifdef SPI2_BASE |
||||
case 2: |
||||
regs = (void *)SPI2_BASE; |
||||
break; |
||||
#endif |
||||
#ifdef SPI3_BASE |
||||
case 3: |
||||
regs = (void *)SPI3_BASE; |
||||
break; |
||||
#endif |
||||
default: |
||||
return NULL; |
||||
} |
||||
|
||||
|
||||
scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz; |
||||
if (scbr > ATMEL_SPI_CSRx_SCBR_MAX) |
||||
/* Too low max SCK rate */ |
||||
return NULL; |
||||
if (scbr < 1) |
||||
scbr = 1; |
||||
|
||||
csrx = ATMEL_SPI_CSRx_SCBR(scbr); |
||||
csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8); |
||||
if (!(mode & SPI_CPHA)) |
||||
csrx |= ATMEL_SPI_CSRx_NCPHA; |
||||
if (mode & SPI_CPOL) |
||||
csrx |= ATMEL_SPI_CSRx_CPOL; |
||||
|
||||
as = malloc(sizeof(struct atmel_spi_slave)); |
||||
if (!as) |
||||
return NULL; |
||||
|
||||
as->slave.bus = bus; |
||||
as->slave.cs = cs; |
||||
as->regs = regs; |
||||
as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS |
||||
| ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf); |
||||
spi_writel(as, CSR(cs), csrx); |
||||
|
||||
return &as->slave; |
||||
} |
||||
|
||||
void spi_free_slave(struct spi_slave *slave) |
||||
{ |
||||
struct atmel_spi_slave *as = to_atmel_spi(slave); |
||||
|
||||
free(as); |
||||
} |
||||
|
||||
int spi_claim_bus(struct spi_slave *slave) |
||||
{ |
||||
struct atmel_spi_slave *as = to_atmel_spi(slave); |
||||
|
||||
/* Enable the SPI hardware */ |
||||
spi_writel(as, CR, ATMEL_SPI_CR_SPIEN); |
||||
|
||||
/*
|
||||
* Select the slave. This should set SCK to the correct |
||||
* initial state, etc. |
||||
*/ |
||||
spi_writel(as, MR, as->mr); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
void spi_release_bus(struct spi_slave *slave) |
||||
{ |
||||
struct atmel_spi_slave *as = to_atmel_spi(slave); |
||||
|
||||
/* Disable the SPI hardware */ |
||||
spi_writel(as, CR, ATMEL_SPI_CR_SPIDIS); |
||||
} |
||||
|
||||
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, |
||||
const void *dout, void *din, unsigned long flags) |
||||
{ |
||||
struct atmel_spi_slave *as = to_atmel_spi(slave); |
||||
unsigned int len_tx; |
||||
unsigned int len_rx; |
||||
unsigned int len; |
||||
int ret; |
||||
u32 status; |
||||
const u8 *txp = dout; |
||||
u8 *rxp = din; |
||||
u8 value; |
||||
|
||||
ret = 0; |
||||
if (bitlen == 0) |
||||
/* Finish any previously submitted transfers */ |
||||
goto out; |
||||
|
||||
/*
|
||||
* TODO: The controller can do non-multiple-of-8 bit |
||||
* transfers, but this driver currently doesn't support it. |
||||
* |
||||
* It's also not clear how such transfers are supposed to be |
||||
* represented as a stream of bytes...this is a limitation of |
||||
* the current SPI interface. |
||||
*/ |
||||
if (bitlen % 8) { |
||||
/* Errors always terminate an ongoing transfer */ |
||||
flags |= SPI_XFER_END; |
||||
goto out; |
||||
} |
||||
|
||||
len = bitlen / 8; |
||||
|
||||
/*
|
||||
* The controller can do automatic CS control, but it is |
||||
* somewhat quirky, and it doesn't really buy us much anyway |
||||
* in the context of U-Boot. |
||||
*/ |
||||
if (flags & SPI_XFER_BEGIN) |
||||
spi_cs_activate(slave); |
||||
|
||||
for (len_tx = 0, len_rx = 0; len_rx < len; ) { |
||||
status = spi_readl(as, SR); |
||||
|
||||
if (status & ATMEL_SPI_SR_OVRES) |
||||
return -1; |
||||
|
||||
if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) { |
||||
if (txp) |
||||
value = *txp++; |
||||
else |
||||
value = 0; |
||||
spi_writel(as, TDR, value); |
||||
len_tx++; |
||||
} |
||||
if (status & ATMEL_SPI_SR_RDRF) { |
||||
value = spi_readl(as, RDR); |
||||
if (rxp) |
||||
*rxp++ = value; |
||||
len_rx++; |
||||
} |
||||
} |
||||
|
||||
out: |
||||
if (flags & SPI_XFER_END) { |
||||
/*
|
||||
* Wait until the transfer is completely done before |
||||
* we deactivate CS. |
||||
*/ |
||||
do { |
||||
status = spi_readl(as, SR); |
||||
} while (!(status & ATMEL_SPI_SR_TXEMPTY)); |
||||
|
||||
spi_cs_deactivate(slave); |
||||
} |
||||
|
||||
return 0; |
||||
} |
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Reference in new issue