@ -77,6 +77,8 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8
{
struct nand_chip * this = mtd - > priv ;
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT ;
void ( * hwctrl ) ( struct mtd_info * mtd , int cmd ,
unsigned int ctrl ) = this - > cmd_ctrl ;
if ( this - > dev_ready )
while ( ! this - > dev_ready ( mtd ) )
@ -95,25 +97,25 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8
offs > > = 1 ;
/* Begin command latch cycle */
this - > cmd_ ctrl( mtd , cmd , NAND_CTRL_CLE | NAND_CTRL_CHANGE ) ;
hw ctrl( mtd , cmd , NAND_CTRL_CLE | NAND_CTRL_CHANGE ) ;
/* Set ALE and clear CLE to start address cycle */
/* Column address */
this - > cmd_ ctrl( mtd , offs & 0xff ,
hw ctrl( mtd , offs & 0xff ,
NAND_CTRL_ALE | NAND_CTRL_CHANGE ) ; /* A[7:0] */
this - > cmd_ ctrl( mtd , ( offs > > 8 ) & 0xff , NAND_CTRL_ALE ) ; /* A[11:9] */
hw ctrl( mtd , ( offs > > 8 ) & 0xff , NAND_CTRL_ALE ) ; /* A[11:9] */
/* Row address */
this - > cmd_ ctrl( mtd , ( page_addr & 0xff ) , NAND_CTRL_ALE ) ; /* A[19:12] */
this - > cmd_ ctrl( mtd , ( ( page_addr > > 8 ) & 0xff ) ,
hw ctrl( mtd , ( page_addr & 0xff ) , NAND_CTRL_ALE ) ; /* A[19:12] */
hw ctrl( mtd , ( ( page_addr > > 8 ) & 0xff ) ,
NAND_CTRL_ALE ) ; /* A[27:20] */
# ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
/* One more address cycle for devices > 128MiB */
this - > cmd_ ctrl( mtd , ( page_addr > > 16 ) & 0x0f ,
hw ctrl( mtd , ( page_addr > > 16 ) & 0x0f ,
NAND_CTRL_ALE ) ; /* A[31:28] */
# endif
/* Latch in address */
this - > cmd_ ctrl( mtd , NAND_CMD_READSTART ,
hw ctrl( mtd , NAND_CMD_READSTART ,
NAND_CTRL_CLE | NAND_CTRL_CHANGE ) ;
this - > cmd_ ctrl( mtd , NAND_CMD_NONE , NAND_NCE | NAND_CTRL_CHANGE ) ;
hw ctrl( mtd , NAND_CMD_NONE , NAND_NCE | NAND_CTRL_CHANGE ) ;
/*
* Wait a while for the data to be ready