dm: ls1021a: dts: Add QSPI dts node

Add QSPI controller dts node in ls1021a.dtsi.
Add QSPI slave device dts node in ls1021a-twr.dts and ls1021a-qds.dts.

Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>

arch/arm/dts/ls1021a-qds.dts

@@ -18,6 +18,7 @@
 		enet2_rgmii_phy = &rgmii_phy3;
 		enet0_sgmii_phy = &sgmii_phy1c;
 		enet1_sgmii_phy = &sgmii_phy1d;
+		spi0 = &qspi;
 		spi1 = &dspi0;
 	};
 };
@@ -37,6 +38,19 @@
 	};
 };
 
+&qspi {
+	bus-num = <0>;
+	status = "okay";
+
+	qflash0: s25fl128s@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-flash";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+	};
+};
+
 &i2c0 {
 	status = "okay";
 

arch/arm/dts/ls1021a-twr.dts

@@ -16,6 +16,20 @@
 		enet2_rgmii_phy = &rgmii_phy1;
 		enet0_sgmii_phy = &sgmii_phy2;
 		enet1_sgmii_phy = &sgmii_phy0;
+		spi0 = &qspi;
+	};
+};
+
+&qspi {
+	bus-num = <0>;
+	status = "okay";
+
+	qflash0: n25q128a13@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-flash";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
 	};
 };
 

arch/arm/dts/ls1021a.dtsi

@@ -170,6 +170,17 @@
 			status = "disabled";
 		};
 
+		qspi: quadspi@1550000 {
+			compatible = "fsl,vf610-qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x1550000 0x10000>,
+				<0x40000000 0x4000000>;
+			num-cs = <2>;
+			big-endian;
+			status = "disabled";
+		};
+
 		i2c0: i2c@2180000 {
 			compatible = "fsl,vf610-i2c";
 			#address-cells = <1>;