Add the ability for modules from the Schindler cm5200 family to use a single U-Boot image: - rename cm1_qp1 to cm5200 - add run-time module detection - parametrize SDRAM configuration according to the module we are running on Few minor, board-specific fixes included in this patch: - better MAC address handling - updated default environment ('update' command uses +{filesize} now) - improved error messages in the auto-update code - allow booting U-Boot from RAM (CFG_RAMBOOT) Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>master
parent
b1b54e3520
commit
86b116b1b1
@ -1,222 +0,0 @@ |
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/*
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* (C) Copyright 2003-2007 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* (C) Copyright 2004 |
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. |
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* |
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* (C) Copyright 2004-2005 |
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* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <mpc5xxx.h> |
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#include <pci.h> |
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#include <asm/processor.h> |
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#include <i2c.h> |
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#ifdef CONFIG_OF_FLAT_TREE |
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#include <ft_build.h> |
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#endif /* CONFIG_OF_FLAT_TREE */ |
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#include "fwupdate.h" |
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#ifndef CFG_RAMBOOT |
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/*
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* Helper function to initialize SDRAM controller. |
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*/ |
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static void sdram_start(int hi_addr) |
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{ |
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long hi_addr_bit = hi_addr ? 0x01000000 : 0; |
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/* unlock mode register */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | |
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hi_addr_bit; |
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|
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/* precharge all banks */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | |
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hi_addr_bit; |
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/* auto refresh */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | |
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hi_addr_bit; |
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/* auto refresh, second time */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | |
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hi_addr_bit; |
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/* set mode register */ |
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*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE; |
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/* normal operation */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit; |
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} |
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#endif /* CFG_RAMBOOT */ |
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/*
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* Initalize SDRAM - configure SDRAM controller, detect memory size. |
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*/ |
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long int initdram(int board_type) |
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{ |
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ulong dramsize = 0; |
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#ifndef CFG_RAMBOOT |
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ulong test1, test2; |
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|
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/* configure SDRAM start/end for detection */ |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ |
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/* setup config registers */ |
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*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; |
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*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; |
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sdram_start(0); |
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test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); |
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sdram_start(1); |
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test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); |
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if (test1 > test2) { |
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sdram_start(0); |
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dramsize = test1; |
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} else |
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dramsize = test2; |
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/* memory smaller than 1MB is impossible */ |
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if (dramsize < (1 << 20)) |
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dramsize = 0; |
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/* set SDRAM CS0 size according to the amount of RAM found */ |
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if (dramsize > 0) { |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + |
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__builtin_ffs(dramsize >> 20) - 1; |
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} else |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */ |
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#else /* CFG_RAMBOOT */ |
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/* retrieve size of memory connected to SDRAM CS0 */ |
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dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; |
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if (dramsize >= 0x13) |
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dramsize = (1 << (dramsize - 0x13)) << 20; |
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else |
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dramsize = 0; |
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#endif /* CFG_RAMBOOT */ |
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|
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/*
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* On MPC5200B we need to set the special configuration delay in the |
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* DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of |
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* the MPC5200B User's Manual. |
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*/ |
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*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; |
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__asm__ volatile ("sync"); |
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return dramsize; |
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} |
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int checkboard(void) |
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{ |
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puts("Board: CM1.QP1\n"); |
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return 0; |
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} |
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int board_early_init_r(void) |
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{ |
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/*
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* Now, when we are in RAM, enable flash write access for detection |
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* process. Note that CS_BOOT cannot be cleared when executing in |
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* flash. |
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*/ |
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*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ |
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return 0; |
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} |
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#ifdef CONFIG_POST |
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int post_hotkeys_pressed(void) |
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{ |
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return 0; |
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} |
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#endif /* CONFIG_POST */ |
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#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) |
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void post_word_store(ulong a) |
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{ |
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vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); |
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*save_addr = a; |
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} |
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ulong post_word_load(void) |
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{ |
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vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); |
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return *save_addr; |
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} |
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#endif /* CONFIG_POST || CONFIG_LOGBUFFER */ |
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#ifdef CONFIG_MISC_INIT_R |
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int misc_init_r(void) |
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{ |
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) |
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uchar buf[6]; |
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char str[18]; |
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/* Read ethaddr from EEPROM */ |
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if (i2c_read(CFG_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) { |
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sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X", |
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buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]); |
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/* Check if MAC addr is owned by Schindler */ |
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if (strstr(str, "00:06:C3") != str) { |
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printf(LOG_PREFIX "Warning - Illegal MAC address (%s)" |
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" in EEPROM.\n", str); |
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printf(LOG_PREFIX "Using MAC from environment\n"); |
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} else { |
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printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n", |
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str); |
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setenv("ethaddr", str); |
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} |
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} else { |
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printf(LOG_PREFIX "Warning - Unable to read MAC from I2C" |
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" device at address %02X:%04X\n", CFG_I2C_EEPROM, |
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CONFIG_MAC_OFFSET); |
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printf(LOG_PREFIX "Using MAC from environment\n"); |
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} |
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return 0; |
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#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */ |
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} |
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#endif /* CONFIG_MISC_INIT_R */ |
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#ifdef CONFIG_LAST_STAGE_INIT |
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int last_stage_init(void) |
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{ |
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#ifdef CONFIG_USB_STORAGE |
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cm1_fwupdate(); |
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#endif /* CONFIG_USB_STORAGE */ |
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return 0; |
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} |
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#endif /* CONFIG_LAST_STAGE_INIT */ |
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#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) |
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void ft_board_setup(void *blob, bd_t *bd) |
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{ |
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ft_cpu_setup(blob, bd); |
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} |
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#endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */ |
@ -0,0 +1,425 @@ |
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/*
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* (C) Copyright 2003-2007 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* (C) Copyright 2004 |
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. |
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* |
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* (C) Copyright 2004-2005 |
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* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de |
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* |
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* Adapted to U-Boot 1.2 by: |
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* Bartlomiej Sieka <tur@semihalf.com>: |
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* - HW ID readout from EEPROM |
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* - module detection |
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* Grzegorz Bernacki <gjb@semihalf.com>: |
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* - run-time SDRAM controller configuration |
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* - LIBFDT support |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <mpc5xxx.h> |
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#include <pci.h> |
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#include <asm/processor.h> |
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#include <i2c.h> |
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#include <linux/ctype.h> |
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#ifdef CONFIG_OF_LIBFDT |
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#include <libfdt.h> |
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#include <libfdt_env.h> |
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#include <fdt_support.h> |
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#endif /* CONFIG_OF_LIBFDT */ |
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#include "cm5200.h" |
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#include "fwupdate.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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static hw_id_t hw_id; |
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#ifndef CFG_RAMBOOT |
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/*
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* Helper function to initialize SDRAM controller. |
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*/ |
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static void sdram_start(int hi_addr, mem_conf_t *mem_conf) |
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{ |
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long hi_addr_bit = hi_addr ? 0x01000000 : 0; |
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/* unlock mode register */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000000 | |
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hi_addr_bit; |
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/* precharge all banks */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000002 | |
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hi_addr_bit; |
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/* auto refresh */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 | |
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hi_addr_bit; |
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/* auto refresh, second time */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 | |
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hi_addr_bit; |
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/* set mode register */ |
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*(vu_long *)MPC5XXX_SDRAM_MODE = mem_conf->mode; |
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/* normal operation */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | hi_addr_bit; |
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} |
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#endif /* CFG_RAMBOOT */ |
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/*
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* Retrieve memory configuration for a given module. board_type is the index |
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* in hw_id_list[] corresponding to the module we are executing on; we return |
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* SDRAM controller settings approprate for this module. |
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*/ |
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static mem_conf_t* get_mem_config(int board_type) |
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{ |
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switch(board_type){ |
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case CM1_QA: |
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return memory_config[0]; |
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case CM11_QA: |
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case CMU1_QA: |
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return memory_config[1]; |
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default: |
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printf("ERROR: Unknown module, using a default SDRAM " |
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"configuration - things may not work!!!.\n"); |
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return memory_config[0]; |
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} |
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} |
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/*
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* Initalize SDRAM - configure SDRAM controller, detect memory size. |
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*/ |
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long int initdram(int board_type) |
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{ |
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ulong dramsize = 0; |
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#ifndef CFG_RAMBOOT |
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ulong test1, test2; |
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mem_conf_t *mem_conf; |
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mem_conf = get_mem_config(board_type); |
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/* configure SDRAM start/end for detection */ |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ |
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/* setup config registers */ |
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*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = mem_conf->config1; |
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*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = mem_conf->config2; |
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sdram_start(0, mem_conf); |
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test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); |
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sdram_start(1, mem_conf); |
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test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); |
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if (test1 > test2) { |
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sdram_start(0, mem_conf); |
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dramsize = test1; |
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} else |
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dramsize = test2; |
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/* memory smaller than 1MB is impossible */ |
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if (dramsize < (1 << 20)) |
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dramsize = 0; |
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/* set SDRAM CS0 size according to the amount of RAM found */ |
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if (dramsize > 0) { |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + |
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__builtin_ffs(dramsize >> 20) - 1; |
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} else |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */ |
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#else /* CFG_RAMBOOT */ |
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/* retrieve size of memory connected to SDRAM CS0 */ |
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dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; |
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if (dramsize >= 0x13) |
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dramsize = (1 << (dramsize - 0x13)) << 20; |
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else |
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dramsize = 0; |
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#endif /* !CFG_RAMBOOT */ |
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/*
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* On MPC5200B we need to set the special configuration delay in the |
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* DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of |
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* the MPC5200B User's Manual. |
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*/ |
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*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; |
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__asm__ volatile ("sync"); |
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return dramsize; |
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} |
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/*
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* Read module hardware identification data from the I2C EEPROM. |
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*/ |
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static void read_hw_id(hw_id_t hw_id) |
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{ |
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int i; |
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for (i = 0; i < HW_ID_ELEM_COUNT; ++i) |
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if (i2c_read(CFG_I2C_EEPROM, |
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hw_id_format[i].offset, |
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2, |
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(uchar *)&hw_id[i][0], |
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hw_id_format[i].length) != 0) |
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printf("ERROR: can't read HW ID from EEPROM\n"); |
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} |
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/*
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* Identify module we are running on, set gd->board_type to the index in |
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* hw_id_list[] corresponding to the module identifed, or to |
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* CM5200_UNKNOWN_MODULE if we can't identify the module. |
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*/ |
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static void identify_module(hw_id_t hw_id) |
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{ |
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int i, j, element; |
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char match; |
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gd->board_type = CM5200_UNKNOWN_MODULE; |
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for (i = 0; i < sizeof (hw_id_list) / sizeof (char **); ++i) { |
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match = 1; |
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for (j = 0; j < sizeof (hw_id_identify) / sizeof (int); ++j) { |
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element = hw_id_identify[j]; |
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if (strncmp(hw_id_list[i][element], |
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&hw_id[element][0], |
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hw_id_format[element].length) != 0) { |
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match = 0; |
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break; |
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} |
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} |
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if (match) { |
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gd->board_type = i; |
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break; |
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} |
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} |
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} |
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/*
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* Compose string with module name. |
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* buf is assumed to have enough space, and be null-terminated. |
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*/ |
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static void compose_module_name(hw_id_t hw_id, char *buf) |
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{ |
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char tmp[MODULE_NAME_MAXLEN]; |
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strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length); |
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strncat(buf, ".", 1); |
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strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length); |
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strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length); |
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strncat(buf, " (", 2); |
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strncat(buf, &hw_id[IDENTIFICATION_NUMBER][0], |
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hw_id_format[IDENTIFICATION_NUMBER].length); |
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sprintf(tmp, " / %u.%u)", |
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hw_id[MAJOR_SW_VERSION][0], |
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hw_id[MINOR_SW_VERSION][0]); |
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strcat(buf, tmp); |
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} |
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/*
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* Compose string with hostname. |
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* buf is assumed to have enough space, and be null-terminated. |
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*/ |
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static void compose_hostname(hw_id_t hw_id, char *buf) |
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{ |
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char *p; |
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strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length); |
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strncat(buf, "_", 1); |
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strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length); |
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strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length); |
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for (p = buf; *p; ++p) |
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*p = tolower(*p); |
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} |
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#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) |
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/*
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* Update 'model' and 'memory' properties in the blob according to the module |
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* that we are running on. |
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*/ |
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static void ft_blob_update(void *blob, bd_t *bd) |
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{ |
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int len, ret, nodeoffset = 0; |
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char module_name[MODULE_NAME_MAXLEN] = {0}; |
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ulong memory_data[2] = {0}; |
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compose_module_name(hw_id, module_name); |
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len = strlen(module_name) + 1; |
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ret = fdt_setprop(blob, nodeoffset, "model", module_name, len); |
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if (ret < 0) |
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printf("ft_blob_update(): cannot set /model property err:%s\n", |
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fdt_strerror(ret)); |
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memory_data[0] = cpu_to_be32(bd->bi_memstart); |
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memory_data[1] = cpu_to_be32(bd->bi_memsize); |
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|
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nodeoffset = fdt_find_node_by_path (blob, "/memory"); |
||||
if (nodeoffset >= 0) { |
||||
ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, |
||||
sizeof(memory_data)); |
||||
if (ret < 0) |
||||
printf("ft_blob_update): cannot set /memory/reg " |
||||
"property err:%s\n", fdt_strerror(ret)); |
||||
} |
||||
else { |
||||
/* memory node is required in dts */ |
||||
printf("ft_blob_update(): cannot find /memory node " |
||||
"err:%s\n", fdt_strerror(nodeoffset)); |
||||
} |
||||
} |
||||
#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ |
||||
|
||||
|
||||
/*
|
||||
* Read HW ID from I2C EEPROM and detect the modue we are running on. Note |
||||
* that we need to use local variable for readout, because global data is not |
||||
* writable yet (and we'll have to redo the readout later on). |
||||
*/ |
||||
int checkboard(void) |
||||
{ |
||||
hw_id_t hw_id_tmp; |
||||
char module_name_tmp[MODULE_NAME_MAXLEN] = ""; |
||||
|
||||
/*
|
||||
* We need I2C to access HW ID data from EEPROM, so we call i2c_init() |
||||
* here despite the fact that it will be called again later on. We |
||||
* also use a little trick to silence I2C-related output. |
||||
*/ |
||||
gd->flags |= GD_FLG_SILENT; |
||||
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); |
||||
gd->flags &= ~GD_FLG_SILENT; |
||||
|
||||
read_hw_id(hw_id_tmp); |
||||
identify_module(hw_id_tmp); /* this sets gd->board_type */ |
||||
compose_module_name(hw_id_tmp, module_name_tmp); |
||||
|
||||
if (gd->board_type != CM5200_UNKNOWN_MODULE) |
||||
printf("Board: %s\n", module_name_tmp); |
||||
else |
||||
printf("Board: unrecognized cm5200 module (%s)\n", |
||||
module_name_tmp); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
|
||||
int board_early_init_r(void) |
||||
{ |
||||
/*
|
||||
* Now, when we are in RAM, enable flash write access for detection |
||||
* process. Note that CS_BOOT cannot be cleared when executing in |
||||
* flash. |
||||
*/ |
||||
*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ |
||||
|
||||
/* Now that we can write to global data, read HW ID again. */ |
||||
read_hw_id(hw_id); |
||||
return 0; |
||||
} |
||||
|
||||
|
||||
#ifdef CONFIG_POST |
||||
int post_hotkeys_pressed(void) |
||||
{ |
||||
return 0; |
||||
} |
||||
#endif /* CONFIG_POST */ |
||||
|
||||
|
||||
#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) |
||||
void post_word_store(ulong a) |
||||
{ |
||||
vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); |
||||
*save_addr = a; |
||||
} |
||||
|
||||
|
||||
ulong post_word_load(void) |
||||
{ |
||||
vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); |
||||
return *save_addr; |
||||
} |
||||
#endif /* CONFIG_POST || CONFIG_LOGBUFFER */ |
||||
|
||||
|
||||
#ifdef CONFIG_MISC_INIT_R |
||||
int misc_init_r(void) |
||||
{ |
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) |
||||
uchar buf[6]; |
||||
char str[18]; |
||||
char hostname[MODULE_NAME_MAXLEN]; |
||||
|
||||
/* Read ethaddr from EEPROM */ |
||||
if (i2c_read(CFG_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) { |
||||
sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X", |
||||
buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]); |
||||
/* Check if MAC addr is owned by Schindler */ |
||||
if (strstr(str, "00:06:C3") != str) |
||||
printf(LOG_PREFIX "Warning - Illegal MAC address (%s)" |
||||
" in EEPROM.\n", str); |
||||
else { |
||||
printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n", |
||||
str); |
||||
setenv("ethaddr", str); |
||||
} |
||||
} else { |
||||
printf(LOG_PREFIX "Warning - Unable to read MAC from I2C" |
||||
" device at address %02X:%04X\n", CFG_I2C_EEPROM, |
||||
CONFIG_MAC_OFFSET); |
||||
} |
||||
#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */ |
||||
if (!getenv("ethaddr")) |
||||
printf(LOG_PREFIX "MAC address not set, networking is not " |
||||
"operational\n"); |
||||
|
||||
/* set the hostname appropriate to the module we're running on */ |
||||
compose_hostname(hw_id, hostname); |
||||
setenv("hostname", hostname); |
||||
|
||||
return 0; |
||||
} |
||||
#endif /* CONFIG_MISC_INIT_R */ |
||||
|
||||
|
||||
#ifdef CONFIG_LAST_STAGE_INIT |
||||
int last_stage_init(void) |
||||
{ |
||||
#ifdef CONFIG_USB_STORAGE |
||||
cm5200_fwupdate(); |
||||
#endif /* CONFIG_USB_STORAGE */ |
||||
return 0; |
||||
} |
||||
#endif /* CONFIG_LAST_STAGE_INIT */ |
||||
|
||||
|
||||
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
||||
void ft_board_setup(void *blob, bd_t *bd) |
||||
{ |
||||
ft_cpu_setup(blob, bd); |
||||
ft_blob_update(blob, bd); |
||||
} |
||||
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ |
@ -0,0 +1,184 @@ |
||||
/*
|
||||
* (C) Copyright 2007 DENX Software Engineering |
||||
* |
||||
* Author: Bartlomiej Sieka <tur@semihalf.com> |
||||
* Author: Grzegorz Bernacki <gjb@semihalf.com> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef _CM5200_H |
||||
#define _CM5200_H |
||||
|
||||
|
||||
/*
|
||||
* Definitions and declarations for the modules of the cm5200 platform. Mostly |
||||
* related to reading the hardware identification data (HW ID) from the I2C |
||||
* EEPROM, detection of the particular module we are executing on, and |
||||
* appropriate SDRAM controller initialization. |
||||
*/ |
||||
|
||||
|
||||
#define CM5200_UNKNOWN_MODULE 0xffffffff |
||||
|
||||
enum { |
||||
DEVICE_NAME, /* 0 */ |
||||
GENERATION, /* 1 */ |
||||
PCB_NAME, /* 2 */ |
||||
FORM, /* 3 */ |
||||
VERSION, /* 4 */ |
||||
IDENTIFICATION_NUMBER, /* 5 */ |
||||
MAJOR_SW_VERSION, /* 6 */ |
||||
MINOR_SW_VERSION, /* 7 */ |
||||
/* add new alements above this line */ |
||||
HW_ID_ELEM_COUNT /* count */ |
||||
}; |
||||
|
||||
/*
|
||||
* Sect. 4.1 "CM1.Q/CMU1.Q Supervisory Microcontroller Interface Definition" |
||||
*/ |
||||
|
||||
#define DEVICE_NAME_OFFSET 0x02 |
||||
#define GENERATION_OFFSET 0x0b |
||||
#define PCB_NAME_OFFSET 0x0c |
||||
#define FORM_OFFSET 0x15 |
||||
#define VERSION_OFFSET 0x16 |
||||
#define IDENTIFICATION_NUMBER_OFFSET 0x19 |
||||
#define MAJOR_SW_VERSION_OFFSET 0x0480 |
||||
#define MINOR_SW_VERSION_OFFSET 0x0481 |
||||
|
||||
|
||||
#define DEVICE_NAME_LEN 0x09 |
||||
#define GENERATION_LEN 0x01 |
||||
#define PCB_NAME_LEN 0x09 |
||||
#define FORM_LEN 0x01 |
||||
#define VERSION_LEN 0x03 |
||||
#define IDENTIFICATION_NUMBER_LEN 0x09 |
||||
#define MAJOR_SW_VERSION_LEN 0x01 |
||||
#define MINOR_SW_VERSION_LEN 0x01 |
||||
|
||||
#define HW_ID_ELEM_MAXLEN 0x09 /* MAX(XXX_LEN) */ |
||||
|
||||
/* entire HW ID in EEPROM is 64 bytes, so longer module name is unlikely */ |
||||
#define MODULE_NAME_MAXLEN 64 |
||||
|
||||
|
||||
/* storage for HW ID read from EEPROM */ |
||||
typedef char hw_id_t[HW_ID_ELEM_COUNT][HW_ID_ELEM_MAXLEN]; |
||||
|
||||
|
||||
/* HW ID layout in EEPROM */ |
||||
static struct { |
||||
unsigned int offset; |
||||
unsigned int length; |
||||
} hw_id_format[HW_ID_ELEM_COUNT] = { |
||||
{DEVICE_NAME_OFFSET, DEVICE_NAME_LEN}, |
||||
{GENERATION_OFFSET, GENERATION_LEN}, |
||||
{PCB_NAME_OFFSET, PCB_NAME_LEN}, |
||||
{FORM_OFFSET, FORM_LEN}, |
||||
{VERSION_OFFSET, VERSION_LEN}, |
||||
{IDENTIFICATION_NUMBER_OFFSET, IDENTIFICATION_NUMBER_LEN}, |
||||
{MAJOR_SW_VERSION_OFFSET, MAJOR_SW_VERSION_LEN}, |
||||
{MINOR_SW_VERSION_OFFSET, MINOR_SW_VERSION_LEN}, |
||||
}; |
||||
|
||||
|
||||
/* HW ID data found in EEPROM on supported modules */ |
||||
static char *cm1_qa_hw_id[HW_ID_ELEM_COUNT] = { |
||||
"CM", /* DEVICE_NAME */ |
||||
"1", /* GENERATION */ |
||||
"CM1", /* PCB_NAME */ |
||||
"Q", /* FORM */ |
||||
"A", /* VERSION */ |
||||
"591881", /* IDENTIFICATION_NUMBER */ |
||||
"", /* MAJOR_SW_VERSION */ |
||||
"", /* MINOR_SW_VERSION */ |
||||
}; |
||||
|
||||
static char *cm11_qa_hw_id[HW_ID_ELEM_COUNT] = { |
||||
"CM", /* DEVICE_NAME */ |
||||
"1", /* GENERATION */ |
||||
"CM11", /* PCB_NAME */ |
||||
"Q", /* FORM */ |
||||
"A", /* VERSION */ |
||||
"594200", /* IDENTIFICATION_NUMBER */ |
||||
"", /* MAJOR_SW_VERSION */ |
||||
"", /* MINOR_SW_VERSION */ |
||||
}; |
||||
|
||||
static char *cmu1_qa_hw_id[HW_ID_ELEM_COUNT] = { |
||||
"CMU", /* DEVICE_NAME */ |
||||
"1", /* GENERATION */ |
||||
"CMU1", /* PCB_NAME */ |
||||
"Q", /* FORM */ |
||||
"A", /* VERSION */ |
||||
"594128", /* IDENTIFICATION_NUMBER */ |
||||
"", /* MAJOR_SW_VERSION */ |
||||
"", /* MINOR_SW_VERSION */ |
||||
}; |
||||
|
||||
|
||||
/* list of known modules */ |
||||
static char **hw_id_list[] = { |
||||
cm1_qa_hw_id, |
||||
cm11_qa_hw_id, |
||||
cmu1_qa_hw_id, |
||||
}; |
||||
|
||||
/* indices to the above list - keep in sync */
|
||||
enum { |
||||
CM1_QA, |
||||
CM11_QA, |
||||
CMU1_QA, |
||||
}; |
||||
|
||||
|
||||
/* identify modules based on these hw id elements */ |
||||
static int hw_id_identify[] = { |
||||
PCB_NAME, |
||||
FORM, |
||||
VERSION, |
||||
}; |
||||
|
||||
|
||||
/* Registers' settings for SDRAM controller intialization */ |
||||
typedef struct { |
||||
ulong mode; |
||||
ulong control; |
||||
ulong config1; |
||||
ulong config2; |
||||
} mem_conf_t; |
||||
|
||||
static mem_conf_t k4s561632E = { |
||||
0x00CD0000, /* CASL 3, burst length 8 */ |
||||
0x514F0000, |
||||
0xE2333900, |
||||
0x8EE70000 |
||||
}; |
||||
|
||||
static mem_conf_t mt48lc32m16a2 = { |
||||
0x00CD0000, /* CASL 3, burst length 8 */ |
||||
0x514F0000, |
||||
0xD2322800, |
||||
0x8AD70000 |
||||
}; |
||||
|
||||
static mem_conf_t* memory_config[] = { |
||||
&k4s561632E, |
||||
&mt48lc32m16a2 |
||||
}; |
||||
|
||||
#endif /* _CM5200_H */ |
@ -1,5 +1,7 @@ |
||||
/*
|
||||
* (C) Copyright 2007 Markus Kappeler <markus.kappeler@objectxp.com> |
||||
* (C) Copyright 2007 Markus Kappeler <markus.kappeler@objectxp.com> |
||||
* |
||||
* Adapted for U-Boot 1.2 by Piotr Kruszynski <ppk@semihalf.com>
|
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
Loading…
Reference in new issue