@ -114,12 +114,13 @@ static int e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr,
static int32_t e1000_phy_hw_reset ( struct e1000_hw * hw ) ;
static int e1000_phy_reset ( struct e1000_hw * hw ) ;
static int e1000_detect_gig_phy ( struct e1000_hw * hw ) ;
static void e1000_put_hw_eeprom_semaphore ( struct e1000_hw * hw ) ;
static void e1000_set_media_type ( struct e1000_hw * hw ) ;
static int32_t e1000_swfw_sync_acquire ( struct e1000_hw * hw , uint16_t mask ) ;
static int32_t e1000_check_phy_reset_block ( struct e1000_hw * hw ) ;
# ifndef CONFIG_E1000_NO_NVM
static void e1000_put_hw_eeprom_semaphore ( struct e1000_hw * hw ) ;
static int32_t e1000_read_eeprom ( struct e1000_hw * hw , uint16_t offset ,
uint16_t words ,
uint16_t * data ) ;
@ -885,6 +886,7 @@ static int e1000_validate_eeprom_checksum(struct e1000_hw *hw)
return - E1000_ERR_EEPROM ;
}
# endif /* CONFIG_E1000_NO_NVM */
/*****************************************************************************
* Set PHY to class A mode
@ -897,6 +899,7 @@ static int e1000_validate_eeprom_checksum(struct e1000_hw *hw)
static int32_t
e1000_set_phy_mode ( struct e1000_hw * hw )
{
# ifndef CONFIG_E1000_NO_NVM
int32_t ret_val ;
uint16_t eeprom_data ;
@ -923,10 +926,11 @@ e1000_set_phy_mode(struct e1000_hw *hw)
hw - > phy_reset_disable = false ;
}
}
# endif
return E1000_SUCCESS ;
}
# ifndef CONFIG_E1000_NO_NVM
/***************************************************************************
*
* Obtaining software semaphore bit ( SMBI ) before resetting PHY .
@ -965,6 +969,7 @@ e1000_get_software_semaphore(struct e1000_hw *hw)
return E1000_SUCCESS ;
}
# endif
/***************************************************************************
* This function clears HW semaphore bits .
@ -977,6 +982,7 @@ e1000_get_software_semaphore(struct e1000_hw *hw)
static void
e1000_put_hw_eeprom_semaphore ( struct e1000_hw * hw )
{
# ifndef CONFIG_E1000_NO_NVM
uint32_t swsm ;
DEBUGFUNC ( ) ;
@ -991,6 +997,7 @@ e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw)
} else
swsm & = ~ ( E1000_SWSM_SWESMBI ) ;
E1000_WRITE_REG ( hw , SWSM , swsm ) ;
# endif
}
/***************************************************************************
@ -1007,6 +1014,7 @@ e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw)
static int32_t
e1000_get_hw_eeprom_semaphore ( struct e1000_hw * hw )
{
# ifndef CONFIG_E1000_NO_NVM
int32_t timeout ;
uint32_t swsm ;
@ -1043,7 +1051,7 @@ e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw)
" SWESMBI bit is set. \n " ) ;
return - E1000_ERR_EEPROM ;
}
# endif
return E1000_SUCCESS ;
}
@ -1097,6 +1105,7 @@ static bool e1000_is_second_port(struct e1000_hw *hw)
}
}
# ifndef CONFIG_E1000_NO_NVM
/******************************************************************************
* Reads the adapter ' s MAC address from the EEPROM and inverts the LSB for the
* second function of dual function devices
@ -1136,6 +1145,7 @@ e1000_read_mac_addr(struct eth_device *nic)
# endif
return 0 ;
}
# endif
/******************************************************************************
* Initializes receive address filters .
@ -1764,9 +1774,11 @@ static int
e1000_setup_link ( struct eth_device * nic )
{
struct e1000_hw * hw = nic - > priv ;
uint32_t ctrl_ext ;
int32_t ret_val ;
# ifndef CONFIG_E1000_NO_NVM
uint32_t ctrl_ext ;
uint16_t eeprom_data ;
# endif
DEBUGFUNC ( ) ;
@ -1775,6 +1787,7 @@ e1000_setup_link(struct eth_device *nic)
if ( e1000_check_phy_reset_block ( hw ) )
return E1000_SUCCESS ;
# ifndef CONFIG_E1000_NO_NVM
/* Read and store word 0x0F of the EEPROM. This word contains bits
* that determine the hardware ' s default PAUSE ( flow control ) mode ,
* a bit that determines whether the HW defaults to enabling or
@ -1788,7 +1801,7 @@ e1000_setup_link(struct eth_device *nic)
DEBUGOUT ( " EEPROM Read Error \n " ) ;
return - E1000_ERR_EEPROM ;
}
# endif
if ( hw - > fc = = e1000_fc_default ) {
switch ( hw - > mac_type ) {
case e1000_ich8lan :
@ -1797,6 +1810,7 @@ e1000_setup_link(struct eth_device *nic)
hw - > fc = e1000_fc_full ;
break ;
default :
# ifndef CONFIG_E1000_NO_NVM
ret_val = e1000_read_eeprom ( hw ,
EEPROM_INIT_CONTROL2_REG , 1 , & eeprom_data ) ;
if ( ret_val ) {
@ -1809,6 +1823,7 @@ e1000_setup_link(struct eth_device *nic)
EEPROM_WORD0F_ASM_DIR )
hw - > fc = e1000_fc_tx_pause ;
else
# endif
hw - > fc = e1000_fc_full ;
break ;
}
@ -1828,6 +1843,7 @@ e1000_setup_link(struct eth_device *nic)
DEBUGOUT ( " After fix-ups FlowControl is now = %x \n " , hw - > fc ) ;
# ifndef CONFIG_E1000_NO_NVM
/* Take the 4 bits from EEPROM word 0x0F that determine the initial
* polarity value for the SW controlled pins , and setup the
* Extended Device Control reg with that info .
@ -1840,6 +1856,7 @@ e1000_setup_link(struct eth_device *nic)
SWDPIO__EXT_SHIFT ) ;
E1000_WRITE_REG ( hw , CTRL_EXT , ctrl_ext ) ;
}
# endif
/* Call the necessary subroutine to configure the link. */
ret_val = ( hw - > media_type = = e1000_media_type_fiber ) ?
@ -5196,6 +5213,7 @@ e1000_initialize(bd_t * bis)
e1000_reset_hw ( hw ) ;
list_add_tail ( & hw - > list_node , & e1000_hw_list ) ;
# ifndef CONFIG_E1000_NO_NVM
/* Validate the EEPROM and get chipset information */
# if !defined(CONFIG_MVBC_1G)
if ( e1000_init_eeprom_params ( hw ) ) {
@ -5206,11 +5224,17 @@ e1000_initialize(bd_t * bis)
continue ;
# endif
e1000_read_mac_addr ( nic ) ;
# endif
e1000_get_bus_type ( hw ) ;
# ifndef CONFIG_E1000_NO_NVM
printf ( " e1000: %02x:%02x:%02x:%02x:%02x:%02x \n " ,
nic - > enetaddr [ 0 ] , nic - > enetaddr [ 1 ] , nic - > enetaddr [ 2 ] ,
nic - > enetaddr [ 3 ] , nic - > enetaddr [ 4 ] , nic - > enetaddr [ 5 ] ) ;
# else
memset ( nic - > enetaddr , 0 , 6 ) ;
printf ( " e1000: no NVM \n " ) ;
# endif
/* Set up the function pointers and register the device */
nic - > init = e1000_init ;