Copy over all the latest dts changes from mripard/sunxi/dt-for-4.2 , this gives us a proper dtsi file for the A33 rather then abusing sun8i-a23.dtsi for this. And this replaces our minimal (dummy) sun7i-a20-mk808c and sun8i-a33-astar-mid756 dts files with proper ones. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>master
Hans de Goede
10 years ago
parent
a52783e11d
commit
8b1ba94151
@ -0,0 +1,626 @@ |
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/* |
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* Copyright 2014 Chen-Yu Tsai |
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* |
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* Chen-Yu Tsai <wens@csie.org> |
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* |
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* This file is dual-licensed: you can use it either under the terms |
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* of the GPL or the X11 license, at your option. Note that this dual |
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* licensing only applies to this file, and not this project as a |
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* whole. |
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* |
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* a) This file is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of the |
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* License, or (at your option) any later version. |
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* |
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* This file is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* Or, alternatively, |
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* |
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* b) Permission is hereby granted, free of charge, to any person |
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* obtaining a copy of this software and associated documentation |
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* files (the "Software"), to deal in the Software without |
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* restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or |
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* sell copies of the Software, and to permit persons to whom the |
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* Software is furnished to do so, subject to the following |
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* conditions: |
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* |
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* The above copyright notice and this permission notice shall be |
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* included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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*/ |
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|
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#include "skeleton.dtsi" |
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|
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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|
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#include <dt-bindings/pinctrl/sun4i-a10.h> |
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|
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/ { |
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interrupt-parent = <&gic>; |
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|
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chosen { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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|
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framebuffer@0 { |
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compatible = "allwinner,simple-framebuffer", |
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"simple-framebuffer"; |
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allwinner,pipeline = "de_be0-lcd0"; |
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clocks = <&pll6 0>; |
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status = "disabled"; |
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}; |
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}; |
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|
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timer { |
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compatible = "arm,armv7-timer"; |
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
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clock-frequency = <24000000>; |
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arm,cpu-registers-not-fw-configured; |
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}; |
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|
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cpus { |
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enable-method = "allwinner,sun8i-a23"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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|
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cpu@0 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <0>; |
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}; |
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|
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cpu@1 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <1>; |
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}; |
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}; |
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|
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clocks { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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|
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osc24M: osc24M_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <24000000>; |
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clock-output-names = "osc24M"; |
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}; |
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|
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osc32k: osc32k_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <32768>; |
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clock-output-names = "osc32k"; |
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}; |
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|
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pll1: clk@01c20000 { |
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#clock-cells = <0>; |
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compatible = "allwinner,sun8i-a23-pll1-clk"; |
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reg = <0x01c20000 0x4>; |
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clocks = <&osc24M>; |
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clock-output-names = "pll1"; |
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}; |
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|
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/* dummy clock until actually implemented */ |
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pll5: pll5_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <0>; |
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clock-output-names = "pll5"; |
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}; |
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|
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pll6: clk@01c20028 { |
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#clock-cells = <1>; |
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compatible = "allwinner,sun6i-a31-pll6-clk"; |
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reg = <0x01c20028 0x4>; |
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clocks = <&osc24M>; |
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clock-output-names = "pll6", "pll6x2"; |
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}; |
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|
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cpu: cpu_clk@01c20050 { |
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#clock-cells = <0>; |
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compatible = "allwinner,sun4i-a10-cpu-clk"; |
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reg = <0x01c20050 0x4>; |
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|
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/* |
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* PLL1 is listed twice here. |
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* While it looks suspicious, it's actually documented |
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* that way both in the datasheet and in the code from |
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* Allwinner. |
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*/ |
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clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>; |
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clock-output-names = "cpu"; |
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}; |
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|
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axi: axi_clk@01c20050 { |
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#clock-cells = <0>; |
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compatible = "allwinner,sun8i-a23-axi-clk"; |
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reg = <0x01c20050 0x4>; |
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clocks = <&cpu>; |
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clock-output-names = "axi"; |
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}; |
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ahb1: ahb1_clk@01c20054 { |
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#clock-cells = <0>; |
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compatible = "allwinner,sun6i-a31-ahb1-clk"; |
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reg = <0x01c20054 0x4>; |
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clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; |
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clock-output-names = "ahb1"; |
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}; |
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apb1: apb1_clk@01c20054 { |
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#clock-cells = <0>; |
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compatible = "allwinner,sun4i-a10-apb0-clk"; |
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reg = <0x01c20054 0x4>; |
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clocks = <&ahb1>; |
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clock-output-names = "apb1"; |
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}; |
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|
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ahb1_gates: clk@01c20060 { |
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#clock-cells = <1>; |
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compatible = "allwinner,sun8i-a23-ahb1-gates-clk"; |
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reg = <0x01c20060 0x8>; |
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clocks = <&ahb1>; |
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clock-output-names = "ahb1_mipidsi", "ahb1_dma", |
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"ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", |
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"ahb1_nand", "ahb1_sdram", |
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"ahb1_hstimer", "ahb1_spi0", |
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"ahb1_spi1", "ahb1_otg", "ahb1_ehci", |
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"ahb1_ohci", "ahb1_ve", "ahb1_lcd", |
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"ahb1_csi", "ahb1_be", "ahb1_fe", |
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"ahb1_gpu", "ahb1_spinlock", |
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"ahb1_drc"; |
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}; |
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apb1_gates: clk@01c20068 { |
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#clock-cells = <1>; |
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compatible = "allwinner,sun8i-a23-apb1-gates-clk"; |
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reg = <0x01c20068 0x4>; |
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clocks = <&apb1>; |
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clock-output-names = "apb1_codec", "apb1_pio", |
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"apb1_daudio0", "apb1_daudio1"; |
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}; |
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apb2: clk@01c20058 { |
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#clock-cells = <0>; |
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compatible = "allwinner,sun4i-a10-apb1-clk"; |
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reg = <0x01c20058 0x4>; |
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clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>; |
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clock-output-names = "apb2"; |
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}; |
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apb2_gates: clk@01c2006c { |
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#clock-cells = <1>; |
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compatible = "allwinner,sun8i-a23-apb2-gates-clk"; |
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reg = <0x01c2006c 0x4>; |
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clocks = <&apb2>; |
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clock-output-names = "apb2_i2c0", "apb2_i2c1", |
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"apb2_i2c2", "apb2_uart0", |
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"apb2_uart1", "apb2_uart2", |
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"apb2_uart3", "apb2_uart4"; |
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}; |
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mmc0_clk: clk@01c20088 { |
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#clock-cells = <1>; |
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compatible = "allwinner,sun4i-a10-mmc-clk"; |
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reg = <0x01c20088 0x4>; |
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clocks = <&osc24M>, <&pll6 0>; |
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clock-output-names = "mmc0", |
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"mmc0_output", |
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"mmc0_sample"; |
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}; |
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mmc1_clk: clk@01c2008c { |
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#clock-cells = <1>; |
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compatible = "allwinner,sun4i-a10-mmc-clk"; |
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reg = <0x01c2008c 0x4>; |
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clocks = <&osc24M>, <&pll6 0>; |
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clock-output-names = "mmc1", |
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"mmc1_output", |
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"mmc1_sample"; |
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}; |
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mmc2_clk: clk@01c20090 { |
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#clock-cells = <1>; |
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compatible = "allwinner,sun4i-a10-mmc-clk"; |
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reg = <0x01c20090 0x4>; |
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clocks = <&osc24M>, <&pll6 0>; |
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clock-output-names = "mmc2", |
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"mmc2_output", |
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"mmc2_sample"; |
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}; |
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usb_clk: clk@01c200cc { |
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#clock-cells = <1>; |
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#reset-cells = <1>; |
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compatible = "allwinner,sun8i-a23-usb-clk"; |
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reg = <0x01c200cc 0x4>; |
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clocks = <&osc24M>; |
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clock-output-names = "usb_phy0", "usb_phy1", "usb_hsic", |
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"usb_hsic_12M", "usb_ohci0"; |
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}; |
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}; |
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soc@01c00000 { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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dma: dma-controller@01c02000 { |
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compatible = "allwinner,sun8i-a23-dma"; |
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reg = <0x01c02000 0x1000>; |
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&ahb1_gates 6>; |
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resets = <&ahb1_rst 6>; |
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#dma-cells = <1>; |
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}; |
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mmc0: mmc@01c0f000 { |
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compatible = "allwinner,sun5i-a13-mmc"; |
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reg = <0x01c0f000 0x1000>; |
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clocks = <&ahb1_gates 8>, |
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<&mmc0_clk 0>, |
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<&mmc0_clk 1>, |
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<&mmc0_clk 2>; |
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clock-names = "ahb", |
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"mmc", |
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"output", |
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"sample"; |
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resets = <&ahb1_rst 8>; |
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reset-names = "ahb"; |
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interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; |
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status = "disabled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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}; |
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mmc1: mmc@01c10000 { |
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compatible = "allwinner,sun5i-a13-mmc"; |
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reg = <0x01c10000 0x1000>; |
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clocks = <&ahb1_gates 9>, |
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<&mmc1_clk 0>, |
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<&mmc1_clk 1>, |
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<&mmc1_clk 2>; |
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clock-names = "ahb", |
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"mmc", |
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"output", |
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"sample"; |
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resets = <&ahb1_rst 9>; |
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reset-names = "ahb"; |
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interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; |
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status = "disabled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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}; |
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mmc2: mmc@01c11000 { |
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compatible = "allwinner,sun5i-a13-mmc"; |
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reg = <0x01c11000 0x1000>; |
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clocks = <&ahb1_gates 10>, |
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<&mmc2_clk 0>, |
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<&mmc2_clk 1>, |
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<&mmc2_clk 2>; |
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clock-names = "ahb", |
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"mmc", |
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"output", |
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"sample"; |
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resets = <&ahb1_rst 10>; |
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reset-names = "ahb"; |
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; |
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status = "disabled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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}; |
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pio: pinctrl@01c20800 { |
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/* compatible gets set in SoC specific dtsi file */ |
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reg = <0x01c20800 0x400>; |
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/* interrupts get set in SoC specific dtsi file */ |
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clocks = <&apb1_gates 5>; |
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gpio-controller; |
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interrupt-controller; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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#gpio-cells = <3>; |
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uart0_pins_a: uart0@0 { |
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allwinner,pins = "PF2", "PF4"; |
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allwinner,function = "uart0"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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mmc0_pins_a: mmc0@0 { |
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allwinner,pins = "PF0", "PF1", "PF2", |
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"PF3", "PF4", "PF5"; |
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allwinner,function = "mmc0"; |
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allwinner,drive = <SUN4I_PINCTRL_30_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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mmc1_pins_a: mmc1@0 { |
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allwinner,pins = "PG0", "PG1", "PG2", |
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"PG3", "PG4", "PG5"; |
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allwinner,function = "mmc1"; |
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allwinner,drive = <SUN4I_PINCTRL_30_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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i2c0_pins_a: i2c0@0 { |
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allwinner,pins = "PH2", "PH3"; |
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allwinner,function = "i2c0"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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i2c1_pins_a: i2c1@0 { |
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allwinner,pins = "PH4", "PH5"; |
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allwinner,function = "i2c1"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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i2c2_pins_a: i2c2@0 { |
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allwinner,pins = "PE12", "PE13"; |
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allwinner,function = "i2c2"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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}; |
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ahb1_rst: reset@01c202c0 { |
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#reset-cells = <1>; |
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compatible = "allwinner,sun6i-a31-clock-reset"; |
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reg = <0x01c202c0 0xc>; |
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}; |
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apb1_rst: reset@01c202d0 { |
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#reset-cells = <1>; |
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compatible = "allwinner,sun6i-a31-clock-reset"; |
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reg = <0x01c202d0 0x4>; |
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}; |
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apb2_rst: reset@01c202d8 { |
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#reset-cells = <1>; |
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compatible = "allwinner,sun6i-a31-clock-reset"; |
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reg = <0x01c202d8 0x4>; |
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}; |
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timer@01c20c00 { |
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compatible = "allwinner,sun4i-a10-timer"; |
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reg = <0x01c20c00 0xa0>; |
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interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&osc24M>; |
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}; |
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wdt0: watchdog@01c20ca0 { |
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compatible = "allwinner,sun6i-a31-wdt"; |
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reg = <0x01c20ca0 0x20>; |
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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|
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lradc: lradc@01c22800 { |
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compatible = "allwinner,sun4i-a10-lradc-keys"; |
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reg = <0x01c22800 0x100>; |
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
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status = "disabled"; |
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}; |
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|
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uart0: serial@01c28000 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c28000 0x400>; |
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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clocks = <&apb2_gates 16>; |
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resets = <&apb2_rst 16>; |
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dmas = <&dma 6>, <&dma 6>; |
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dma-names = "rx", "tx"; |
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status = "disabled"; |
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}; |
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|
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uart1: serial@01c28400 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c28400 0x400>; |
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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clocks = <&apb2_gates 17>; |
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resets = <&apb2_rst 17>; |
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dmas = <&dma 7>, <&dma 7>; |
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dma-names = "rx", "tx"; |
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status = "disabled"; |
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}; |
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uart2: serial@01c28800 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c28800 0x400>; |
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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clocks = <&apb2_gates 18>; |
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resets = <&apb2_rst 18>; |
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dmas = <&dma 8>, <&dma 8>; |
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dma-names = "rx", "tx"; |
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status = "disabled"; |
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}; |
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|
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uart3: serial@01c28c00 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c28c00 0x400>; |
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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clocks = <&apb2_gates 19>; |
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resets = <&apb2_rst 19>; |
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dmas = <&dma 9>, <&dma 9>; |
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dma-names = "rx", "tx"; |
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status = "disabled"; |
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}; |
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|
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uart4: serial@01c29000 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c29000 0x400>; |
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
||||
clocks = <&apb2_gates 20>; |
||||
resets = <&apb2_rst 20>; |
||||
dmas = <&dma 10>, <&dma 10>; |
||||
dma-names = "rx", "tx"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
i2c0: i2c@01c2ac00 { |
||||
compatible = "allwinner,sun6i-a31-i2c"; |
||||
reg = <0x01c2ac00 0x400>; |
||||
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
||||
clocks = <&apb2_gates 0>; |
||||
resets = <&apb2_rst 0>; |
||||
status = "disabled"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
}; |
||||
|
||||
i2c1: i2c@01c2b000 { |
||||
compatible = "allwinner,sun6i-a31-i2c"; |
||||
reg = <0x01c2b000 0x400>; |
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
||||
clocks = <&apb2_gates 1>; |
||||
resets = <&apb2_rst 1>; |
||||
status = "disabled"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
}; |
||||
|
||||
i2c2: i2c@01c2b400 { |
||||
compatible = "allwinner,sun6i-a31-i2c"; |
||||
reg = <0x01c2b400 0x400>; |
||||
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
||||
clocks = <&apb2_gates 2>; |
||||
resets = <&apb2_rst 2>; |
||||
status = "disabled"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
}; |
||||
|
||||
gic: interrupt-controller@01c81000 { |
||||
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; |
||||
reg = <0x01c81000 0x1000>, |
||||
<0x01c82000 0x1000>, |
||||
<0x01c84000 0x2000>, |
||||
<0x01c86000 0x2000>; |
||||
interrupt-controller; |
||||
#interrupt-cells = <3>; |
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
||||
}; |
||||
|
||||
rtc: rtc@01f00000 { |
||||
compatible = "allwinner,sun6i-a31-rtc"; |
||||
reg = <0x01f00000 0x54>; |
||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, |
||||
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; |
||||
}; |
||||
|
||||
prcm@01f01400 { |
||||
compatible = "allwinner,sun8i-a23-prcm"; |
||||
reg = <0x01f01400 0x200>; |
||||
|
||||
ar100: ar100_clk { |
||||
compatible = "fixed-factor-clock"; |
||||
#clock-cells = <0>; |
||||
clock-div = <1>; |
||||
clock-mult = <1>; |
||||
clocks = <&osc24M>; |
||||
clock-output-names = "ar100"; |
||||
}; |
||||
|
||||
ahb0: ahb0_clk { |
||||
compatible = "fixed-factor-clock"; |
||||
#clock-cells = <0>; |
||||
clock-div = <1>; |
||||
clock-mult = <1>; |
||||
clocks = <&ar100>; |
||||
clock-output-names = "ahb0"; |
||||
}; |
||||
|
||||
apb0: apb0_clk { |
||||
compatible = "allwinner,sun8i-a23-apb0-clk"; |
||||
#clock-cells = <0>; |
||||
clocks = <&ahb0>; |
||||
clock-output-names = "apb0"; |
||||
}; |
||||
|
||||
apb0_gates: apb0_gates_clk { |
||||
compatible = "allwinner,sun8i-a23-apb0-gates-clk"; |
||||
#clock-cells = <1>; |
||||
clocks = <&apb0>; |
||||
clock-output-names = "apb0_pio", "apb0_timer", |
||||
"apb0_rsb", "apb0_uart", |
||||
"apb0_i2c"; |
||||
}; |
||||
|
||||
apb0_rst: apb0_rst { |
||||
compatible = "allwinner,sun6i-a31-clock-reset"; |
||||
#reset-cells = <1>; |
||||
}; |
||||
}; |
||||
|
||||
cpucfg@01f01c00 { |
||||
compatible = "allwinner,sun8i-a23-cpuconfig"; |
||||
reg = <0x01f01c00 0x300>; |
||||
}; |
||||
|
||||
r_uart: serial@01f02800 { |
||||
compatible = "snps,dw-apb-uart"; |
||||
reg = <0x01f02800 0x400>; |
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; |
||||
reg-shift = <2>; |
||||
reg-io-width = <4>; |
||||
clocks = <&apb0_gates 4>; |
||||
resets = <&apb0_rst 4>; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
r_pio: pinctrl@01f02c00 { |
||||
compatible = "allwinner,sun8i-a23-r-pinctrl"; |
||||
reg = <0x01f02c00 0x400>; |
||||
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; |
||||
clocks = <&apb0_gates 0>; |
||||
resets = <&apb0_rst 0>; |
||||
gpio-controller; |
||||
interrupt-controller; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
#gpio-cells = <3>; |
||||
|
||||
r_uart_pins_a: r_uart@0 { |
||||
allwinner,pins = "PL2", "PL3"; |
||||
allwinner,function = "s_uart"; |
||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
@ -0,0 +1,134 @@ |
||||
/* |
||||
* Copyright 2015 Maxime Ripard |
||||
* |
||||
* Maxime Ripard <maxime.ripard@free-electrons.com> |
||||
* |
||||
* This file is dual-licensed: you can use it either under the terms |
||||
* of the GPL or the X11 license, at your option. Note that this dual |
||||
* licensing only applies to this file, and not this project as a |
||||
* whole. |
||||
* |
||||
* a) This file is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of the |
||||
* License, or (at your option) any later version. |
||||
* |
||||
* This file is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* Or, alternatively, |
||||
* |
||||
* b) Permission is hereby granted, free of charge, to any person |
||||
* obtaining a copy of this software and associated documentation |
||||
* files (the "Software"), to deal in the Software without |
||||
* restriction, including without limitation the rights to use, |
||||
* copy, modify, merge, publish, distribute, sublicense, and/or |
||||
* sell copies of the Software, and to permit persons to whom the |
||||
* Software is furnished to do so, subject to the following |
||||
* conditions: |
||||
* |
||||
* The above copyright notice and this permission notice shall be |
||||
* included in all copies or substantial portions of the Software. |
||||
* |
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
||||
* OTHER DEALINGS IN THE SOFTWARE. |
||||
*/ |
||||
|
||||
/dts-v1/; |
||||
#include "sun8i-a23.dtsi" |
||||
#include "sunxi-common-regulators.dtsi" |
||||
|
||||
#include <dt-bindings/gpio/gpio.h> |
||||
#include <dt-bindings/input/input.h> |
||||
#include <dt-bindings/pinctrl/sun4i-a10.h> |
||||
|
||||
/ { |
||||
model = "Allwinner A23 Evaluation Board"; |
||||
compatible = "allwinner,sun8i-a23-evb", "allwinner,sun8i-a23"; |
||||
|
||||
aliases { |
||||
i2c0 = &i2c0; |
||||
i2c1 = &i2c1; |
||||
serial0 = &r_uart; |
||||
}; |
||||
|
||||
chosen { |
||||
stdout-path = "serial0:115200n8"; |
||||
}; |
||||
}; |
||||
|
||||
&i2c0 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&i2c0_pins_a>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&i2c1 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&i2c1_pins_a>; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&lradc { |
||||
vref-supply = <®_vcc3v0>; |
||||
status = "okay"; |
||||
|
||||
button@190 { |
||||
label = "Volume Up"; |
||||
linux,code = <KEY_VOLUMEUP>; |
||||
channel = <0>; |
||||
voltage = <190000>; |
||||
}; |
||||
|
||||
button@390 { |
||||
label = "Volume Down"; |
||||
linux,code = <KEY_VOLUMEDOWN>; |
||||
channel = <0>; |
||||
voltage = <390000>; |
||||
}; |
||||
|
||||
button@600 { |
||||
label = "Home"; |
||||
linux,code = <KEY_HOME>; |
||||
channel = <0>; |
||||
voltage = <600000>; |
||||
}; |
||||
}; |
||||
|
||||
&mmc0 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_evb>; |
||||
vmmc-supply = <®_vcc3v0>; |
||||
bus-width = <4>; |
||||
cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ |
||||
cd-inverted; |
||||
status = "okay"; |
||||
}; |
||||
|
||||
&pio { |
||||
mmc0_cd_pin_evb: mmc0_cd_pin@0 { |
||||
allwinner,pins = "PB4"; |
||||
allwinner,function = "gpio_in"; |
||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
||||
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; |
||||
}; |
||||
}; |
||||
|
||||
/* |
||||
* The RX line has a non-populated resistance. In order to use it, you |
||||
* need to solder R207 on the back of the board in order to close the |
||||
* line and get a working UART. |
||||
*/ |
||||
&r_uart { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&r_uart_pins_a>; |
||||
status = "okay"; |
||||
}; |
||||
@ -1,29 +0,0 @@ |
||||
/* |
||||
* Copyright 2015 Hans de Goede <hdegoede@redhat.com> |
||||
* |
||||
* Minimal dts file for the Astar MID756 for u-boot only |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ or X11 |
||||
*/ |
||||
|
||||
/dts-v1/; |
||||
#include "sun8i-a23.dtsi" |
||||
|
||||
/ { |
||||
model = "Astar MID756"; |
||||
compatible = "astar,mid756", "allwinner,sun8i-a23"; |
||||
|
||||
aliases { |
||||
serial0 = &r_uart; |
||||
}; |
||||
|
||||
chosen { |
||||
stdout-path = "serial0:115200n8"; |
||||
}; |
||||
}; |
||||
|
||||
&r_uart { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&r_uart_pins_a>; |
||||
status = "okay"; |
||||
}; |
||||
@ -0,0 +1,88 @@ |
||||
/* |
||||
* Copyright 2015 Vishnu Patekar |
||||
* Vishnu Patekar <vishnupatekar0510@gmail.com> |
||||
* |
||||
* This file is dual-licensed: you can use it either under the terms |
||||
* of the GPL or the X11 license, at your option. Note that this dual |
||||
* licensing only applies to this file, and not this project as a |
||||
* whole. |
||||
* |
||||
* a) This file is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of the |
||||
* License, or (at your option) any later version. |
||||
* |
||||
* This file is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* Or, alternatively, |
||||
* |
||||
* b) Permission is hereby granted, free of charge, to any person |
||||
* obtaining a copy of this software and associated documentation |
||||
* files (the "Software"), to deal in the Software without |
||||
* restriction, including without limitation the rights to use, |
||||
* copy, modify, merge, publish, distribute, sublicense, and/or |
||||
* sell copies of the Software, and to permit persons to whom the |
||||
* Software is furnished to do so, subject to the following |
||||
* conditions: |
||||
* |
||||
* The above copyright notice and this permission notice shall be |
||||
* included in all copies or substantial portions of the Software. |
||||
* |
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
||||
* OTHER DEALINGS IN THE SOFTWARE. |
||||
*/ |
||||
|
||||
/dts-v1/; |
||||
#include "sun8i-a33.dtsi" |
||||
#include "sunxi-common-regulators.dtsi" |
||||
|
||||
#include <dt-bindings/gpio/gpio.h> |
||||
#include <dt-bindings/input/input.h> |
||||
#include <dt-bindings/pinctrl/sun4i-a10.h> |
||||
|
||||
/ { |
||||
model = "ET Q8 Quad Core Tablet (v1.6)"; |
||||
compatible = "et,q8-v1.6", "allwinner,sun8i-a33"; |
||||
|
||||
aliases { |
||||
serial0 = &uart0; |
||||
}; |
||||
|
||||
chosen { |
||||
stdout-path = "serial0:115200n8"; |
||||
}; |
||||
}; |
||||
|
||||
&lradc { |
||||
vref-supply = <®_vcc3v0>; |
||||
status = "okay"; |
||||
|
||||
button@200 { |
||||
label = "Volume Up"; |
||||
linux,code = <KEY_VOLUMEUP>; |
||||
channel = <0>; |
||||
voltage = <200000>; |
||||
}; |
||||
|
||||
button@400 { |
||||
label = "Volume Down"; |
||||
linux,code = <KEY_VOLUMEDOWN>; |
||||
channel = <0>; |
||||
voltage = <400000>; |
||||
}; |
||||
}; |
||||
|
||||
&uart0 { |
||||
pinctrl-names = "default"; |
||||
pinctrl-0 = <&uart0_pins_a>; |
||||
status = "okay"; |
||||
}; |
||||
@ -0,0 +1,89 @@ |
||||
/* |
||||
* Copyright 2014 Chen-Yu Tsai |
||||
* |
||||
* Chen-Yu Tsai <wens@csie.org> |
||||
* |
||||
* This file is dual-licensed: you can use it either under the terms |
||||
* of the GPL or the X11 license, at your option. Note that this dual |
||||
* licensing only applies to this file, and not this project as a |
||||
* whole. |
||||
* |
||||
* a) This file is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of the |
||||
* License, or (at your option) any later version. |
||||
* |
||||
* This file is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* Or, alternatively, |
||||
* |
||||
* b) Permission is hereby granted, free of charge, to any person |
||||
* obtaining a copy of this software and associated documentation |
||||
* files (the "Software"), to deal in the Software without |
||||
* restriction, including without limitation the rights to use, |
||||
* copy, modify, merge, publish, distribute, sublicense, and/or |
||||
* sell copies of the Software, and to permit persons to whom the |
||||
* Software is furnished to do so, subject to the following |
||||
* conditions: |
||||
* |
||||
* The above copyright notice and this permission notice shall be |
||||
* included in all copies or substantial portions of the Software. |
||||
* |
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
||||
* OTHER DEALINGS IN THE SOFTWARE. |
||||
*/ |
||||
|
||||
#include "sun8i-a23-a33.dtsi" |
||||
|
||||
/ { |
||||
cpus { |
||||
cpu@2 { |
||||
compatible = "arm,cortex-a7"; |
||||
device_type = "cpu"; |
||||
reg = <2>; |
||||
}; |
||||
|
||||
cpu@3 { |
||||
compatible = "arm,cortex-a7"; |
||||
device_type = "cpu"; |
||||
reg = <3>; |
||||
}; |
||||
}; |
||||
|
||||
memory { |
||||
reg = <0x40000000 0x80000000>; |
||||
}; |
||||
|
||||
clocks { |
||||
/* Dummy clock for pll11 (DDR1) until actually implemented */ |
||||
pll11: pll11_clk { |
||||
#clock-cells = <0>; |
||||
compatible = "fixed-clock"; |
||||
clock-frequency = <0>; |
||||
clock-output-names = "pll11"; |
||||
}; |
||||
|
||||
mbus_clk: clk@01c2015c { |
||||
#clock-cells = <0>; |
||||
compatible = "allwinner,sun8i-a23-mbus-clk"; |
||||
reg = <0x01c2015c 0x4>; |
||||
clocks = <&osc24M>, <&pll6 1>, <&pll5>, <&pll11>; |
||||
clock-output-names = "mbus"; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
&pio { |
||||
compatible = "allwinner,sun8i-a33-pinctrl"; |
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, |
||||
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
||||
}; |
||||
Loading…
Reference in new issue