davinci: add support for printing clock frequency

add support for printing various clock frequency info found
in SOC such as ARM core frequency, DSP core frequency and DDR
frequency as part of bdinfo command.

Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
master
Hadli, Manjunath 12 years ago committed by Albert ARIBAUD
parent 6678cebc09
commit 8f5d468721
  1. 32
      arch/arm/cpu/arm926ejs/davinci/cpu.c
  2. 3
      arch/arm/include/asm/u-boot.h
  3. 10
      arch/arm/lib/board.c
  4. 9
      common/cmd_bdinfo.c
  5. 1
      include/common.h
  6. 4
      include/configs/cam_enc_4xx.h
  7. 4
      include/configs/da830evm.h
  8. 4
      include/configs/da850evm.h
  9. 4
      include/configs/davinci_dm355evm.h
  10. 4
      include/configs/davinci_dm355leopard.h
  11. 4
      include/configs/davinci_dm365evm.h
  12. 4
      include/configs/davinci_dm6467Tevm.h
  13. 4
      include/configs/davinci_dm6467evm.h
  14. 5
      include/configs/davinci_dvevm.h
  15. 4
      include/configs/davinci_schmoogie.h
  16. 4
      include/configs/davinci_sffsdr.h
  17. 4
      include/configs/davinci_sonata.h
  18. 4
      include/configs/ea20.h
  19. 4
      include/configs/enbw_cmc.h
  20. 4
      include/configs/hawkboard.h

@ -25,6 +25,8 @@
#include <asm/arch/hardware.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
/* offsets from PLL controller base */
#define PLLC_PLLCTL 0x100
#define PLLC_PLLM 0x110
@ -187,6 +189,36 @@ unsigned int davinci_clk_get(unsigned int div)
#endif
#endif /* !CONFIG_SOC_DA8XX */
int set_cpu_clk_info(void)
{
#ifdef CONFIG_SOC_DA8XX
gd->bd->bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 1000000;
/* DDR PHY uses an x2 input clock */
gd->bd->bi_ddr_freq = clk_get(0x10001) / 1000000;
#else
unsigned int pllbase = DAVINCI_PLL_CNTRL0_BASE;
#if defined(CONFIG_SOC_DM365)
pllbase = DAVINCI_PLL_CNTRL1_BASE;
#endif
gd->bd->bi_arm_freq = pll_sysclk_mhz(pllbase, ARM_PLLDIV);
#ifdef DSP_PLLDIV
gd->bd->bi_dsp_freq =
pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV);
#else
gd->bd->bi_dsp_freq = 0;
#endif
pllbase = DAVINCI_PLL_CNTRL1_BASE;
#if defined(CONFIG_SOC_DM365)
pllbase = DAVINCI_PLL_CNTRL0_BASE;
#endif
gd->bd->bi_ddr_freq = pll_sysclk_mhz(pllbase, DDR_PLLDIV) / 2;
#endif
return 0;
}
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()

@ -41,6 +41,9 @@ typedef struct bd_info {
unsigned long bi_ip_addr; /* IP Address */
ulong bi_arch_number; /* unique id for this board */
ulong bi_boot_params; /* where this board expects params */
unsigned long bi_arm_freq; /* arm frequency */
unsigned long bi_dsp_freq; /* dsp core frequency */
unsigned long bi_ddr_freq; /* ddr frequency */
struct /* RAM configuration */
{
ulong start;

@ -463,7 +463,15 @@ void board_init_r(gd_t *id, ulong dest_addr)
debug("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */
/*
* TODO: printing of the clock inforamtion of the board is now
* implemented as part of bdinfo command. Currently only support for
* davinci SOC's is added. Remove this check once all the board
* implement this.
*/
#ifdef CONFIG_CLOCKS
set_cpu_clk_info(); /* Setup clock information */
#endif
#ifdef CONFIG_SERIAL_MULTI
serial_initialize();
#endif

@ -370,6 +370,15 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
print_num("sp start ", gd->start_addr_sp);
print_num("FB base ", gd->fb_base);
/*
* TODO: Currently only support for davinci SOC's is added.
* Remove this check once all the board implement this.
*/
#ifdef CONFIG_CLOCKS
printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
#endif
return 0;
}

@ -285,6 +285,7 @@ int last_stage_init(void);
extern ulong monitor_flash_len;
int mac_read_from_eeprom(void);
extern u8 _binary_dt_dtb_start[]; /* embedded device tree blob */
int set_cpu_clk_info(void);
/*
* Called when console output is requested before the console is available.

@ -121,6 +121,10 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifdef CONFIG_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2

@ -203,6 +203,10 @@
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP

@ -269,6 +269,10 @@
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_MEMORY
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP

@ -98,6 +98,10 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifdef CONFIG_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2

@ -83,6 +83,10 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifdef CONFIG_NAND_DAVINCI
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS

@ -142,6 +142,10 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifdef CONFIG_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2

@ -152,6 +152,10 @@ extern unsigned int davinci_arm_clk_get(void);
#define CONFIG_CMD_NAND
#endif
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1

@ -150,6 +150,10 @@ extern unsigned int davinci_arm_clk_get(void);
#define CONFIG_CMD_NAND
#endif
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1

@ -199,6 +199,11 @@
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_BDI
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
#ifdef CONFIG_SYS_USE_NAND

@ -148,6 +148,10 @@
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1

@ -141,6 +141,10 @@
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1

@ -199,6 +199,10 @@
#error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
#endif
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1

@ -168,6 +168,10 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_I2C
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP

@ -269,6 +269,10 @@
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_CACHE
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP

@ -185,6 +185,10 @@
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_MEMORY
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
#ifdef CONFIG_SYS_USE_NAND
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS

Loading…
Cancel
Save