ppc, mgcoge: add DIP switch detection

This reads the DIP switch on mgcoge. The DIP switch is connected to
the BFTICU (0x40000089) FPGA. If the DIP switch is set the environment
variable 'actual_bank' is set to 0 and starts the SW in bank0.

Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
master
Andreas Huber 14 years ago committed by Wolfgang Denk
parent 086f09150d
commit 91a3c14cd0
  1. 18
      board/keymile/mgcoge/mgcoge.c
  2. 5
      include/configs/mgcoge.h

@ -293,6 +293,24 @@ int checkboard(void)
return 0;
}
#define DIPSWITCH_OFFSET 0x89
#define DIPSWITCH_MASK 0x0f
int last_stage_init(void)
{
u8 dip_switch;
/* Dip switch */
dip_switch = readb(CONFIG_SYS_BFTICU_BASE + DIPSWITCH_OFFSET);
dip_switch &= DIPSWITCH_MASK;
/* dip switch 'full reset' or 'db erase' */
if (dip_switch & 0x1 || dip_switch & 0x2) {
/* start bootloader */
puts("DIP: Enabled\n");
setenv("actual_bank", "0");
}
return 0;
}
/*
* Early board initalization.
*/

@ -348,4 +348,9 @@
#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_STDOUT_PATH "/soc/cpm/serial@11a90"
/* enable last_stage_init */
#define CONFIG_LAST_STAGE_INIT 1
/* bfticu address */
#define CONFIG_SYS_BFTICU_BASE 0x40000000
#endif /* __CONFIG_H */

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