diff --git a/arch/arm/dts/at91sam9xe.dtsi b/arch/arm/dts/at91sam9xe.dtsi new file mode 100644 index 0000000..0278f63 --- /dev/null +++ b/arch/arm/dts/at91sam9xe.dtsi @@ -0,0 +1,60 @@ +/* + * at91sam9xe.dtsi - Device Tree Include file for AT91SAM9XE family SoC + * + * Copyright (C) 2015 Atmel, + * 2015 Alexandre Belloni + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "at91sam9260.dtsi" + +/ { + model = "Atmel AT91SAM9XE family SoC"; + compatible = "atmel,at91sam9xe", "atmel,at91sam9260"; + + sram0: sram@002ff000 { + status = "disabled"; + }; + + sram1: sram@00300000 { + compatible = "mmio-sram"; + reg = <0x00300000 0x4000>; + }; +}; diff --git a/arch/arm/dts/ethernut5.dts b/arch/arm/dts/ethernut5.dts new file mode 100644 index 0000000..e077152 --- /dev/null +++ b/arch/arm/dts/ethernut5.dts @@ -0,0 +1,94 @@ +/* + * ethernut5.dts - Device Tree file for Ethernut 5 board + * + * Copyright (C) 2012 egnite GmbH + * + * Licensed under GPLv2. + */ +/dts-v1/; +#include "at91sam9xe.dtsi" + +/ { + model = "Ethernut 5"; + compatible = "egnite,ethernut5", "atmel,at91sam9260", "atmel,at91sam9"; + + chosen { + bootargs = "console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2"; + }; + + memory { + reg = <0x20000000 0x08000000>; + }; + + clocks { + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <18432000>; + }; + }; + + ahb { + apb { + dbgu: serial@fffff200 { + status = "okay"; + }; + + usart0: serial@fffb0000 { + status = "okay"; + }; + + usart1: serial@fffb4000 { + status = "okay"; + }; + + macb0: ethernet@fffc4000 { + phy-mode = "rmii"; + status = "okay"; + }; + + usb1: gadget@fffa4000 { + atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + }; + + nand0: nand@40000000 { + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + status = "okay"; + + gpios = <0 + &pioC 14 GPIO_ACTIVE_HIGH + 0 + >; + + root@0 { + label = "root"; + reg = <0x0 0x08000000>; + }; + + data@20000 { + label = "data"; + reg = <0x08000000 0x38000000>; + }; + }; + + usb0: ohci@00500000 { + num-ports = <2>; + status = "okay"; + }; + }; + + i2c-gpio-0 { + status = "okay"; + + pcf8563@50 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; + }; +}; diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c index 2c8e978..d64c345 100644 --- a/board/egnite/ethernut5/ethernut5.c +++ b/board/egnite/ethernut5/ethernut5.c @@ -58,8 +58,6 @@ #include #include #include -#include -#include #include #include @@ -67,7 +65,6 @@ #include #include #include -#include #include #include #include @@ -77,25 +74,6 @@ DECLARE_GLOBAL_DATA_PTR; -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0} -}; - -/* - * In fact we have 7 partitions, but u-boot supports 5 only. This is - * no big deal, because the first partition is reserved for applications - * and the last one is used by Nut/OS. Both need not to be visible here. - */ -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - { 0x00021000, 0x00041FFF, FLAG_PROTECT_SET, 0, "setup" }, - { 0x00042000, 0x000C5FFF, FLAG_PROTECT_SET, 0, "uboot" }, - { 0x000C6000, 0x00359FFF, FLAG_PROTECT_SET, 0, "kernel" }, - { 0x0035A000, 0x003DDFFF, FLAG_PROTECT_SET, 0, "nutos" }, - { 0x003DE000, 0x003FEFFF, FLAG_PROTECT_CLEAR, 0, "env" } -}; - /* * This is called last during early initialization. Most of the basic * hardware interfaces are up and running. @@ -158,14 +136,10 @@ int board_init(void) /* Set adress of boot parameters. */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; /* Initialize UARTs and power management. */ - at91_seriald_hw_init(); ethernut5_power_init(); #ifdef CONFIG_CMD_NAND ethernut5_nand_hw_init(); #endif -#ifdef CONFIG_HAS_DATAFLASH - at91_spi0_hw_init(1 << 0); -#endif return 0; } @@ -221,31 +195,3 @@ int board_mmc_getcd(struct mmc *mmc) return !at91_get_pio_value(CONFIG_SYS_MMC_CD_PIN); } #endif - -#ifdef CONFIG_ATMEL_SPI -/* - - * Note, that u-boot uses different code for SPI bus access. While - * memory routines use automatic chip select control, the serial - * flash support requires 'manual' GPIO control. Thus, we switch - * modes. - */ -void spi_cs_activate(struct spi_slave *slave) -{ - /* Enable NPCS0 in GPIO mode. This disables peripheral control. */ - at91_set_pio_output(AT91_PIO_PORTA, 3, 0); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - /* Disable NPCS0 in GPIO mode. */ - at91_set_pio_output(AT91_PIO_PORTA, 3, 1); - /* Switch back to peripheral chip select control. */ - at91_set_a_periph(AT91_PIO_PORTA, 3, 1); -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus == 0 && cs == 0; -} -#endif diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 65a2173..b9010d6 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_TARGET_ETHERNUT5=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="ethernut5" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTDELAY=3 @@ -32,8 +34,22 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 8bec154..756b1d6 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -53,34 +53,12 @@ # define CONFIG_SYS_FLASH_PROTECTION /* First stage loader in sector 0 */ # define CONFIG_EFLASH_PROTSECTORS 1 -/* 512kB DataFlash at NPCS0 */ -#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 -#define CONFIG_HAS_DATAFLASH -#define CONFIG_ATMEL_DATAFLASH_SPI -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 -#define DATAFLASH_TCSS (0x1a << 16) -#define DATAFLASH_TCHS (0x1 << 24) - -#define CONFIG_ENV_OFFSET 0x3DE000 -#define CONFIG_ENV_SECT_SIZE (132 << 10) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \ - + CONFIG_ENV_OFFSET) -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \ - + 0x042000) - -/* SPI */ -#define CONFIG_ATMEL_SPI -#define AT91_SPI_CLK 15000000 - -/* Serial port */ -#define CONFIG_ATMEL_USART -#define CONFIG_USART3 /* USART 3 is DBGU */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS - -/* Misc. hardware drivers */ -#define CONFIG_AT91_GPIO + +/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +#define CONFIG_ENV_OFFSET 0x3DE000 +#define CONFIG_ENV_SIZE (132 << 10) +#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +#define CONFIG_ENV_SPI_MAX_HZ 15000000 #ifndef MINIMAL_LOADER #define CONFIG_CMD_REISER @@ -185,7 +163,9 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_BOOTCOMMAND "cp.b 0xC00C6000 ${loadaddr} 0x294000; bootm" +#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \ + "sf read 0x22000000 0xc6000 0x294000; " \ + "bootm 0x22000000" #if defined(CONFIG_CMD_NAND) #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ "root=/dev/mtdblock0 " \