FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> [yorks: rebase and fix SPDX tag] [yorks: fix board/freescale/ls1012afrdm/Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>lime2-spi
Bhaskar Upadhaya
7 years ago
committed by
York Sun
parent
7191d45348
commit
9629ccdde7
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// SPDX-License-Identifier: GPL-2.0+ OR X11 |
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/* |
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* NXP ls1012a FRWY board device tree source |
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* |
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* Copyright 2018 NXP |
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* |
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*/ |
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/dts-v1/; |
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#include "fsl-ls1012a.dtsi" |
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/ { |
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model = "FRWY-LS1012A Board"; |
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aliases { |
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spi0 = &qspi; |
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}; |
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chosen { |
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stdout-path = &duart0; |
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}; |
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}; |
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&qspi { |
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bus-num = <0>; |
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status = "okay"; |
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qflash0: w25q16dw@0 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "spi-flash"; |
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spi-max-frequency = <20000000>; |
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reg = <0>; |
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}; |
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}; |
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&i2c0 { |
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status = "okay"; |
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}; |
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&duart0 { |
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status = "okay"; |
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}; |
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CONFIG_ARM=y |
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CONFIG_TARGET_LS1012AFRWY=y |
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CONFIG_SYS_TEXT_BASE=0x40100000 |
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CONFIG_FSL_LS_PPA=y |
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CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" |
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CONFIG_DISTRO_DEFAULTS=y |
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# CONFIG_SYS_MALLOC_F is not set |
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CONFIG_FIT_VERBOSE=y |
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CONFIG_OF_BOARD_SETUP=y |
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CONFIG_OF_STDOUT_VIA_ALIAS=y |
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CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" |
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CONFIG_QSPI_BOOT=y |
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CONFIG_BOOTDELAY=10 |
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CONFIG_USE_BOOTARGS=y |
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CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" |
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# CONFIG_DISPLAY_BOARDINFO is not set |
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CONFIG_DISPLAY_BOARDINFO_LATE=y |
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CONFIG_CMD_GREPENV=y |
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CONFIG_CMD_GPT=y |
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CONFIG_CMD_I2C=y |
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CONFIG_CMD_MMC=y |
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CONFIG_CMD_PCI=y |
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CONFIG_CMD_SF=y |
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CONFIG_CMD_USB=y |
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# CONFIG_CMD_SETEXPR is not set |
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CONFIG_CMD_CACHE=y |
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CONFIG_OF_CONTROL=y |
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CONFIG_ENV_IS_IN_SPI_FLASH=y |
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CONFIG_NET_RANDOM_ETHADDR=y |
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CONFIG_DM=y |
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# CONFIG_BLK is not set |
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CONFIG_DM_MMC=y |
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CONFIG_DM_SPI_FLASH=y |
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CONFIG_SPI_FLASH=y |
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CONFIG_SPI_FLASH_WINBOND=y |
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CONFIG_FSL_PFE=y |
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CONFIG_DM_ETH=y |
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CONFIG_E1000=y |
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CONFIG_PCI=y |
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CONFIG_DM_PCI=y |
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CONFIG_DM_PCI_COMPAT=y |
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CONFIG_PCIE_LAYERSCAPE=y |
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CONFIG_SYS_NS16550=y |
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CONFIG_DM_SPI=y |
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CONFIG_FSL_DSPI=y |
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CONFIG_USB=y |
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CONFIG_DM_USB=y |
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CONFIG_USB_XHCI_HCD=y |
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CONFIG_USB_XHCI_DWC3=y |
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CONFIG_USB_STORAGE=y |
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@ -0,0 +1,119 @@ |
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/* SPDX-License-Identifier: GPL-2.0+ */ |
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/*
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* Copyright 2018 NXP |
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*/ |
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#ifndef __LS1012AFRWY_H__ |
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#define __LS1012AFRWY_H__ |
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#include "ls1012a_common.h" |
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/* Board Rev*/ |
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#define BOARD_REV_A 0x0 |
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#define BOARD_REV_B 0x200 |
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/* DDR */ |
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#define CONFIG_DIMM_SLOTS_PER_CTLR 1 |
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#define CONFIG_CHIP_SELECTS_PER_CTRL 1 |
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#define CONFIG_NR_DRAM_BANKS 2 |
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#define SYS_SDRAM_SIZE_512 0x20000000 |
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#define SYS_SDRAM_SIZE_1024 0x40000000 |
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#define CONFIG_CHIP_SELECTS_PER_CTRL 1 |
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#define CONFIG_CMD_MEMINFO |
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#define CONFIG_CMD_MEMTEST |
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#define CONFIG_SYS_MEMTEST_START 0x80000000 |
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff |
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#ifndef CONFIG_SPL_BUILD |
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#undef BOOT_TARGET_DEVICES |
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#define BOOT_TARGET_DEVICES(func) \ |
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func(MMC, mmc, 0) \
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func(USB, usb, 0) |
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#endif |
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#undef CONFIG_ENV_OFFSET |
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#define CONFIG_ENV_OFFSET 0x1D0000 |
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#undef FSL_QSPI_FLASH_SIZE |
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#define FSL_QSPI_FLASH_SIZE SZ_16M |
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#undef CONFIG_ENV_SECT_SIZE |
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#define CONFIG_ENV_SECT_SIZE 0x10000 /*64 KB*/ |
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#undef CONFIG_ENV_SIZE |
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#define CONFIG_ENV_SIZE 0x10000 /*64 KB*/ |
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/* MMC */ |
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#ifdef CONFIG_MMC |
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#define CONFIG_FSL_ESDHC |
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#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 |
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#endif |
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#define CONFIG_PCIE1 /* PCIE controller 1 */ |
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#define CONFIG_PCI_SCAN_SHOW |
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#undef CONFIG_EXTRA_ENV_SETTINGS |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"verify=no\0" \
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"fdt_high=0xffffffffffffffff\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"fdt_addr=0x00f00000\0" \
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"kernel_addr=0x01000000\0" \
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"kernelheader_addr=0x1fc000\0" \
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"scriptaddr=0x80000000\0" \
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"scripthdraddr=0x80080000\0" \
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"fdtheader_addr_r=0x80100000\0" \
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"kernelheader_addr_r=0x80200000\0" \
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"kernel_addr_r=0x81000000\0" \
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"fdt_addr_r=0x90000000\0" \
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"load_addr=0x96000000\0" \
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"kernel_size=0x2800000\0" \
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"kernelheader_size=0x40000\0" \
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"console=ttyS0,115200\0" \
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BOOTENV \
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"boot_scripts=ls1012afrwy_boot.scr\0" \
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"boot_script_hdr=hdr_ls1012afrwy_bs.out\0" \
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"scan_dev_for_boot_part=" \
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"part list ${devtype} ${devnum} devplist; " \
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"env exists devplist || setenv devplist 1; " \
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"for distro_bootpart in ${devplist}; do " \
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"if fstype ${devtype} " \
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"${devnum}:${distro_bootpart} " \
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"bootfstype; then " \
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"run scan_dev_for_boot; " \
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"fi; " \
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"done\0" \
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"scan_dev_for_boot=" \
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"echo Scanning ${devtype} " \
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"${devnum}:${distro_bootpart}...; " \
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"for prefix in ${boot_prefixes}; do " \
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"run scan_dev_for_scripts; " \
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"done;" \
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"\0" \
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"boot_a_script=" \
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"load ${devtype} ${devnum}:${distro_bootpart} " \
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"${scriptaddr} ${prefix}${script}; " \
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"env exists secureboot && load ${devtype} " \
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"${devnum}:${distro_bootpart} " \
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"${scripthdraddr} ${prefix}${boot_script_hdr} " \
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"&& esbc_validate ${scripthdraddr};" \
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"source ${scriptaddr}\0" \
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"installer=load mmc 0:2 $load_addr " \
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"/flex_installer_arm64.itb; " \
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"bootm $load_addr#$board\0" \
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"qspi_bootcmd=echo Trying load from qspi..;" \
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"sf probe && sf read $load_addr " \
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"$kernel_addr $kernel_size; env exists secureboot " \
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"&& sf read $kernelheader_addr_r $kernelheader_addr " \
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"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
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"bootm $load_addr#$board\0" |
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#undef CONFIG_BOOTCOMMAND |
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#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ |
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"env exists secureboot && esbc_halt;" |
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#define CONFIG_CMD_MEMINFO |
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#define CONFIG_CMD_MEMTEST |
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#define CONFIG_SYS_MEMTEST_START 0x80000000 |
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff |
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#include <asm/fsl_secure_boot.h> |
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#endif /* __LS1012AFRWY_H__ */ |
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