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@ -28,7 +28,7 @@ |
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/* Register offsets of common modules */ |
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/* Control */ |
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#ifndef __ASSEMBLY__ |
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typedef struct ctrl { |
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struct ctrl { |
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unsigned char res1[0xC0]; |
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unsigned short gpmc_nadv_ale; /* 0xC0 */ |
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unsigned short gpmc_noe; /* 0xC2 */ |
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@ -49,7 +49,7 @@ typedef struct ctrl { |
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unsigned int randkey_3; /* 0x324 */ |
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unsigned char res5[0x124]; |
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unsigned int ctrl_omap_stat; /* 0x44C */ |
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} ctrl_t; |
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}; |
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#else /* __ASSEMBLY__ */ |
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#define CONTROL_STATUS 0x2F0 |
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#endif /* __ASSEMBLY__ */ |
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@ -61,7 +61,7 @@ typedef struct ctrl { |
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#define OMAP3530 0x0c00 |
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#ifndef __ASSEMBLY__ |
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typedef struct ctrl_id { |
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struct ctrl_id { |
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unsigned char res1[0x4]; |
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unsigned int idcode; /* 0x04 */ |
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unsigned int prod_id; /* 0x08 */ |
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@ -70,7 +70,7 @@ typedef struct ctrl_id { |
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unsigned int die_id_1; /* 0x1C */ |
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unsigned int die_id_2; /* 0x20 */ |
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unsigned int die_id_3; /* 0x24 */ |
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} ctrl_id_t; |
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}; |
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#endif /* __ASSEMBLY__ */ |
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/* device type */ |
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@ -99,7 +99,7 @@ struct gpmc_cs { |
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unsigned char res[8]; /* blow up to 0x30 byte */ |
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}; |
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typedef struct gpmc { |
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struct gpmc { |
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unsigned char res1[0x10]; |
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unsigned int sysconfig; /* 0x10 */ |
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unsigned char res2[0x4]; |
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@ -125,7 +125,7 @@ typedef struct gpmc { |
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unsigned int ecc7_result; /* 0x218 */ |
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unsigned int ecc8_result; /* 0x21C */ |
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unsigned int ecc9_result; /* 0x220 */ |
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} gpmc_t; |
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}; |
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#else /* __ASSEMBLY__ */ |
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#define GPMC_CONFIG1 0x00 |
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#define GPMC_CONFIG2 0x04 |
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@ -151,21 +151,21 @@ typedef struct gpmc { |
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/* (actual size small port) */ |
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/* SMS */ |
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#ifndef __ASSEMBLY__ |
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typedef struct sms { |
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struct sms { |
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unsigned char res1[0x10]; |
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unsigned int sysconfig; /* 0x10 */ |
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unsigned char res2[0x34]; |
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unsigned int rg_att0; /* 0x48 */ |
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unsigned char res3[0x84]; |
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unsigned int class_arb0; /* 0xD0 */ |
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} sms_t; |
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}; |
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#endif /* __ASSEMBLY__ */ |
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#define BURSTCOMPLETE_GROUP7 (0x1 << 31) |
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/* SDRC */ |
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#ifndef __ASSEMBLY__ |
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typedef struct sdrc_cs { |
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struct sdrc_cs { |
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unsigned int mcfg; /* 0x80 || 0xB0 */ |
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unsigned int mr; /* 0x84 || 0xB4 */ |
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unsigned char res1[0x4]; |
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@ -174,14 +174,14 @@ typedef struct sdrc_cs { |
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unsigned int rfr_ctrl; /* 0x84 || 0xD4 */ |
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unsigned int manual; /* 0xA8 || 0xD8 */ |
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unsigned char res3[0x4]; |
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} sdrc_cs_t; |
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}; |
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typedef struct sdrc_actim { |
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struct sdrc_actim { |
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unsigned int ctrla; /* 0x9C || 0xC4 */ |
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unsigned int ctrlb; /* 0xA0 || 0xC8 */ |
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} sdrc_actim_t; |
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}; |
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typedef struct sdrc { |
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struct sdrc { |
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unsigned char res1[0x10]; |
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unsigned int sysconfig; /* 0x10 */ |
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unsigned int status; /* 0x14 */ |
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@ -195,8 +195,8 @@ typedef struct sdrc { |
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unsigned int dllb_status; /* 0x6C */ |
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unsigned int power; /* 0x70 */ |
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unsigned char res4[0xC]; |
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sdrc_cs_t cs[2]; /* 0x80 || 0xB0 */ |
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} sdrc_t; |
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struct sdrc_cs cs[2]; /* 0x80 || 0xB0 */ |
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}; |
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#endif /* __ASSEMBLY__ */ |
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#define DLLPHASE_90 (0x1 << 1) |
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@ -240,7 +240,7 @@ typedef struct sdrc { |
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/* timer regs offsets (32 bit regs) */ |
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#ifndef __ASSEMBLY__ |
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typedef struct gptimer { |
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struct gptimer { |
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unsigned int tidr; /* 0x00 r */ |
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unsigned char res[0xc]; |
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unsigned int tiocp_cfg; /* 0x10 rw */ |
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@ -257,7 +257,7 @@ typedef struct gptimer { |
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unsigned int tcar1; /* 0x3c r */ |
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unsigned int tcicr; /* 0x40 rw */ |
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unsigned int tcar2; /* 0x44 r */ |
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} gptimer_t; |
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}; |
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#endif /* __ASSEMBLY__ */ |
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/* enable sys_clk NO-prescale /1 */ |
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@ -265,12 +265,12 @@ typedef struct gptimer { |
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/* Watchdog */ |
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#ifndef __ASSEMBLY__ |
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typedef struct watchdog { |
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struct watchdog { |
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unsigned char res1[0x34]; |
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unsigned int wwps; /* 0x34 r */ |
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unsigned char res2[0x10]; |
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unsigned int wspr; /* 0x48 rw */ |
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} watchdog_t; |
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}; |
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#endif /* __ASSEMBLY__ */ |
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#define WD_UNLOCK1 0xAAAA |
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@ -280,7 +280,7 @@ typedef struct watchdog { |
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#define PRCM_BASE 0x48004000 |
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#ifndef __ASSEMBLY__ |
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typedef struct prcm { |
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struct prcm { |
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unsigned int fclken_iva2; /* 0x00 */ |
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unsigned int clken_pll_iva2; /* 0x04 */ |
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unsigned char res1[0x1c]; |
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@ -344,7 +344,7 @@ typedef struct prcm { |
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unsigned int clksel_per; /* 0x1040 */ |
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unsigned char res28[0xfc]; |
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unsigned int clksel1_emu; /* 0x1140 */ |
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} prcm_t; |
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}; |
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#else /* __ASSEMBLY__ */ |
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#define CM_CLKSEL_CORE 0x48004a40 |
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#define CM_CLKSEL_GFX 0x48004b40 |
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@ -357,14 +357,14 @@ typedef struct prcm { |
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#define PRM_BASE 0x48306000 |
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#ifndef __ASSEMBLY__ |
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typedef struct prm { |
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struct prm { |
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unsigned char res1[0xd40]; |
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unsigned int clksel; /* 0xd40 */ |
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unsigned char res2[0x50c]; |
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unsigned int rstctrl; /* 0x1250 */ |
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unsigned char res3[0x1c]; |
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unsigned int clksrc_ctrl; /* 0x1270 */ |
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} prm_t; |
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}; |
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#else /* __ASSEMBLY__ */ |
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#define PRM_RSTCTRL 0x48307250 |
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#endif /* __ASSEMBLY__ */ |
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@ -400,7 +400,7 @@ typedef struct prm { |
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#define PM_IVA2_BASE_ADDR_ARM (SMX_APE_BASE + 0x14000) |
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#ifndef __ASSEMBLY__ |
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typedef struct pm { |
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struct pm { |
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unsigned char res1[0x48]; |
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unsigned int req_info_permission_0; /* 0x48 */ |
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unsigned char res2[0x4]; |
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@ -413,7 +413,7 @@ typedef struct pm { |
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unsigned int req_info_permission_1; /* 0x68 */ |
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unsigned char res6[0x14]; |
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unsigned int addr_match_2; /* 0x80 */ |
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} pm_t; |
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}; |
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#endif /*__ASSEMBLY__ */ |
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/* Permission values for registers -Full fledged permissions to all */ |
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Dirk Behme
16 years ago
committed by
Wolfgang Denk