Davinci: Configurable NAND chip selects

Davinci: Configurable NAND chip selects

Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
use it to setup the NAND controller in the davinci_nand
mtd driver.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
master
Nick Thompson 15 years ago committed by Tom Rix
parent 90110e0eab
commit 97f4eb8cfb
  1. 25
      drivers/mtd/nand/davinci_nand.c
  2. 14
      include/asm-arm/arch-davinci/emif_defs.h
  3. 1
      include/configs/davinci_dm355evm.h
  4. 1
      include/configs/davinci_dm355leopard.h
  5. 1
      include/configs/davinci_dm365evm.h
  6. 1
      include/configs/davinci_dm6467evm.h
  7. 1
      include/configs/davinci_dvevm.h
  8. 1
      include/configs/davinci_schmoogie.h
  9. 1
      include/configs/davinci_sffsdr.h
  10. 1
      include/configs/davinci_sonata.h

@ -82,26 +82,20 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c
static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
{
int dummy;
u_int32_t val;
dummy = emif_regs->NANDF1ECC;
(void)readl(&(emif_regs->NANDFECC[CONFIG_SYS_NAND_CS - 2]));
/* FIXME: only chipselect 0 is supported for now */
emif_regs->NANDFCR |= 1 << 8;
val = readl(&emif_regs->NANDFCR);
val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
writel(val, &emif_regs->NANDFCR);
}
static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region)
{
u_int32_t ecc = 0;
if (region == 1)
ecc = emif_regs->NANDF1ECC;
else if (region == 2)
ecc = emif_regs->NANDF2ECC;
else if (region == 3)
ecc = emif_regs->NANDF3ECC;
else if (region == 4)
ecc = emif_regs->NANDF4ECC;
ecc = readl(&(emif_regs->NANDFECC[region - 1]));
return(ecc);
}
@ -223,8 +217,11 @@ static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode)
* Start a new ECC calculation for reading or writing 512 bytes
* of data.
*/
val = (emif_regs->NANDFCR & ~(3 << 4)) | (1 << 12);
emif_regs->NANDFCR = val;
val = readl(&emif_regs->NANDFCR);
val &= ~DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK;
val |= DAVINCI_NANDFCR_4BIT_ECC_SEL(CONFIG_SYS_NAND_CS);
val |= DAVINCI_NANDFCR_4BIT_ECC_START;
writel(val, &emif_regs->NANDFCR);
break;
case NAND_ECC_READSYN:
val = emif_regs->NAND4BITECC1;

@ -51,10 +51,7 @@ typedef struct {
dv_reg NANDFCR;
dv_reg NANDFSR;
u_int8_t RSVD1[8];
dv_reg NANDF1ECC;
dv_reg NANDF2ECC;
dv_reg NANDF3ECC;
dv_reg NANDF4ECC;
dv_reg NANDFECC[4];
u_int8_t RSVD2[60];
dv_reg NAND4BITECCLOAD;
dv_reg NAND4BITECC1;
@ -68,4 +65,13 @@ typedef struct {
} emif_registers;
typedef emif_registers *emifregs;
#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4)
#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2)))
#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
#endif

@ -66,6 +66,7 @@
/* NAND: socketed, two chipselects, normally 2 GBytes */
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K

@ -65,6 +65,7 @@
/* NAND */
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_HW_ECC

@ -74,6 +74,7 @@
/* NAND: socketed, two chipselects, normally 2 GBytes */
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K

@ -75,6 +75,7 @@
#define CONFIG_SYS_NO_FLASH
#ifdef CONFIG_SYS_USE_NAND
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */

@ -114,6 +114,7 @@
/*=====================*/
#ifdef CONFIG_SYS_USE_NAND
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */

@ -83,6 +83,7 @@
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */

@ -78,6 +78,7 @@
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */

@ -114,6 +114,7 @@
/*=====================*/
#ifdef CONFIG_SYS_USE_NAND
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS 2
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */

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