From 92bde154ec91222c4d9a766052ab6dcdbf0cf410 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 3 Oct 2018 00:44:37 +0200 Subject: [PATCH 1/3] mmc: tmio: Pass full address to tmio_sd_addr_is_dmaable() Pass the entire source data pointer to tmio_sd_addr_is_dmaable() so we don't have to apply casts throughout the code. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/tmio-common.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index b311b80..6b21941 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -372,8 +372,10 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct mmc_data *data) } /* check if the address is DMA'able */ -static bool tmio_sd_addr_is_dmaable(unsigned long addr) +static bool tmio_sd_addr_is_dmaable(const char *src) { + uintptr_t addr = (uintptr_t)src; + if (!IS_ALIGNED(addr, TMIO_SD_DMA_MINALIGN)) return false; @@ -486,7 +488,7 @@ int tmio_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, if (data) { /* use DMA if the HW supports it and the buffer is aligned */ if (priv->caps & TMIO_SD_CAP_DMA_INTERNAL && - tmio_sd_addr_is_dmaable((long)data->src)) + tmio_sd_addr_is_dmaable(data->src)) ret = tmio_sd_dma_xfer(dev, data); else ret = tmio_sd_pio_xfer(dev, data); From beced53a74a32087651150b0c2a8a95eaddd53c2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 3 Oct 2018 00:46:24 +0200 Subject: [PATCH 2/3] mmc: tmio: Limit DMA to 32bit on R-Car Gen3 The internal DMAC on Gen3 is 32bit only, limit the DMA address range to 32bit. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/tmio-common.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index 6b21941..138de59 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -379,6 +379,12 @@ static bool tmio_sd_addr_is_dmaable(const char *src) if (!IS_ALIGNED(addr, TMIO_SD_DMA_MINALIGN)) return false; +#if defined(CONFIG_RCAR_GEN3) + /* Gen3 DMA has 32bit limit */ + if (addr >> 32) + return false; +#endif + #if defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARM64) && \ defined(CONFIG_SPL_BUILD) /* From ae400fde75703f2c0744fd60a5314a0d7857a67f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 9 Oct 2018 13:13:13 +0200 Subject: [PATCH 3/3] ARM: dts: rmobile: Reinstate missing CPLD on ULCB The CPLD is used to reset the ULCB and it was removed during DT sync with Linux 4.17. Reinstate it. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/dts/ulcb.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi index f66727c..ab88665 100644 --- a/arch/arm/dts/ulcb.dtsi +++ b/arch/arm/dts/ulcb.dtsi @@ -24,6 +24,15 @@ stdout-path = "serial0:115200n8"; }; + cpld { + compatible = "renesas,ulcb-cpld"; + status = "okay"; + gpio-sck = <&gpio6 8 0>; + gpio-mosi = <&gpio6 7 0>; + gpio-miso = <&gpio6 10 0>; + gpio-sstbz = <&gpio2 3 0>; + }; + audio_clkout: audio-clkout { /* * This is same as <&rcar_sound 0>