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@ -23,6 +23,7 @@ |
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*/ |
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#include <common.h> |
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#include <hwconfig.h> |
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#include <pci.h> |
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#include <asm/processor.h> |
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#include <asm/mmu.h> |
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@ -35,6 +36,7 @@ |
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#include <ioports.h> |
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#include <libfdt.h> |
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#include <fdt_support.h> |
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#include <fsl_esdhc.h> |
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#include "bcsr.h" |
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@ -152,6 +154,27 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { |
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{5, 10, 2, 0, 3}, /* UART1_CTS_B */ |
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{5, 11, 1, 0, 2}, /* UART1_RTS_B */ |
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/* QE UART */ |
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{0, 19, 1, 0, 2}, /* QEUART_TX */ |
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{1, 17, 2, 0, 3}, /* QEUART_RX */ |
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{0, 25, 1, 0, 1}, /* QEUART_RTS */ |
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{1, 23, 2, 0, 1}, /* QEUART_CTS */ |
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/* QE USB */ |
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{5, 3, 1, 0, 1}, /* USB_OE */ |
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{5, 4, 1, 0, 2}, /* USB_TP */ |
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{5, 5, 1, 0, 2}, /* USB_TN */ |
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{5, 6, 2, 0, 2}, /* USB_RP */ |
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{5, 7, 2, 0, 1}, /* USB_RX */ |
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{5, 8, 2, 0, 1}, /* USB_RN */ |
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{2, 4, 2, 0, 2}, /* CLK5 */ |
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/* SPI Flash, M25P40 */ |
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{4, 27, 3, 0, 1}, /* SPI_MOSI */ |
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{4, 28, 3, 0, 1}, /* SPI_MISO */ |
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{4, 29, 3, 0, 1}, /* SPI_CLK */ |
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{4, 30, 1, 0, 0}, /* SPI_SEL, GPIO */ |
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{0, 0, 0, 0, QE_IOP_TAB_END} /* END of table */ |
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}; |
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@ -303,6 +326,190 @@ local_bus_init(void) |
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out_be32(&lbc->lcrr, (u32)in_be32(&lbc->lcrr)| 0x00030000); |
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} |
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static void fdt_board_disable_serial(void *blob, bd_t *bd, const char *alias) |
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{ |
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const char *status = "disabled"; |
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int off; |
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int err; |
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off = fdt_path_offset(blob, alias); |
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if (off < 0) { |
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printf("WARNING: could not find %s alias: %s.\n", alias, |
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fdt_strerror(off)); |
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return; |
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} |
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err = fdt_setprop(blob, off, "status", status, strlen(status) + 1); |
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if (err) { |
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printf("WARNING: could not set status for serial0: %s.\n", |
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fdt_strerror(err)); |
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return; |
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} |
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} |
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/*
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* Because of an erratum in prototype boards it is impossible to use eSDHC |
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* without disabling UART0 (which makes it quite easy to 'brick' the board |
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* by simply issung 'setenv hwconfig esdhc', and not able to interact with |
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* U-Boot anylonger). |
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* |
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* So, but default we assume that the board is a prototype, which is a most |
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* safe assumption. There is no way to determine board revision from a |
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* register, so we use hwconfig. |
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*/ |
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static int prototype_board(void) |
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{ |
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if (hwconfig_subarg("board", "rev", NULL)) |
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return hwconfig_subarg_cmp("board", "rev", "prototype"); |
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return 1; |
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} |
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static int esdhc_disables_uart0(void) |
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{ |
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return prototype_board() || |
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hwconfig_subarg_cmp("esdhc", "mode", "4-bits"); |
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} |
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static void fdt_board_fixup_qe_uart(void *blob, bd_t *bd) |
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{ |
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u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE; |
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const char *devtype = "serial"; |
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const char *compat = "ucc_uart"; |
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const char *clk = "brg9"; |
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u32 portnum = 0; |
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int off = -1; |
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if (!hwconfig("qe_uart")) |
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return; |
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if (hwconfig("esdhc") && esdhc_disables_uart0()) { |
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printf("QE UART: won't enable with esdhc.\n"); |
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return; |
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} |
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fdt_board_disable_serial(blob, bd, "serial1"); |
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while (1) { |
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const u32 *idx; |
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int len; |
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off = fdt_node_offset_by_compatible(blob, off, "ucc_geth"); |
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if (off < 0) { |
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printf("WARNING: unable to fixup device tree for " |
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"QE UART\n"); |
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return; |
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} |
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idx = fdt_getprop(blob, off, "cell-index", &len); |
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if (!idx || len != sizeof(*idx) || *idx != fdt32_to_cpu(2)) |
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continue; |
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break; |
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} |
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fdt_setprop(blob, off, "device_type", devtype, strlen(devtype) + 1); |
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fdt_setprop(blob, off, "compatible", compat, strlen(compat) + 1); |
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fdt_setprop(blob, off, "tx-clock-name", clk, strlen(clk) + 1); |
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fdt_setprop(blob, off, "rx-clock-name", clk, strlen(clk) + 1); |
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fdt_setprop(blob, off, "port-number", &portnum, sizeof(portnum)); |
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setbits_8(&bcsr[15], BCSR15_QEUART_EN); |
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} |
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#ifdef CONFIG_FSL_ESDHC |
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int board_mmc_init(bd_t *bd) |
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{ |
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struct ccsr_gur *gur = (struct ccsr_gur *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
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u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE; |
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u8 bcsr6 = BCSR6_SD_CARD_1BIT; |
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if (!hwconfig("esdhc")) |
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return 0; |
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printf("Enabling eSDHC...\n" |
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" For eSDHC to function, I2C2 "); |
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if (esdhc_disables_uart0()) { |
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printf("and UART0 should be disabled.\n"); |
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printf(" Redirecting stderr, stdout and stdin to UART1...\n"); |
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console_assign(stderr, "eserial1"); |
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console_assign(stdout, "eserial1"); |
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console_assign(stdin, "eserial1"); |
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printf("Switched to UART1 (initial log has been printed to " |
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"UART0).\n"); |
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bcsr6 |= BCSR6_SD_CARD_4BITS; |
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} else { |
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printf("should be disabled.\n"); |
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} |
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/* Assign I2C2 signals to eSDHC. */ |
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clrsetbits_be32(&gur->plppar1, PLPPAR1_I2C_BIT_MASK, |
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PLPPAR1_ESDHC_VAL); |
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clrsetbits_be32(&gur->plpdir1, PLPDIR1_I2C_BIT_MASK, |
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PLPDIR1_ESDHC_VAL); |
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/* Mux I2C2 (and optionally UART0) signals to eSDHC. */ |
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setbits_8(&bcsr[6], bcsr6); |
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return fsl_esdhc_mmc_init(bd); |
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} |
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static void fdt_board_fixup_esdhc(void *blob, bd_t *bd) |
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{ |
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const char *status = "disabled"; |
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int off = -1; |
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if (!hwconfig("esdhc")) |
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return; |
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if (esdhc_disables_uart0()) |
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fdt_board_disable_serial(blob, bd, "serial0"); |
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while (1) { |
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const u32 *idx; |
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int len; |
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off = fdt_node_offset_by_compatible(blob, off, "fsl-i2c"); |
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if (off < 0) |
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break; |
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idx = fdt_getprop(blob, off, "cell-index", &len); |
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if (!idx || len != sizeof(*idx)) |
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continue; |
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if (*idx == 1) { |
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fdt_setprop(blob, off, "status", status, |
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strlen(status) + 1); |
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break; |
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} |
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} |
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} |
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#else |
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static inline void fdt_board_fixup_esdhc(void *blob, bd_t *bd) {} |
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#endif |
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static void fdt_board_fixup_qe_usb(void *blob, bd_t *bd) |
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{ |
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u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE; |
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if (hwconfig_subarg_cmp("qe_usb", "speed", "low")) |
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clrbits_8(&bcsr[17], BCSR17_nUSBLOWSPD); |
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else |
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setbits_8(&bcsr[17], BCSR17_nUSBLOWSPD); |
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if (hwconfig_subarg_cmp("qe_usb", "mode", "peripheral")) { |
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clrbits_8(&bcsr[17], BCSR17_USBVCC); |
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clrbits_8(&bcsr[17], BCSR17_USBMODE); |
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do_fixup_by_compat(blob, "fsl,mpc8569-qe-usb", "mode", |
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"peripheral", sizeof("peripheral"), 1); |
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} else { |
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setbits_8(&bcsr[17], BCSR17_USBVCC); |
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setbits_8(&bcsr[17], BCSR17_USBMODE); |
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} |
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clrbits_8(&bcsr[17], BCSR17_nUSBEN); |
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} |
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#ifdef CONFIG_PCIE1 |
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static struct pci_controller pcie1_hose; |
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#endif /* CONFIG_PCIE1 */ |
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@ -444,5 +651,8 @@ void ft_board_setup(void *blob, bd_t *bd) |
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#ifdef CONFIG_PCIE1 |
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ft_fsl_pci_setup(blob, "pci1", &pcie1_hose); |
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#endif |
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fdt_board_fixup_esdhc(blob, bd); |
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fdt_board_fixup_qe_uart(blob, bd); |
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fdt_board_fixup_qe_usb(blob, bd); |
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} |
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#endif |
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