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Synchronize with U-BOOT mainline

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master
Michal Simek 17 years ago
parent 329ff3c938
commit 991b089d1c
16 changed files with 119 additions and 154 deletions
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  1. 11
      Makefile
  2. 21
      board/xilinx/xupv2p/Makefile
  3. 6
      board/xilinx/xupv2p/config.mk
  4. 27
      board/xilinx/xupv2p/xparameters.h
  5. 36
      common/cmd_jffs2.c
  6. 11
      common/cmd_mfsl.c
  7. 2
      cpu/microblaze/cache.c
  8. 6
      cpu/microblaze/start.S
  9. 7
      cpu/microblaze/timer.c
  10. 3
      drivers/net/Makefile
  11. 2
      drivers/serial_xuartlite.c
  12. 2
      fs/Makefile
  13. 50
      include/configs/ml401.h
  14. 18
      include/configs/suzaku.h
  15. 63
      include/configs/xupv2p.h
  16. 8
      lib_microblaze/time.c

11
Makefile
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@ -144,7 +144,7 @@ ifeq ($(ARCH),m68k)
CROSS_COMPILE = m68k-elf-
endif
ifeq ($(ARCH),microblaze)
CROSS_COMPILE = microblaze-uclinux-
CROSS_COMPILE = mb-
endif
ifeq ($(ARCH),blackfin)
CROSS_COMPILE = bfin-uclinux-
@ -201,9 +201,8 @@ ifeq ($(CPU),ixp)
LIBS += cpu/ixp/npe/libnpe.a
endif
LIBS += lib_$(ARCH)/lib$(ARCH).a
LIBS += fs/cramfs/libcramfs.a fs/ext2/libext2fs.a fs/fat/libfat.a \
fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a \
fs/romfs/libromfs.a
LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \
fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a
LIBS += net/libnet.a
LIBS += disk/libdisk.a
LIBS += rtc/librtc.a
@ -326,14 +325,14 @@ depend dep:
tags ctags:
ctags -w -o $(OBJTREE)/ctags `find $(SUBDIRS) include \
lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \
fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\
fs/cramfs fs/fat fs/fdos fs/jffs2 \
net disk rtc dtt drivers drivers/sk98lin common \
\( -name CVS -prune \) -o \( -name '*.[ch]' -print \)`
etags:
etags -a -o $(OBJTREE)/etags `find $(SUBDIRS) include \
lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \
fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\
fs/cramfs fs/fat fs/fdos fs/jffs2 \
net disk rtc dtt drivers drivers/sk98lin common \
\( -name CVS -prune \) -o \( -name '*.[ch]' -print \)`

21
board/xilinx/xupv2p/Makefile
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@ -22,17 +22,32 @@
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
$(shell mkdir -p $(obj)../xilinx_enet)
endif
INCS := -I../common -I../xilinx_enet
CFLAGS += $(INCS)
HOST_CFLAGS += $(INCS)
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o
COBJS = $(BOARD).o \
../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \
../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \
../common/xbasic_types.o ../common/xdma_channel.o \
../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
../common/xversion.o \
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
$(LIB): $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $^
clean:
rm -f $(SOBJS) $(OBJS)

6
board/xilinx/xupv2p/config.mk
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@ -25,8 +25,8 @@
# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
#
TEXT_BASE = 0x30000000
TEXT_BASE = 0x38000000
PLATFORM_CPPFLAGS += -mxl-pattern-compare
PLATFORM_CPPFLAGS += -mno-xl-soft-mul
PLATFORM_CPPFLAGS += -mcpu=v5.00.c
PLATFORM_CPPFLAGS += -mno-xl-soft-div
PLATFORM_CPPFLAGS += -mxl-barrel-shift

27
board/xilinx/xupv2p/xparameters.h
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@ -28,24 +28,17 @@
/* System Clock Frequency */
#define XILINX_CLOCK_FREQ 100000000
/* Microblaze is microblaze_0 */
#define XILINX_USE_MSR_INSTR 1
#define XILINX_PVR 0
#define XILINX_FSL_NUMBER 0
/* Interrupt controller is opb_intc_0 */
#define XILINX_INTC_BASEADDR 0x41200000
#define XILINX_INTC_NUM_INTR_INPUTS 7
#define XILINX_INTC_NUM_INTR_INPUTS 11
/* Timer pheriphery is opb_timer_1 */
#define XILINX_TIMER_BASEADDR 0x41c00000
#define XILINX_TIMER_IRQ 0
#define XILINX_TIMER_IRQ 1
/* Uart pheriphery is RS232_Uart_1 */
#define XILINX_UARTLITE_BASEADDR 0x40600000
#define XILINX_UARTLITE_BAUDRATE 115200
/* IIC doesn't exist */
#define XILINX_UART_BASEADDR 0x40600000
#define XILINX_UART_BAUDRATE 115200
/* GPIO is LEDs_4Bit*/
#define XILINX_GPIO_BASEADDR 0x40000000
@ -58,10 +51,14 @@
/* Sysace Controller is SysACE_CompactFlash */
#define XILINX_SYSACE_BASEADDR 0x41800000
#define XILINX_SYSACE_HIGHADDR 0x4180ffff
#define XILINX_SYSACE_MEM_WIDTH 16
/* Ethernet controller is Ethernet_MAC */
#define XILINX_EMAC_BASEADDR 0x40c00000
#define XILINX_EMAC_DMA_PRESENT 3
#define XILINX_EMAC_HALF_DUPLEX_EXIST 1
#define XILINX_EMAC_MII_EXIST 1
#define XPAR_XEMAC_NUM_INSTANCES 1
#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000
#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff
#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
#define XPAR_OPB_ETHERNET_0_MII_EXIST 1

36
common/cmd_jffs2.c
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@ -85,7 +85,7 @@
*/
/*
* JFFS2/CRAMFS/ROMFS support
* JFFS2/CRAMFS support
*/
#include <common.h>
#include <command.h>
@ -175,11 +175,6 @@ extern int cramfs_load (char *loadoffset, struct part_info *info, char *filename
extern int cramfs_ls (struct part_info *info, char *filename);
extern int cramfs_info (struct part_info *info);
extern int romfs_check (struct part_info *info);
extern int romfs_load (char *loadoffset, struct part_info *info, char *filename);
extern int romfs_ls (struct part_info *info, char *filename);
extern int romfs_info (struct part_info *info);
static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int part_num);
/* command line only routines */
@ -1879,22 +1874,14 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if ((part = jffs2_part_info(current_dev, current_partnum))){
/* check partition type for JFFS2, cramfs, romfs */
if (cramfs_check(part)) {
fsname = "CRAMFS";
} else if (romfs_check(part)) {
fsname = "ROMFS";
} else {
fsname = "JFFS2";
}
/* check partition type for cramfs */
fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2");
printf("### %s loading '%s' to 0x%lx\n", fsname, filename, offset);
if (cramfs_check(part)) {
size = cramfs_load ((char *) offset, part, filename);
} else if (romfs_check(part)){
size = romfs_load ((char *) offset, part, filename);
} else {
/* if this is not cramfs or romfs assume jffs2 */
/* if this is not cramfs assume jffs2 */
size = jffs2_1pass_load((char *)offset, part, filename);
}
@ -1941,10 +1928,8 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* check partition type for cramfs */
if (cramfs_check(part)) {
ret = cramfs_ls (part, filename);
} else if (romfs_check(part)) {
ret = romfs_ls (part, filename);
} else {
/* if this is not cramfs or romfs assume jffs2 */
/* if this is not cramfs assume jffs2 */
ret = jffs2_1pass_ls(part, filename);
}
@ -1966,6 +1951,7 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
struct part_info *part;
char *fsname;
int ret;
/* make sure we are in sync with env variables */
@ -1975,17 +1961,13 @@ int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
if ((part = jffs2_part_info(current_dev, current_partnum))){
/* check partition type for cramfs */
puts("### filesystem type is ");
fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2");
printf("### filesystem type is %s\n", fsname);
if (cramfs_check(part)) {
puts("CRAMFS\n");
ret = cramfs_info (part);
} else if (romfs_check(part)) {
puts("ROMFS\n");
ret = romfs_info (part);
} else {
/* if this is not cramfs or romfs assume jffs2 */
puts("JFFS2\n");
/* if this is not cramfs assume jffs2 */
ret = jffs2_1pass_info(part);
}

11
common/cmd_mfsl.c
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@ -357,7 +357,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
reg = (unsigned int)simple_strtoul (argv[1], NULL, 16);
val = (unsigned int)simple_strtoul (argv[2], NULL, 16);
if (argc < 2) {
if (argc < 1) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
@ -382,7 +382,6 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
puts ("ESR");
break;
default:
puts ("Unsupported register\n");
return 1;
}
printf (": 0x%08lx\n", val);
@ -409,10 +408,10 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr,
" 3 - blocking control write\n");
U_BOOT_CMD (rspr, 3, 1, do_rspr,
"rspr - read/write special purpose register\n",
"rmsr - read/write special purpose register\n",
"- reg_num [write value] read/write special purpose register\n"
" 1 - MSR - Machine status register\n"
" 3 - EAR - Exception address register\n"
" 5 - ESR - Exception status register\n");
" 0 - MSR - Machine status register\n"
" 1 - EAR - Exception address register\n"
" 2 - ESR - Exception status register\n");
#endif

2
cpu/microblaze/cache.c
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@ -1,7 +1,7 @@
/*
* (C) Copyright 2007 Michal Simek
*
* Michal SIMEK <monstr@monstr.eu>
* Michal SIMEK <moonstr@monstr.eu>
*
* See file CREDITS for list of people who contributed to this
* project.

6
cpu/microblaze/start.S
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@ -33,13 +33,15 @@ _start:
addi r1, r0, CFG_INIT_SP_OFFSET
addi r1, r1, -4 /* Decrement SP to top of memory */
/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
addi r6, r0, 0xb0000000 /* hex b000 opcode imm */
addi r6, r0, 0xb000 /* hex b000 opcode imm */
bslli r6, r6, 16 /* shift */
swi r6, r0, 0x0 /* reset address */
swi r6, r0, 0x8 /* user vector exception */
swi r6, r0, 0x10 /* interrupt */
swi r6, r0, 0x20 /* hardware exception */
addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/
addi r6, r0, 0xb808 /* hew b808 opcode brai*/
bslli r6, r6, 16
swi r6, r0, 0x4 /* reset address */
swi r6, r0, 0xC /* user vector exception */
swi r6, r0, 0x14 /* interrupt */

7
cpu/microblaze/timer.c
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@ -33,17 +33,10 @@ void reset_timer (void)
timestamp = 0;
}
#ifdef CFG_TIMER_0
ulong get_timer (ulong base)
{
return (timestamp - base);
}
#else
ulong get_timer (ulong base)
{
return (timestamp++ - base);
}
#endif
void set_timer (ulong t)
{

3
drivers/net/Makefile
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@ -24,7 +24,8 @@
include $(TOPDIR)/config.mk
LIB := $(obj)libnet.a
COBJS := mcffec.o xilinx_emac.o xilinx_emaclite.o
COBJS := mcffec.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

2
drivers/serial_xuartlite.c
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@ -24,7 +24,7 @@
#include <config.h>
#ifdef XILINX_UARTLITE
#ifdef CONFIG_MICROBLAZE
#include <asm/serial_xuartlite.h>

2
fs/Makefile
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@ -22,7 +22,7 @@
#
#
SUBDIRS := romfs jffs2 cramfs fdos fat reiserfs ext2
SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2
$(obj).depend all:
@for dir in $(SUBDIRS) ; do \

50
include/configs/ml401.h
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@ -1,7 +1,7 @@
/*
* (C) Copyright 2007 Czech Technical University.
*
* Michal SIMEK <monstr@monstr.eu>
* Michal SIMEK <monstr@seznam.cz>
*
* See file CREDITS for list of people who contributed to this
* project.
@ -32,7 +32,6 @@
#define CONFIG_ML401 1 /* ML401 Board */
/* uart */
#define XILINX_UARTLITE
#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR
#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE
#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE }
@ -87,7 +86,7 @@
* 0x11FB_F000 CFG_MONITOR_BASE
* MONITOR_CODE 256kB Env
* 0x13FF_F000 CFG_GBL_DATA_OFFSET
* GLOBAL_DATA 4kB bd, gd
* GLOBAL_DATA 4kB bd, gd
* 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE
*/
@ -100,7 +99,7 @@
/* global pointer */
#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */
/* start of global data */
#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE)
#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE)
/* monitor code */
#define SIZE 0x40000
@ -146,16 +145,6 @@
#define CFG_FLASH_PROTECTION /* hardware flash protection */
#endif /* !FLASH */
/* system ace */
#ifdef XILINX_SYSACE_BASEADDR
#define CONFIG_SYSTEMACE
/* #define DEBUG_SYSTEMACE */
#define SYSTEMACE_CONFIG_FPGA
#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
#define CONFIG_DOS_PARTITION
#endif
/*
* BOOTP options
*/
@ -164,21 +153,28 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_AUTOSCRIPT
#define CONFIG_CMD_BDI
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_IMI
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_MFSL
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#if defined(CONFIG_SYSTEMACE)
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#endif
#define CONFIG_CMD_RUN
#if defined(FLASH)
#define CONFIG_CMD_ECHO
@ -190,8 +186,6 @@
#define CONFIG_CMD_ENV
#define CONFIG_CMD_SAVES
#endif
#else
#undef CONFIG_CMD_FLASH
#endif
#if defined(CONFIG_CMD_JFFS2)
@ -216,16 +210,24 @@
#define CONFIG_BOOTDELAY 30
#define CONFIG_BOOTARGS "root=romfs"
#define CONFIG_HOSTNAME "ml401"
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
#define CONFIG_IPADDR 192.168.0.3
#define CONFIG_SERVERIP 192.168.0.5
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.5
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
/* architecture dependent code */
#define CFG_USR_EXCEP /* user exception */
#define CFG_HZ 1000
/* system ace */
#define CONFIG_SYSTEMACE
/* #define DEBUG_SYSTEMACE */
#define SYSTEMACE_CONFIG_FPGA
#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
#define CONFIG_DOS_PARTITION
#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\

18
include/configs/suzaku.h
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@ -48,7 +48,6 @@
#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */
#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024))
#define XILINX_UARTLITE
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 115200 }
@ -56,16 +55,21 @@
#define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000
#define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0)
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_ENV
#undef CONFIG_CMD_MEMORY
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_MISC
#define CFG_UART1_BASE (0xFFFF2000)
#define CONFIG_SERIAL_BASE CFG_UART1_BASE
@ -104,6 +108,4 @@
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define XILINX_CLOCK_FREQ 50000000
#endif /* __CONFIG_H */

63
include/configs/xupv2p.h
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@ -31,34 +31,13 @@
#define CONFIG_XUPV2P 1
/* uart */
#ifdef XILINX_UARTLITE_BASEADDR
#define XILINX_UARTLITE
#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR
#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE
#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#else
#ifdef XILINX_UART16550_BASEADDR
#define CFG_NS16550
#define CFG_NS16550_SERIAL
#define CFG_NS16550_REG_SIZE 4
#define CONFIG_CONS_INDEX 1
#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR
#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 115200 }
#endif
#endif
/* ethernet */
#ifdef XILINX_EMAC_BASEADDR
#define XILINX_EMAC 1
#else
#ifdef XILINX_EMACLITE_BASEADDR
#define XILINX_EMACLITE 1
#endif
#endif
#undef ET_DEBUG
#define CONFIG_EMAC 1
#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES
/*
* setting reset address
@ -69,13 +48,11 @@
* U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze
* jump to CFG_RESET_ADDRESS where is the original U-BOOT code.
*/
/* #define CFG_RESET_ADDRESS 0x36000000 */
#define CFG_RESET_ADDRESS 0x36000000
/* gpio */
#ifdef XILINX_GPIO_BASEADDR
#define CFG_GPIO_0 1
#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR
#endif
/* interrupt controller */
#define CFG_INTC_0 1
@ -142,6 +119,7 @@
#define CFG_ENV_SIZE 0x1000
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE)
/*
* BOOTP options
*/
@ -150,24 +128,29 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MFSL
#define CONFIG_CMD_BDI
#define CONFIG_CMD_NET
#define CONFIG_CMD_IMI
#define CONFIG_CMD_ECHO
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_RUN
#define CONFIG_CMD_AUTOSCRIPT
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_MISC
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_PING
#ifdef XILINX_SYSACE_BASEADDR
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#endif
/* Miscellaneous configurable options */
#define CFG_PROMPT "U-Boot-mONStR> "
@ -179,7 +162,7 @@
#define CONFIG_BOOTDELAY 30
#define CONFIG_BOOTARGS "root=romfs"
#define CONFIG_HOSTNAME "xupv2p"
#define CONFIG_HOSTNAME "ml401"
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
#define CONFIG_IPADDR 192.168.0.3
#define CONFIG_SERVERIP 192.168.0.5
@ -195,13 +178,11 @@
"echo"
/* system ace */
#ifdef XILINX_SYSACE_BASEADDR
#define CONFIG_SYSTEMACE
/* #define DEBUG_SYSTEMACE */
#define SYSTEMACE_CONFIG_FPGA
#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
#define CONFIG_DOS_PARTITION
#endif
#endif /* __CONFIG_H */

8
lib_microblaze/time.c
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@ -26,17 +26,9 @@
#include <common.h>
#ifdef CFG_TIMER_0
void udelay (unsigned long usec)
{
int i;
i = get_timer (0);
while ((get_timer (0) - i) < (usec / 1000)) ;
}
#else
void udelay (unsigned long usec)
{
unsigned int i;
for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++);
}
#endif

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