fsl_esdhc: Fix max clock frequency

The max clock of MMC is 52MHz Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
14 years ago · 9a4d50e34d
parent 94c08a20fc
commit 9a4d50e34d
1 changed files with 1 additions and 1 deletions
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@ -477,7 +477,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 		mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;

 	mmc->f_min = 400000;
-	mmc->f_max = MIN(gd->sdhc_clk, 50000000);
+	mmc->f_max = MIN(gd->sdhc_clk, 52000000);

 	mmc_register(mmc);