Add minimal support (only boot from mmc device) for the Congatec Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad processor) module. Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>master
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a7efb02636
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#
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# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
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#
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# (C) Copyright 2011 Freescale Semiconductor, Inc.
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# (C) Copyright 2013 Adeneo Embedded <www.adeneo-embedded.com>
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS := cgtqmx6eval.o
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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U-Boot for the Congatec Conga-QEVAl Evaluation Carrier board with |
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qmx6 quad module. |
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This file contains information for the port of U-Boot to the Congatec |
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Conga-QEVAl Evaluation Carrier board with qmx6 quad module. |
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1. Boot source, boot from SD card |
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--------------------------------- |
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This version of u-boot works only on the SD card. By default, the |
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Congatec board can boot only from the SPI-NOR. |
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But, with the u-boot version provided with the board you can write boot |
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registers to force the board to reboot and boot from the SD slot. If |
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"bmode" command is not available from your pre-installed u-boot, these |
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instruction will produce the same effect: |
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conga-QMX6 U-Boot > mw.l 0x20d8040 0x3850 |
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conga-QMX6 U-Boot > mw.l 0x020d8044 0x10000000 |
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conga-QMX6 U-Boot > reset |
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resetting ... |
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The the board will reboot and, if you have written your SD correctly |
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the board will use u-boot that live into the SD |
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To copy the resulting u-boot.imx to the SD card: |
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dd if=u-boot.imx of=/dev/xxx bs=512 seek=2 |
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Note: Replace xxx with the device representing the SD card in your system. |
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/*
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc. |
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* Based on mx6qsabrelite.c file |
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* Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> |
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* Leo Sartre, <lsartre@adeneo-embedded.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/clock.h> |
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#include <asm/arch/imx-regs.h> |
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#include <asm/arch/iomux.h> |
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#include <asm/arch/mx6-pins.h> |
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#include <asm/gpio.h> |
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#include <asm/imx-common/iomux-v3.h> |
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#include <asm/imx-common/boot_mode.h> |
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#include <mmc.h> |
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#include <fsl_esdhc.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |\ |
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
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#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\ |
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
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int dram_init(void) |
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{ |
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); |
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return 0; |
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} |
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iomux_v3_cfg_t const uart2_pads[] = { |
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MX6_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
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MX6_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
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}; |
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iomux_v3_cfg_t const usdhc2_pads[] = { |
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MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_GPIO_4__GPIO_1_4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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}; |
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iomux_v3_cfg_t const usdhc4_pads[] = { |
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MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_DAT4__USDHC4_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_DAT5__USDHC4_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_DAT6__USDHC4_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD4_DAT7__USDHC4_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_NANDF_D6__GPIO_2_6 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ |
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}; |
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static void setup_iomux_uart(void) |
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{ |
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imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); |
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} |
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#ifdef CONFIG_FSL_ESDHC |
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struct fsl_esdhc_cfg usdhc_cfg[] = { |
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{USDHC2_BASE_ADDR}, |
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{USDHC4_BASE_ADDR}, |
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}; |
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int board_mmc_getcd(struct mmc *mmc) |
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{ |
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; |
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int ret = 0; |
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switch (cfg->esdhc_base) { |
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case USDHC2_BASE_ADDR: |
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gpio_direction_input(IMX_GPIO_NR(1, 4)); |
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ret = !gpio_get_value(IMX_GPIO_NR(1, 4)); |
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break; |
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case USDHC4_BASE_ADDR: |
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gpio_direction_input(IMX_GPIO_NR(2, 6)); |
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ret = !gpio_get_value(IMX_GPIO_NR(2, 6)); |
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break; |
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default: |
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printf("Bad USDHC interface\n"); |
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} |
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return ret; |
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} |
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int board_mmc_init(bd_t *bis) |
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{ |
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s32 status = 0; |
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); |
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); |
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imx_iomux_v3_setup_multiple_pads( |
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usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); |
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imx_iomux_v3_setup_multiple_pads( |
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usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); |
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status = fsl_esdhc_initialize(bis, &usdhc_cfg[0]) | |
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fsl_esdhc_initialize(bis, &usdhc_cfg[1]); |
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return status; |
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} |
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#endif |
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int board_early_init_f(void) |
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{ |
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setup_iomux_uart(); |
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return 0; |
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} |
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int board_init(void) |
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{ |
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/* address of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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return 0; |
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} |
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int checkboard(void) |
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{ |
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puts("Board: Conga-QEVAL QMX6 Quad\n"); |
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return 0; |
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} |
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#ifdef CONFIG_CMD_BMODE |
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static const struct boot_mode board_boot_modes[] = { |
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/* 4 bit bus width */ |
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{"mmc0", MAKE_CFGVAL(0x50, 0x20, 0x00, 0x00)}, |
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{"mmc1", MAKE_CFGVAL(0x50, 0x38, 0x00, 0x00)}, |
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{NULL, 0}, |
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}; |
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#endif |
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int misc_init_r(void) |
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{ |
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#ifdef CONFIG_CMD_BMODE |
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add_board_boot_modes(board_boot_modes); |
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#endif |
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return 0; |
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} |
@ -0,0 +1,194 @@ |
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/*
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* |
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* Congatec Conga-QEVAl board configuration file. |
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* |
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc. |
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* Based on Freescale i.MX6Q Sabre Lite board configuration file. |
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* Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> |
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* Leo Sartre, <lsartre@adeneo-embedded.com> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_CGTQMX6EVAL_H |
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#define __CONFIG_CGTQMX6EVAL_H |
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#define CONFIG_MX6 |
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#include "mx6_common.h" |
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#define CONFIG_DISPLAY_CPUINFO |
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#define CONFIG_DISPLAY_BOARDINFO |
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#define CONFIG_MACH_TYPE 4122 |
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#include <asm/arch/imx-regs.h> |
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#include <asm/imx-common/gpio.h> |
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#define CONFIG_CMDLINE_TAG |
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#define CONFIG_SETUP_MEMORY_TAGS |
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#define CONFIG_INITRD_TAG |
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#define CONFIG_REVISION_TAG |
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/* Size of malloc() pool */ |
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) |
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#define CONFIG_BOARD_EARLY_INIT_F |
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#define CONFIG_MISC_INIT_R |
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#define CONFIG_MXC_GPIO |
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#define CONFIG_MXC_UART |
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#define CONFIG_MXC_UART_BASE UART2_BASE |
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/* MMC Configs */ |
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#define CONFIG_FSL_ESDHC |
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#define CONFIG_FSL_USDHC |
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
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#define CONFIG_MMC |
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#define CONFIG_CMD_MMC |
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#define CONFIG_GENERIC_MMC |
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#define CONFIG_BOUNCE_BUFFER |
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#define CONFIG_CMD_EXT2 |
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#define CONFIG_CMD_FAT |
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#define CONFIG_DOS_PARTITION |
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/* Miscellaneous commands */ |
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#define CONFIG_CMD_BMODE |
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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#define CONFIG_CONS_INDEX 1 |
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#define CONFIG_BAUDRATE 115200 |
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/* Command definition */ |
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#include <config_cmd_default.h> |
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#undef CONFIG_CMD_IMLS |
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#define CONFIG_BOOTDELAY 3 |
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#define CONFIG_LOADADDR 0x12000000 |
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#define CONFIG_SYS_TEXT_BASE 0x17800000 |
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#define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"script=boot.scr\0" \
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"uimage=uImage\0" \
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"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
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"boot_dir=/boot\0" \
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"console=ttymxc1\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_addr=0x11000000\0" \
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"boot_fdt=try\0" \
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"mmcdev=1\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loaduimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
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"${boot_dir}/${uimage}\0" \
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"loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
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"${boot_dir}/${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootm ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootm; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootm; " \
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"fi;\0" |
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#define CONFIG_BOOTCOMMAND \ |
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loaduimage; then " \
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"run mmcboot; " \
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"else "\
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"echo ERR: Fail to boot from mmc; " \
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"fi; " \
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"fi; " \
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"else echo ERR: Fail to boot from mmc; fi" |
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/* Miscellaneous configurable options */ |
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#define CONFIG_SYS_LONGHELP |
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#define CONFIG_SYS_HUSH_PARSER |
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#define CONFIG_SYS_PROMPT "CGT-QMX6-Quad U-Boot > " |
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#define CONFIG_AUTO_COMPLETE |
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#define CONFIG_SYS_CBSIZE 256 |
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/* Print Buffer Size */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 16 |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
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#define CONFIG_SYS_MEMTEST_START 0x10000000 |
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#define CONFIG_SYS_MEMTEST_END 0x10010000 |
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 |
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
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#define CONFIG_SYS_HZ 1000 |
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#define CONFIG_CMDLINE_EDITING |
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/* Physical Memory Map */ |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
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#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) |
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
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#define CONFIG_SYS_INIT_SP_OFFSET \ |
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_INIT_SP_ADDR \ |
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
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/* FLASH and environment organization */ |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_ENV_SIZE (8 * 1024) |
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#define CONFIG_ENV_IS_IN_MMC |
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
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#define CONFIG_SYS_MMC_ENV_DEV 0 |
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#define CONFIG_OF_LIBFDT |
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#define CONFIG_CMD_BOOTZ |
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#ifndef CONFIG_SYS_DCACHE_OFF |
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#define CONFIG_CMD_CACHE |
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#endif |
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#endif /* __CONFIG_CGTQMX6EVAL_H */ |
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