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@ -2150,7 +2150,7 @@ typedef struct ccsr_gur { |
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#define PORBMSR_ROMLOC_NOR 0xf |
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u32 porimpscr; /* POR I/O impedance status & control */ |
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u32 pordevsr; /* POR I/O device status regsiter */ |
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#if defined(CONFIG_P1017) || defined(CONFIG_P1023) |
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#if defined(CONFIG_P1017) || defined(CONFIG_ARCH_P1023) |
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#define MPC85xx_PORDEVSR_SGMII1_DIS 0x10000000 |
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#define MPC85xx_PORDEVSR_SGMII2_DIS 0x08000000 |
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#define MPC85xx_PORDEVSR_TSEC1_PRTC 0x02000000 |
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@ -2165,7 +2165,7 @@ typedef struct ccsr_gur { |
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#if defined(CONFIG_P1013) || defined(CONFIG_ARCH_P1022) |
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#define MPC85xx_PORDEVSR_IO_SEL 0x007c0000 |
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#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18 |
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#elif defined(CONFIG_P1017) || defined(CONFIG_P1023) |
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#elif defined(CONFIG_P1017) || defined(CONFIG_ARCH_P1023) |
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#define MPC85xx_PORDEVSR_IO_SEL 0x00600000 |
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#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 21 |
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#else |
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@ -2268,7 +2268,7 @@ typedef struct ccsr_gur { |
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#define MPC85xx_PMUXCR_CAN2_TDM 0x00000002 |
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#define MPC85xx_PMUXCR_CAN2_RES 0x00000003 |
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#endif |
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#if defined(CONFIG_P1017) || defined(CONFIG_P1023) |
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#if defined(CONFIG_P1017) || defined(CONFIG_ARCH_P1023) |
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#define MPC85xx_PMUXCR_TSEC1_1 0x10000000 |
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#else |
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#define MPC85xx_PMUXCR_SD_DATA 0x80000000 |
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