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Merge git://git.denx.de/u-boot-fsl-qoriq

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master
Tom Rini 7 years ago
parent da773532cd 3386c73d46
commit 9c0e2f6ed3
8 changed files with 167 additions and 21 deletions
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  1. 37
      arch/arm/dts/fsl-ls1088a-qds.dts
  2. 5
      arch/arm/dts/fsl-ls1088a.dtsi
  3. 2
      board/freescale/ls1088a/MAINTAINERS
  4. 5
      board/freescale/ls1088a/ls1088a.c
  5. 43
      configs/ls1088aqds_defconfig
  6. 54
      configs/ls1088aqds_sdcard_ifc_defconfig
  7. 28
      include/configs/ls1088aqds.h
  8. 14
      include/configs/ls2080ardb.h

37
arch/arm/dts/fsl-ls1088a-qds.dts
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@ -19,6 +19,43 @@
};
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
/* NOR, NAND Flashes and FPGA on board */
ranges = <0 0 0x5 0x80000000 0x08000000
2 0 0x5 0x30000000 0x00010000
3 0 0x5 0x20000000 0x00010000>;
status = "okay";
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
};
nand@2,0 {
compatible = "fsl,ifc-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1 0x0 0x10000>;
};
fpga: board-control@3,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus", "fsl,ls1088aqds-fpga",
"fsl,fpga-qixis";
reg = <0x2 0x0 0x0000100>;
bank-width = <1>;
device-width = <1>;
ranges = <0 2 0 0x100>;
};
};
&dspi {
bus-num = <0>;
status = "okay";

5
arch/arm/dts/fsl-ls1088a.dtsi
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@ -75,6 +75,11 @@
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <4>;
};
ifc: ifc@1530000 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x2240000 0x0 0x20000>;
interrupts = <0 21 0x4>; /* Level high type */
};
usb0: usb3@3100000 {
compatible = "fsl,layerscape-dwc3";

2
board/freescale/ls1088a/MAINTAINERS
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@ -15,6 +15,8 @@ F: board/freescale/ls1088a/
F: include/configs/ls1088aqds.h
F: configs/ls1088aqds_qspi_defconfig
F: configs/ls1088aqds_sdcard_qspi_defconfig
F: configs/ls1088aqds_defconfig
F: configs/ls1088aqds_sdcard_ifc_defconfig
LS1088AQDS_QSPI_SECURE_BOOT BOARD
M: Udit Agarwal <udit.agarwal@nxp.com>

5
board/freescale/ls1088a/ls1088a.c
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@ -31,6 +31,9 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
#if defined(CONFIG_SYS_I2C_EARLY_INIT) && defined(CONFIG_TARGET_LS1088AQDS)
i2c_early_init_f();
#endif
fsl_lsch3_early_init_f();
return 0;
}
@ -168,6 +171,7 @@ int checkboard(void)
return 0;
}
#endif
bool if_board_diff_clk(void)
{
@ -221,7 +225,6 @@ unsigned long get_board_ddr_clk(void)
return 66666666;
}
#endif
int select_i2c_ch_pca9547(u8 ch)
{

43
configs/ls1088aqds_defconfig
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@ -0,0 +1,43 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1088AQDS=y
CONFIG_SYS_TEXT_BASE=0x30100000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_FSL_IFC=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_LS_PPA=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_STORAGE=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_USE_BOOTCOMMAND is not set

54
configs/ls1088aqds_sdcard_ifc_defconfig
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@ -0,0 +1,54 @@
CONFIG_ARM=y
CONFIG_TARGET_LS1088AQDS=y
CONFIG_SYS_TEXT_BASE=0x80400000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_PARTITIONS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
CONFIG_SD_BOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL=y
CONFIG_SPL_BUILD=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FSL_IFC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y

28
include/configs/ls1088aqds.h
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@ -27,7 +27,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#else
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x20000
@ -41,6 +40,8 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 100000000
#else
#define CONFIG_QIXIS_I2C_ACCESS
#define CONFIG_SYS_I2C_EARLY_INIT
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#endif
@ -89,13 +90,14 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(12)
#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \
FTIM0_NOR_TEADC(0x5) | \
FTIM0_NOR_TAVDS(0x6) | \
FTIM0_NOR_TEAHC(0x5))
#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
FTIM1_NOR_TRAD_NOR(0x1a) |\
FTIM1_NOR_TRAD_NOR(0x1a) | \
FTIM1_NOR_TSEQRAD_NOR(0x13))
#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
FTIM2_NOR_TCH(0x4) | \
FTIM2_NOR_TWPH(0x0E) | \
#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x8) | \
FTIM2_NOR_TCH(0x8) | \
FTIM2_NOR_TWPH(0xe) | \
FTIM2_NOR_TWP(0x1c))
#define CONFIG_SYS_NOR_FTIM3 0x04000000
#define CONFIG_SYS_IFC_CCR 0x01000000
@ -197,7 +199,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_MSEL_GPCM \
| CSPR_V)
#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64*1024)
#define SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(0)
#else
@ -226,7 +228,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_FPGA_CSPR_EXT
#define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR
#define CONFIG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL
#define CONFIG_SYS_AMASK2 CONFIG_SYS_FPGA_AMASK
#define CONFIG_SYS_AMASK2 SYS_FPGA_AMASK
#define CONFIG_SYS_CSOR2 CONFIG_SYS_FPGA_CSOR
#define CONFIG_SYS_CS2_FTIM0 SYS_FPGA_CS_FTIM0
#define CONFIG_SYS_CS2_FTIM1 SYS_FPGA_CS_FTIM1
@ -262,13 +264,13 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT
#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
#define CONFIG_SYS_CSPR3_FINAL CONFIG_SYS_FPGA_CSPR_FINAL
#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK
#define CONFIG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL
#define CONFIG_SYS_AMASK3 SYS_FPGA_AMASK
#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR
#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_CS_FTIM0
#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_CS_FTIM1
#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_CS_FTIM2
#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_CS_FTIM3
#define CONFIG_SYS_CS3_FTIM0 SYS_FPGA_CS_FTIM0
#define CONFIG_SYS_CS3_FTIM1 SYS_FPGA_CS_FTIM1
#define CONFIG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2
#define CONFIG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3
#endif
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000

14
include/configs/ls2080ardb.h
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@ -369,7 +369,7 @@ unsigned long get_board_sys_clk(void);
"fdt_high=0xa0000000\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x64f00000\0" \
"kernel_addr=0x65000000\0" \
"kernel_addr=0x581000000\0" \
"kernel_start=0x1000000\0" \
"kernelheader_start=0x800000\0" \
"scriptaddr=0x80000000\0" \
@ -439,8 +439,8 @@ unsigned long get_board_sys_clk(void);
"&& esbc_validate 0x20780000; " \
"env exists mcinitcmd && " \
"fsl_mc lazyapply dpl 0x20d00000; " \
"run distro_bootcmd;env exists secureboot " \
" && esbc_halt;run qspi_bootcmd; "
"run distro_bootcmd;run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;"
#elif defined(CONFIG_SD_BOOT)
/* Try to boot an on-SD kernel first, then do normal distro boot */
#define CONFIG_BOOTCOMMAND \
@ -450,16 +450,16 @@ unsigned long get_board_sys_clk(void);
"env exists mcinitcmd && run mcinitcmd " \
"&& mmc read 0x88000000 0x6800 0x800 " \
"&& fsl_mc lazyapply dpl 0x88000000; " \
"run distro_bootcmd;env exists secureboot " \
"&& esbc_halt;run sd_bootcmd;"
"run distro_bootcmd;run sd_bootcmd; " \
"env exists secureboot && esbc_halt;"
#else
/* Try to boot an on-NOR kernel first, then do normal distro boot */
#define CONFIG_BOOTCOMMAND \
"env exists mcinitcmd && env exists secureboot "\
"&& esbc_validate 0x580780000; env exists mcinitcmd "\
"&& fsl_mc lazyapply dpl 0x580d00000;" \
"run distro_bootcmd; env exists secureboot " \
"&& esbc_halt; run nor_bootcmd;"
"run distro_bootcmd;run nor_bootcmd; " \
"env exists secureboot && esbc_halt;"
#endif
/* MAC/PHY configuration */

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