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@ -79,29 +79,29 @@ static struct pll_init_data main_pll_config[MAX_SYSCLK][NUM_SPDS] = { |
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[SPD400] = {MAIN_PLL, 125, 3, 2}, |
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[SPD600] = {MAIN_PLL, 125, 2, 2}, |
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[SPD800] = {MAIN_PLL, 250, 3, 2}, |
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[SPD900] = {TETRIS_PLL, 187, 2, 2}, |
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[SPD1000] = {TETRIS_PLL, 104, 1, 2}, |
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[SPD900] = {MAIN_PLL, 187, 2, 2}, |
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[SPD1000] = {MAIN_PLL, 104, 1, 2}, |
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}, |
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[SYSCLK_24MHz] = { |
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[SPD400] = {MAIN_PLL, 100, 3, 2}, |
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[SPD600] = {MAIN_PLL, 300, 6, 2}, |
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[SPD800] = {MAIN_PLL, 200, 3, 2}, |
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[SPD900] = {TETRIS_PLL, 75, 1, 2}, |
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[SPD1000] = {TETRIS_PLL, 250, 3, 2}, |
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[SPD900] = {MAIN_PLL, 75, 1, 2}, |
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[SPD1000] = {MAIN_PLL, 250, 3, 2}, |
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}, |
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[SYSCLK_25MHz] = { |
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[SPD400] = {MAIN_PLL, 32, 1, 2}, |
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[SPD600] = {MAIN_PLL, 48, 1, 2}, |
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[SPD800] = {MAIN_PLL, 64, 1, 2}, |
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[SPD900] = {TETRIS_PLL, 72, 1, 2}, |
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[SPD1000] = {TETRIS_PLL, 80, 1, 2}, |
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[SPD900] = {MAIN_PLL, 72, 1, 2}, |
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[SPD1000] = {MAIN_PLL, 80, 1, 2}, |
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}, |
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[SYSCLK_26MHz] = { |
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[SPD400] = {MAIN_PLL, 400, 13, 2}, |
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[SPD600] = {MAIN_PLL, 230, 5, 2}, |
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[SPD800] = {MAIN_PLL, 123, 2, 2}, |
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[SPD900] = {TETRIS_PLL, 69, 1, 2}, |
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[SPD1000] = {TETRIS_PLL, 384, 5, 2}, |
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[SPD900] = {MAIN_PLL, 69, 1, 2}, |
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[SPD1000] = {MAIN_PLL, 384, 5, 2}, |
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}, |
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}; |
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