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Add I2C support to TQM8540 and TQM8560 boards (EEPROM, RTC, LM75-DTT).

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Removed CFG_CMD_DISPLAY from default commands.
Fixed compiler warning in net.c.
Patch by Stefan Roese, 31 Aug 2005
master
Stefan Roese 20 years ago
parent 77f6580cc0
commit 9d2a873bdf
8 changed files with 109 additions and 20 deletions
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  1. 5
      CHANGELOG
  2. 1
      MAKEALL
  3. 21
      board/tqm8540/tqm8540.c
  4. 21
      board/tqm8560/tqm8560.c
  5. 1
      include/cmd_confdefs.h
  6. 39
      include/configs/TQM8540.h
  7. 39
      include/configs/TQM8560.h
  8. 2
      net/net.c

5
CHANGELOG
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@ -2,6 +2,11 @@
Changes for U-Boot 1.1.4:
======================================================================
* Add I2C support to TQM8540 and TQM8560 boards (EEPROM, RTC, LM75-DTT).
Removed CFG_CMD_DISPLAY from default commands.
Fixed compiler warning in net.c.
Patch by Stefan Roese, 31 Aug 2005
* Fix problems with ld version 2.16 (dot outside sections problem)
Pointed out by Gerhard Jaeger, 31 Aug 2005;
cf. http://sourceware.org/ml/binutils/2005-08/msg00412.html

1
MAKEALL
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@ -126,6 +126,7 @@ LIST_85xx=" \
MPC8540ADS MPC8540EVAL MPC8541CDS MPC8548CDS \
MPC8555CDS MPC8560ADS PM854 PM856 \
sbc8540 sbc8560 stxgp3 TQM8540 \
TQM8560 \
"
#########################################################################

21
board/tqm8540/tqm8540.c
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@ -74,15 +74,26 @@ long int initdram (int board_type)
#if defined(CONFIG_DDR_DLL)
{
volatile ccsr_gur_t *gur = &immap->im_gur;
uint temp_ddrdll = 0;
volatile ccsr_gur_t *gur= &immap->im_gur;
int i,x;
x = 10;
/*
* Work around to stabilize DDR DLL
*/
temp_ddrdll = gur->ddrdllcr;
gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
asm ("sync;isync;msync");
gur->ddrdllcr = 0x81000000;
asm("sync;isync;msync");
udelay (200);
while (gur->ddrdllcr != 0x81000100) {
gur->devdisr = gur->devdisr | 0x00010000;
asm("sync;isync;msync");
for (i=0; i<x; i++)
;
gur->devdisr = gur->devdisr & 0xfff7ffff;
asm("sync;isync;msync");
x++;
}
}
#endif

21
board/tqm8560/tqm8560.c
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@ -229,15 +229,26 @@ long int initdram (int board_type)
#if defined(CONFIG_DDR_DLL)
{
volatile ccsr_gur_t *gur = &immap->im_gur;
uint temp_ddrdll = 0;
volatile ccsr_gur_t *gur= &immap->im_gur;
int i,x;
x = 10;
/*
* Work around to stabilize DDR DLL
*/
temp_ddrdll = gur->ddrdllcr;
gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
asm ("sync;isync;msync");
gur->ddrdllcr = 0x81000000;
asm("sync;isync;msync");
udelay (200);
while (gur->ddrdllcr != 0x81000100) {
gur->devdisr = gur->devdisr | 0x00010000;
asm("sync;isync;msync");
for (i=0; i<x; i++)
;
gur->devdisr = gur->devdisr & 0xfff7ffff;
asm("sync;isync;msync");
x++;
}
}
#endif

1
include/cmd_confdefs.h
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@ -109,6 +109,7 @@
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
CFG_CMD_DIAG | \
CFG_CMD_DISPLAY | \
CFG_CMD_DOC | \
CFG_CMD_DTT | \
CFG_CMD_ECHO | \

39
include/configs/TQM8540.h
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@ -230,11 +230,33 @@
#endif
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_HARD_I2C /* I2C with hardware support */
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CFG_I2C_NOPROBES {0x48} /* Don't probe these addrs */
/* I2C RTC */
#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */
#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
/* I2C EEPROM */
/*
* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work also).
*/
#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
#define CFG_I2C_EEPROM_ADDR_LEN 2
#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
#define CFG_EEPROM_PAGE_WRITE_ENABLE
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
#define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */
/* I2C SYSMON (LM75) */
#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
#define CFG_DTT_MAX_TEMP 70
#define CFG_DTT_LOW_TEMP -30
#define CFG_DTT_HYSTERESIS 3
/* RapidIO MMU */
#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
@ -301,7 +323,6 @@
#endif /* CONFIG_TSEC_ENET */
/*
* Environment
*/
@ -342,6 +363,9 @@
#define CONFIG_COMMANDS (CONFIG_CMD_PRIV | \
ADD_PCI_CMD | \
CFG_CMD_I2C | \
CFG_CMD_DATE | \
CFG_CMD_EEPROM | \
CFG_CMD_DTT | \
CFG_CMD_PING )
#include <cmd_confdefs.h>
@ -426,6 +450,11 @@
"bootfile=/tftpboot/tqm8540/uImage\0" \
"kernel_addr=FE000000\0" \
"ramdisk_addr=FE100000\0" \
"load=tftp 100000 /tftpboot/tqm8540/u-boot.bin\0" \
"update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
"cp.b 100000 fffc0000 40000;" \
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"

39
include/configs/TQM8560.h
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@ -38,6 +38,7 @@
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_MPC8560 1 /* MPC8560 specific */
#define CONFIG_TQM8560 1 /* TQM8560 board specific */
@ -226,11 +227,33 @@
#endif
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_HARD_I2C /* I2C with hardware support */
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CFG_I2C_NOPROBES {0x48} /* Don't probe these addrs */
/* I2C RTC */
#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */
#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
/* I2C EEPROM */
/*
* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work also).
*/
#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
#define CFG_I2C_EEPROM_ADDR_LEN 2
#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
#define CFG_EEPROM_PAGE_WRITE_ENABLE
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
#define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */
/* I2C SYSMON (LM75) */
#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
#define CFG_DTT_MAX_TEMP 70
#define CFG_DTT_LOW_TEMP -30
#define CFG_DTT_HYSTERESIS 3
/* RapidIO MMU */
#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
@ -331,6 +354,9 @@
#define CONFIG_COMMANDS (CONFIG_CMD_PRIV | \
ADD_PCI_CMD | \
CFG_CMD_I2C | \
CFG_CMD_DATE | \
CFG_CMD_EEPROM | \
CFG_CMD_DTT | \
CFG_CMD_PING )
#include <cmd_confdefs.h>
@ -415,6 +441,11 @@
"bootfile=/tftpboot/tqm8560/uImage\0" \
"kernel_addr=FE000000\0" \
"ramdisk_addr=FE100000\0" \
"load=tftp 100000 /tftpboot/tqm8560/u-boot.bin\0" \
"update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
"cp.b 100000 fffc0000 40000;" \
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"

2
net/net.c
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@ -1574,7 +1574,7 @@ unsigned
NetCksum(uchar * ptr, int len)
{
ulong xsum;
ushort *p = ptr;
ushort *p = (ushort *)ptr;
xsum = 0;
while (len-- > 0)

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