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Major PCMCIA Cleanup to make code better readable and maintainable.

Browse Source 
Notes:
- Board-dependend code for RPXLITE and RPXCLASSIC-based boards
  placed to the drivers/rpx_pmcia.c file to avoid duplication.
  Same for TQM8xx-based boards (drivers/tqm8xx_pmcia.c).
- drivers/i82365.c has been split into two parts located at
  board/atc/ti113x.c and board/cpc45/pd67290.c (ATC and CPC45 are
  the only boards using CONFIG_82365).
- Changes were tested for clean build and *very* *few* boards.
master
Wolfgang Denk 19 years ago
parent a874c8c65f
commit 9d40799551
32 changed files with 4548 additions and 3302 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 10
      CHANGELOG
  2. 2
      board/atc/Makefile
  3. 637
      board/atc/ti113x.c
  4. 2
      board/c2mon/Makefile
  5. 284
      board/c2mon/pcmcia.c
  6. 800
      board/cpc45/pd67290.c
  7. 2
      board/fads/Makefile
  8. 84
      board/fads/pcmcia.c
  9. 2
      board/gth/Makefile
  10. 93
      board/gth/pcmcia.c
  11. 2
      board/icu862/Makefile
  12. 268
      board/icu862/pcmcia.c
  13. 225
      board/kup/common/pcmcia.c
  14. 2
      board/kup/kup4k/Makefile
  15. 2
      board/kup/kup4x/Makefile
  16. 2
      board/lwmon/Makefile
  17. 240
      board/lwmon/pcmcia.c
  18. 2
      board/mbx8xx/Makefile
  19. 166
      board/mbx8xx/pcmcia.c
  20. 2
      board/netta/Makefile
  21. 370
      board/netta/pcmcia.c
  22. 2
      board/r360mpi/Makefile
  23. 236
      board/r360mpi/pcmcia.c
  24. 4
      board/uc100/Makefile
  25. 198
      board/uc100/pcmcia.c
  26. 3401
      common/cmd_pcmcia.c
  27. 6
      drivers/Makefile
  28. 302
      drivers/mpc8xx_pcmcia.c
  29. 95
      drivers/pxa_pcmcia.c
  30. 71
      drivers/rpx_pcmcia.c
  31. 328
      drivers/tqm8xx_pcmcia.c
  32. 10
      include/pcmcia.h

10
CHANGELOG
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@ -2,6 +2,16 @@
Changes since U-Boot 1.1.4:
======================================================================
* Major PCMCIA Cleanup to make code better readable and maintainable.
Notes:
- Board-dependend code for RPXLITE and RPXCLASSIC-based boards
placed to the drivers/rpx_pmcia.c file to avoid duplication.
Same for TQM8xx-based boards (drivers/tqm8xx_pmcia.c).
- drivers/i82365.c has been split into two parts located at
board/atc/ti113x.c and board/cpc45/pd67290.c (ATC and CPC45 are
the only boards using CONFIG_82365).
- Changes were tested for clean build and *very* *few* boards.
* Fix timer problems on AMCC yucca board.
Set Timer Clock Select to use CPU clock as a timer input source.

2
board/atc/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
OBJS = $(BOARD).o flash.o ti113x.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

637
board/atc/ti113x.c
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@ -0,0 +1,637 @@
/*
* (C) Copyright 2003-2005
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
********************************************************************
*
* Lots of code copied from:
*
* i82365.c 1.352 - Linux driver for Intel 82365 and compatible
* PC Card controllers, and Yenta-compatible PCI-to-CardBus controllers.
* (C) 1999 David A. Hinds <dahinds@users.sourceforge.net>
*/
#include <common.h>
#ifdef CONFIG_I82365
#include <command.h>
#include <pci.h>
#include <pcmcia.h>
#include <asm/io.h>
#include <pcmcia/ss.h>
#include <pcmcia/i82365.h>
#include <pcmcia/yenta.h>
#include <pcmcia/ti113x.h>
static struct pci_device_id supported[] = {
{PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510},
{0, 0}
};
#define CYCLE_TIME 120
#ifdef DEBUG
static void i82365_dump_regions (pci_dev_t dev);
#endif
typedef struct socket_info_t {
pci_dev_t dev;
u_short bcr;
u_char pci_lat, cb_lat, sub_bus, cache;
u_int cb_phys;
socket_cap_t cap;
u_short type;
u_int flags;
ti113x_state_t state;
} socket_info_t;
static socket_info_t socket;
static socket_state_t state;
static struct pccard_mem_map mem;
static struct pccard_io_map io;
/*====================================================================*/
/* Some PCI shortcuts */
static int pci_readb (socket_info_t * s, int r, u_char * v)
{
return pci_read_config_byte (s->dev, r, v);
}
static int pci_writeb (socket_info_t * s, int r, u_char v)
{
return pci_write_config_byte (s->dev, r, v);
}
static int pci_readw (socket_info_t * s, int r, u_short * v)
{
return pci_read_config_word (s->dev, r, v);
}
static int pci_writew (socket_info_t * s, int r, u_short v)
{
return pci_write_config_word (s->dev, r, v);
}
static int pci_readl (socket_info_t * s, int r, u_int * v)
{
return pci_read_config_dword (s->dev, r, v);
}
static int pci_writel (socket_info_t * s, int r, u_int v)
{
return pci_write_config_dword (s->dev, r, v);
}
/*====================================================================*/
#define cb_readb(s, r) readb((s)->cb_phys + (r))
#define cb_readl(s, r) readl((s)->cb_phys + (r))
#define cb_writeb(s, r, v) writeb(v, (s)->cb_phys + (r))
#define cb_writel(s, r, v) writel(v, (s)->cb_phys + (r))
static u_char i365_get (socket_info_t * s, u_short reg)
{
return cb_readb (s, 0x0800 + reg);
}
static void i365_set (socket_info_t * s, u_short reg, u_char data)
{
cb_writeb (s, 0x0800 + reg, data);
}
static void i365_bset (socket_info_t * s, u_short reg, u_char mask)
{
i365_set (s, reg, i365_get (s, reg) | mask);
}
static void i365_bclr (socket_info_t * s, u_short reg, u_char mask)
{
i365_set (s, reg, i365_get (s, reg) & ~mask);
}
#if 0 /* not used */
static void i365_bflip (socket_info_t * s, u_short reg, u_char mask, int b)
{
u_char d = i365_get (s, reg);
i365_set (s, reg, (b) ? (d | mask) : (d & ~mask));
}
static u_short i365_get_pair (socket_info_t * s, u_short reg)
{
return (i365_get (s, reg) + (i365_get (s, reg + 1) << 8));
}
#endif /* not used */
static void i365_set_pair (socket_info_t * s, u_short reg, u_short data)
{
i365_set (s, reg, data & 0xff);
i365_set (s, reg + 1, data >> 8);
}
/*======================================================================
Code to save and restore global state information for TI 1130 and
TI 1131 controllers, and to set and report global configuration
options.
======================================================================*/
static void ti113x_get_state (socket_info_t * s)
{
ti113x_state_t *p = &s->state;
pci_readl (s, TI113X_SYSTEM_CONTROL, &p->sysctl);
pci_readb (s, TI113X_CARD_CONTROL, &p->cardctl);
pci_readb (s, TI113X_DEVICE_CONTROL, &p->devctl);
pci_readb (s, TI1250_DIAGNOSTIC, &p->diag);
pci_readl (s, TI12XX_IRQMUX, &p->irqmux);
}
static void ti113x_set_state (socket_info_t * s)
{
ti113x_state_t *p = &s->state;
pci_writel (s, TI113X_SYSTEM_CONTROL, p->sysctl);
pci_writeb (s, TI113X_CARD_CONTROL, p->cardctl);
pci_writeb (s, TI113X_DEVICE_CONTROL, p->devctl);
pci_writeb (s, TI1250_MULTIMEDIA_CTL, 0);
pci_writeb (s, TI1250_DIAGNOSTIC, p->diag);
pci_writel (s, TI12XX_IRQMUX, p->irqmux);
i365_set_pair (s, TI113X_IO_OFFSET (0), 0);
i365_set_pair (s, TI113X_IO_OFFSET (1), 0);
}
static u_int ti113x_set_opts (socket_info_t * s)
{
ti113x_state_t *p = &s->state;
u_int mask = 0xffff;
p->cardctl &= ~TI113X_CCR_ZVENABLE;
p->cardctl |= TI113X_CCR_SPKROUTEN;
return mask;
}
/*======================================================================
Routines to handle common CardBus options
======================================================================*/
/* Default settings for PCI command configuration register */
#define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \
PCI_COMMAND_MASTER|PCI_COMMAND_WAIT)
static void cb_get_state (socket_info_t * s)
{
pci_readb (s, PCI_CACHE_LINE_SIZE, &s->cache);
pci_readb (s, PCI_LATENCY_TIMER, &s->pci_lat);
pci_readb (s, CB_LATENCY_TIMER, &s->cb_lat);
pci_readb (s, CB_CARDBUS_BUS, &s->cap.cardbus);
pci_readb (s, CB_SUBORD_BUS, &s->sub_bus);
pci_readw (s, CB_BRIDGE_CONTROL, &s->bcr);
}
static void cb_set_state (socket_info_t * s)
{
pci_writel (s, CB_LEGACY_MODE_BASE, 0);
pci_writel (s, PCI_BASE_ADDRESS_0, s->cb_phys);
pci_writew (s, PCI_COMMAND, CMD_DFLT);
pci_writeb (s, PCI_CACHE_LINE_SIZE, s->cache);
pci_writeb (s, PCI_LATENCY_TIMER, s->pci_lat);
pci_writeb (s, CB_LATENCY_TIMER, s->cb_lat);
pci_writeb (s, CB_CARDBUS_BUS, s->cap.cardbus);
pci_writeb (s, CB_SUBORD_BUS, s->sub_bus);
pci_writew (s, CB_BRIDGE_CONTROL, s->bcr);
}
static void cb_set_opts (socket_info_t * s)
{
if (s->cache == 0)
s->cache = 8;
if (s->pci_lat == 0)
s->pci_lat = 0xa8;
if (s->cb_lat == 0)
s->cb_lat = 0xb0;
}
/*======================================================================
Power control for Cardbus controllers: used both for 16-bit and
Cardbus cards.
======================================================================*/
static int cb_set_power (socket_info_t * s, socket_state_t * state)
{
u_int reg = 0;
/* restart card voltage detection if it seems appropriate */
if ((state->Vcc == 0) && (state->Vpp == 0) &&
!(cb_readl (s, CB_SOCKET_STATE) & CB_SS_VSENSE))
cb_writel (s, CB_SOCKET_FORCE, CB_SF_CVSTEST);
switch (state->Vcc) {
case 0:
reg = 0;
break;
case 33:
reg = CB_SC_VCC_3V;
break;
case 50:
reg = CB_SC_VCC_5V;
break;
default:
return -1;
}
switch (state->Vpp) {
case 0:
break;
case 33:
reg |= CB_SC_VPP_3V;
break;
case 50:
reg |= CB_SC_VPP_5V;
break;
case 120:
reg |= CB_SC_VPP_12V;
break;
default:
return -1;
}
if (reg != cb_readl (s, CB_SOCKET_CONTROL))
cb_writel (s, CB_SOCKET_CONTROL, reg);
return 0;
}
/*======================================================================
Generic routines to get and set controller options
======================================================================*/
static void get_bridge_state (socket_info_t * s)
{
ti113x_get_state (s);
cb_get_state (s);
}
static void set_bridge_state (socket_info_t * s)
{
cb_set_state (s);
i365_set (s, I365_GBLCTL, 0x00);
i365_set (s, I365_GENCTL, 0x00);
ti113x_set_state (s);
}
static void set_bridge_opts (socket_info_t * s)
{
ti113x_set_opts (s);
cb_set_opts (s);
}
/*====================================================================*/
#define PD67_EXT_INDEX 0x2e /* Extension index */
#define PD67_EXT_DATA 0x2f /* Extension data */
#define PD67_EXD_VS1(s) (0x01 << ((s)<<1))
#define pd67_ext_get(s, r) \
(i365_set(s, PD67_EXT_INDEX, r), i365_get(s, PD67_EXT_DATA))
static int i365_get_status (socket_info_t * s, u_int * value)
{
u_int status;
status = i365_get (s, I365_IDENT);
status = i365_get (s, I365_STATUS);
*value = ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
if (i365_get (s, I365_INTCTL) & I365_PC_IOCARD) {
*value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
} else {
*value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
*value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
}
*value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
*value |= (status & I365_CS_READY) ? SS_READY : 0;
*value |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
status = cb_readl (s, CB_SOCKET_STATE);
*value |= (status & CB_SS_32BIT) ? SS_CARDBUS : 0;
*value |= (status & CB_SS_3VCARD) ? SS_3VCARD : 0;
*value |= (status & CB_SS_XVCARD) ? SS_XVCARD : 0;
*value |= (status & CB_SS_VSENSE) ? 0 : SS_PENDING;
/* For now, ignore cards with unsupported voltage keys */
if (*value & SS_XVCARD)
*value &= ~(SS_DETECT | SS_3VCARD | SS_XVCARD);
return 0;
} /* i365_get_status */
static int i365_set_socket (socket_info_t * s, socket_state_t * state)
{
u_char reg;
set_bridge_state (s);
/* IO card, RESET flag */
reg = 0;
reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
i365_set (s, I365_INTCTL, reg);
reg = I365_PWR_NORESET;
if (state->flags & SS_PWR_AUTO)
reg |= I365_PWR_AUTO;
if (state->flags & SS_OUTPUT_ENA)
reg |= I365_PWR_OUT;
cb_set_power (s, state);
reg |= i365_get (s, I365_POWER) & (I365_VCC_MASK | I365_VPP1_MASK);
if (reg != i365_get (s, I365_POWER))
i365_set (s, I365_POWER, reg);
return 0;
} /* i365_set_socket */
/*====================================================================*/
static int i365_set_mem_map (socket_info_t * s, struct pccard_mem_map *mem)
{
u_short base, i;
u_char map;
debug ("i82365: SetMemMap(%d, %#2.2x, %d ns, %#5.5lx-%#5.5lx, %#5.5x)\n",
mem->map, mem->flags, mem->speed,
mem->sys_start, mem->sys_stop, mem->card_start);
map = mem->map;
if ((map > 4) ||
(mem->card_start > 0x3ffffff) ||
(mem->sys_start > mem->sys_stop) ||
(mem->speed > 1000)) {
return -1;
}
/* Turn off the window before changing anything */
if (i365_get (s, I365_ADDRWIN) & I365_ENA_MEM (map))
i365_bclr (s, I365_ADDRWIN, I365_ENA_MEM (map));
/* Take care of high byte, for PCI controllers */
i365_set (s, CB_MEM_PAGE (map), mem->sys_start >> 24);
base = I365_MEM (map);
i = (mem->sys_start >> 12) & 0x0fff;
if (mem->flags & MAP_16BIT)
i |= I365_MEM_16BIT;
if (mem->flags & MAP_0WS)
i |= I365_MEM_0WS;
i365_set_pair (s, base + I365_W_START, i);
i = (mem->sys_stop >> 12) & 0x0fff;
switch (mem->speed / CYCLE_TIME) {
case 0:
break;
case 1:
i |= I365_MEM_WS0;
break;
case 2:
i |= I365_MEM_WS1;
break;
default:
i |= I365_MEM_WS1 | I365_MEM_WS0;
break;
}
i365_set_pair (s, base + I365_W_STOP, i);
i = ((mem->card_start - mem->sys_start) >> 12) & 0x3fff;
if (mem->flags & MAP_WRPROT)
i |= I365_MEM_WRPROT;
if (mem->flags & MAP_ATTRIB)
i |= I365_MEM_REG;
i365_set_pair (s, base + I365_W_OFF, i);
/* Turn on the window if necessary */
if (mem->flags & MAP_ACTIVE)
i365_bset (s, I365_ADDRWIN, I365_ENA_MEM (map));
return 0;
} /* i365_set_mem_map */
static int i365_set_io_map (socket_info_t * s, struct pccard_io_map *io)
{
u_char map, ioctl;
map = io->map;
/* comment out: comparison is always false due to limited range of data type */
if ((map > 1) || /* (io->start > 0xffff) || (io->stop > 0xffff) || */
(io->stop < io->start))
return -1;
/* Turn off the window before changing anything */
if (i365_get (s, I365_ADDRWIN) & I365_ENA_IO (map))
i365_bclr (s, I365_ADDRWIN, I365_ENA_IO (map));
i365_set_pair (s, I365_IO (map) + I365_W_START, io->start);
i365_set_pair (s, I365_IO (map) + I365_W_STOP, io->stop);
ioctl = i365_get (s, I365_IOCTL) & ~I365_IOCTL_MASK (map);
if (io->speed)
ioctl |= I365_IOCTL_WAIT (map);
if (io->flags & MAP_0WS)
ioctl |= I365_IOCTL_0WS (map);
if (io->flags & MAP_16BIT)
ioctl |= I365_IOCTL_16BIT (map);
if (io->flags & MAP_AUTOSZ)
ioctl |= I365_IOCTL_IOCS16 (map);
i365_set (s, I365_IOCTL, ioctl);
/* Turn on the window if necessary */
if (io->flags & MAP_ACTIVE)
i365_bset (s, I365_ADDRWIN, I365_ENA_IO (map));
return 0;
} /* i365_set_io_map */
/*====================================================================*/
int i82365_init (void)
{
u_int val;
int i;
if ((socket.dev = pci_find_devices (supported, 0)) < 0) {
/* Controller not found */
return 1;
}
debug ("i82365 Device Found!\n");
pci_read_config_dword (socket.dev, PCI_BASE_ADDRESS_0, &socket.cb_phys);
socket.cb_phys &= ~0xf;
get_bridge_state (&socket);
set_bridge_opts (&socket);
i = i365_get_status (&socket, &val);
if (val & SS_DETECT) {
if (val & SS_3VCARD) {
state.Vcc = state.Vpp = 33;
puts (" 3.3V card found: ");
} else if (!(val & SS_XVCARD)) {
state.Vcc = state.Vpp = 50;
puts (" 5.0V card found: ");
} else {
puts ("i82365: unsupported voltage key\n");
state.Vcc = state.Vpp = 0;
}
} else {
/* No card inserted */
puts ("No card\n");
return 1;
}
state.flags = SS_IOCARD | SS_OUTPUT_ENA;
state.csc_mask = 0;
state.io_irq = 0;
i365_set_socket (&socket, &state);
for (i = 500; i; i--) {
if ((i365_get (&socket, I365_STATUS) & I365_CS_READY))
break;
udelay (1000);
}
if (i == 0) {
/* PC Card not ready for data transfer */
puts ("i82365 PC Card not ready for data transfer\n");
return 1;
}
debug (" PC Card ready for data transfer: ");
mem.map = 0;
mem.flags = MAP_ATTRIB | MAP_ACTIVE;
mem.speed = 300;
mem.sys_start = CFG_PCMCIA_MEM_ADDR;
mem.sys_stop = CFG_PCMCIA_MEM_ADDR + CFG_PCMCIA_MEM_SIZE - 1;
mem.card_start = 0;
i365_set_mem_map (&socket, &mem);
io.map = 0;
io.flags = MAP_AUTOSZ | MAP_ACTIVE;
io.speed = 0;
io.start = 0x0100;
io.stop = 0x010F;
i365_set_io_map (&socket, &io);
#ifdef DEBUG
i82365_dump_regions (socket.dev);
#endif
return 0;
}
void i82365_exit (void)
{
io.map = 0;
io.flags = 0;
io.speed = 0;
io.start = 0;
io.stop = 0x1;
i365_set_io_map (&socket, &io);
mem.map = 0;
mem.flags = 0;
mem.speed = 0;
mem.sys_start = 0;
mem.sys_stop = 0x1000;
mem.card_start = 0;
i365_set_mem_map (&socket, &mem);
socket.state.sysctl &= 0xFFFF00FF;
state.Vcc = state.Vpp = 0;
i365_set_socket (&socket, &state);
}
int pcmcia_on (void)
{
u_int rc;
debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
rc = i82365_init();
if (rc)
goto exit;
rc = check_ide_device(0);
if (rc == 0)
goto exit;
i82365_exit();
exit:
return rc;
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_off (void)
{
printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
i82365_exit();
return 0;
}
#endif
/*======================================================================
Debug stuff
======================================================================*/
#ifdef DEBUG
static void i82365_dump_regions (pci_dev_t dev)
{
u_int tmp[2];
u_int *mem = (void *) socket.cb_phys;
u_char *cis = (void *) CFG_PCMCIA_MEM_ADDR;
u_char *ide = (void *) (CFG_ATA_BASE_ADDR + CFG_ATA_REG_OFFSET);
pci_read_config_dword (dev, 0x00, tmp + 0);
pci_read_config_dword (dev, 0x80, tmp + 1);
printf ("PCI CONF: %08X ... %08X\n",
tmp[0], tmp[1]);
printf ("PCI MEM: ... %08X ... %08X\n",
mem[0x8 / 4], mem[0x800 / 4]);
printf ("CIS: ...%c%c%c%c%c%c%c%c...\n",
cis[0x38], cis[0x3a], cis[0x3c], cis[0x3e],
cis[0x40], cis[0x42], cis[0x44], cis[0x48]);
printf ("CIS CONF: %02X %02X %02X ...\n",
cis[0x200], cis[0x202], cis[0x204]);
printf ("IDE: %02X %02X %02X %02X %02X %02X %02X %02X\n",
ide[0], ide[1], ide[2], ide[3],
ide[4], ide[5], ide[6], ide[7]);
}
#endif /* DEBUG */
#endif /* CONFIG_I82365 */

2
board/c2mon/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
OBJS = $(BOARD).o flash.o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

284
board/c2mon/pcmcia.c
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#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
#define PCMCIA_BOARD_MSG "C2MON"
static void cfg_ports (void)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
ushort sreg;
immap = (immap_t *)CFG_IMMR;
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/*
* Configure Port C for TPS2211 PC-Card Power-Interface Switch
*
* Switch off all voltages, assert shutdown
*/
sreg = immap->im_ioport.iop_pcdat;
sreg |= (TPS2211_VPPD0 | TPS2211_VPPD1); /* VAVPP => Hi-Z */
sreg &= ~(TPS2211_VCCD0 | TPS2211_VCCD1); /* 3V and 5V off */
immap->im_ioport.iop_pcdat = sreg;
immap->im_ioport.iop_pcpar &= ~(TPS2211_OUTPUTS);
immap->im_ioport.iop_pcdir |= TPS2211_OUTPUTS;
debug ("Set Port C: PAR: %04x DIR: %04x DAT: %04x\n",
immap->im_ioport.iop_pcpar,
immap->im_ioport.iop_pcdir,
immap->im_ioport.iop_pcdat);
/*
* Configure Port B for TPS2211 PC-Card Power-Interface Switch
*
* Over-Current Input only
*/
cp->cp_pbpar &= ~(TPS2211_INPUTS);
cp->cp_pbdir &= ~(TPS2211_INPUTS);
debug ("Set Port B: PAR: %08x DIR: %08x DAT: %08x\n",
cp->cp_pbpar, cp->cp_pbdir, cp->cp_pbdat);
}
int pcmcia_hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, pipr, mask;
ushort sreg;
int i;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/* Configure Ports for TPS2211A PC-Card Power-Interface Switch */
cfg_ports ();
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On: Set VAVCC to 3.3V or 5V, set VAVPP to Hi-Z
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
pipr = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
pipr,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
sreg = immap->im_ioport.iop_pcdat;
if ((pipr & mask) == mask) {
sreg |= (TPS2211_VPPD0 | TPS2211_VPPD1 | /* VAVPP => Hi-Z */
TPS2211_VCCD1); /* 5V on */
sreg &= ~(TPS2211_VCCD0); /* 3V off */
puts (" 5.0V card found: ");
} else {
sreg |= (TPS2211_VPPD0 | TPS2211_VPPD1 | /* VAVPP => Hi-Z */
TPS2211_VCCD0); /* 3V on */
sreg &= ~(TPS2211_VCCD1); /* 5V off */
puts (" 3.3V card found: ");
}
debug ("\nPC DAT: %04x -> 3.3V %s 5.0V %s\n",
sreg,
( (sreg & TPS2211_VCCD0) && !(sreg & TPS2211_VCCD1)) ? "on" : "off",
(!(sreg & TPS2211_VCCD0) && (sreg & TPS2211_VCCD1)) ? "on" : "off"
);
immap->im_ioport.iop_pcdat = sreg;
/* Wait 500 ms; use this to check for over-current */
for (i=0; i<5000; ++i) {
if ((cp->cp_pbdat & TPS2211_OC) == 0) {
printf (" *** Overcurrent - Safety shutdown ***\n");
immap->im_ioport.iop_pcdat &= ~(TPS2211_VCCD0|TPS2211_VCCD1);
return (1);
}
udelay (100);
}
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/* Configure PCMCIA General Control Register */
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
/* ALl voltages off / Hi-Z */
immap->im_ioport.iop_pcdat |= (TPS2211_VPPD0 | TPS2211_VPPD1 |
TPS2211_VCCD0 | TPS2211_VCCD1 );
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
u_long reg;
ushort sreg;
debug ("voltage_set: "
PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
immap = (immap_t *)CFG_IMMR;
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Configure Port C pins for
* 5 Volts Enable and 3 Volts enable,
* Turn all power pins to Hi-Z
*/
debug ("PCMCIA power OFF\n");
cfg_ports (); /* Enables switch, but all in Hi-Z */
sreg = immap->im_ioport.iop_pcdat;
sreg |= TPS2211_VPPD0 | TPS2211_VPPD1; /* VAVPP always Hi-Z */
switch(vcc) {
case 0: break; /* Switch off */
case 33: sreg |= TPS2211_VCCD0; /* Switch on 3.3V */
sreg &= ~TPS2211_VCCD1;
break;
case 50: sreg &= ~TPS2211_VCCD0; /* Switch on 5.0V */
sreg |= TPS2211_VCCD1;
break;
default: goto done;
}
/* Checking supported voltages */
debug ("PIPR: 0x%x --> %s\n",
pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
immap->im_ioport.iop_pcdat = sreg;
#ifdef DEBUG
{
char *s;
if ((sreg & TPS2211_VCCD0) && !(sreg & TPS2211_VCCD1)) {
s = "at 3.3V";
} else if (!(sreg & TPS2211_VCCD0) && (sreg & TPS2211_VCCD1)) {
s = "at 5.0V";
} else {
s = "down";
}
printf ("PCMCIA powered %s\n", s);
}
#endif
done:
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* CONFIG_PCMCIA */

800
board/cpc45/pd67290.c
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/* pd67290.c - system configuration module for SPD67290
/*
* (C) Copyright 2003-2005
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -18,51 +20,799 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* (C) 2004 DENX Software Engineering, Heiko Schocher <hs@denx.de>
********************************************************************
*
* Lots of code copied from:
*
* i82365.c 1.352 - Linux driver for Intel 82365 and compatible
* PC Card controllers, and Yenta-compatible PCI-to-CardBus controllers.
* (C) 1999 David A. Hinds <dahinds@users.sourceforge.net>
*/
#include <common.h>
#include <malloc.h>
#include <net.h>
#include <asm/io.h>
#ifdef CONFIG_I82365
#include <command.h>
#include <pci.h>
#include <pcmcia.h>
#include <asm/io.h>
/* imports */
#include <mpc824x.h>
#include <pcmcia/ss.h>
#include <pcmcia/i82365.h>
#include <pcmcia/yenta.h>
#include <pcmcia/cirrus.h>
static struct pci_device_id supported[] = {
{PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6729},
{}
{0, 0}
};
#define CYCLE_TIME 120
#ifdef DEBUG
static void i82365_dump_regions (pci_dev_t dev);
#endif
typedef struct socket_info_t {
pci_dev_t dev;
u_short bcr;
u_char pci_lat, cb_lat, sub_bus, cache;
u_int cb_phys;
socket_cap_t cap;
u_short type;
u_int flags;
cirrus_state_t c_state;
} socket_info_t;
/* These definitions must match the pcic table! */
typedef enum pcic_id {
IS_PD6710, IS_PD672X, IS_VT83C469
} pcic_id;
typedef struct pcic_t {
char *name;
} pcic_t;
static pcic_t pcic[] = {
{" Cirrus PD6710: "},
{" Cirrus PD672x: "},
{" VIA VT83C469: "},
};
/***************************************************************************
*
* SPD67290Init -
*
* RETURNS: -1 on error, 0 if OK
*/
static socket_info_t socket;
static socket_state_t state;
static struct pccard_mem_map mem;
static struct pccard_io_map io;
int SPD67290Init (void)
/*====================================================================*/
/* Some PCI shortcuts */
static int pci_readb (socket_info_t * s, int r, u_char * v)
{
return pci_read_config_byte (s->dev, r, v);
}
static int pci_writeb (socket_info_t * s, int r, u_char v)
{
return pci_write_config_byte (s->dev, r, v);
}
static int pci_readw (socket_info_t * s, int r, u_short * v)
{
return pci_read_config_word (s->dev, r, v);
}
static int pci_writew (socket_info_t * s, int r, u_short v)
{
pci_dev_t devno;
int idx = 0; /* general index */
ulong membaseCsr; /* base address of device memory space */
return pci_write_config_word (s->dev, r, v);
}
/* find PD67290 device */
if ((devno = pci_find_devices (supported, idx++)) < 0) {
printf ("No PD67290 device found !!\n");
/*====================================================================*/
#define cb_readb(s) readb((s)->cb_phys + 1)
#define cb_writeb(s, v) writeb(v, (s)->cb_phys)
#define cb_writeb2(s, v) writeb(v, (s)->cb_phys + 1)
#define cb_readl(s, r) readl((s)->cb_phys + (r))
#define cb_writel(s, r, v) writel(v, (s)->cb_phys + (r))
static u_char i365_get (socket_info_t * s, u_short reg)
{
u_char val;
#ifdef CONFIG_PCMCIA_SLOT_A
int slot = 0;
#else
int slot = 1;
#endif
val = I365_REG (slot, reg);
cb_writeb (s, val);
val = cb_readb (s);
debug ("i365_get slot:%x reg: %x val: %x\n", slot, reg, val);
return val;
}
static void i365_set (socket_info_t * s, u_short reg, u_char data)
{
#ifdef CONFIG_PCMCIA_SLOT_A
int slot = 0;
#else
int slot = 1;
#endif
u_char val;
val = I365_REG (slot, reg);
cb_writeb (s, val);
cb_writeb2 (s, data);
debug ("i365_set slot:%x reg: %x data:%x\n", slot, reg, data);
}
static void i365_bset (socket_info_t * s, u_short reg, u_char mask)
{
i365_set (s, reg, i365_get (s, reg) | mask);
}
static void i365_bclr (socket_info_t * s, u_short reg, u_char mask)
{
i365_set (s, reg, i365_get (s, reg) & ~mask);
}
#if 0 /* not used */
static void i365_bflip (socket_info_t * s, u_short reg, u_char mask, int b)
{
u_char d = i365_get (s, reg);
i365_set (s, reg, (b) ? (d | mask) : (d & ~mask));
}
static u_short i365_get_pair (socket_info_t * s, u_short reg)
{
return (i365_get (s, reg) + (i365_get (s, reg + 1) << 8));
}
#endif /* not used */
static void i365_set_pair (socket_info_t * s, u_short reg, u_short data)
{
i365_set (s, reg, data & 0xff);
i365_set (s, reg + 1, data >> 8);
}
/*======================================================================
Code to save and restore global state information for Cirrus
PD67xx controllers, and to set and report global configuration
options.
======================================================================*/
#define flip(v,b,f) (v = ((f)<0) ? v : ((f) ? ((v)|(b)) : ((v)&(~b))))
static void cirrus_get_state (socket_info_t * s)
{
int i;
cirrus_state_t *p = &s->c_state;
p->misc1 = i365_get (s, PD67_MISC_CTL_1);
p->misc1 &= (PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA);
p->misc2 = i365_get (s, PD67_MISC_CTL_2);
for (i = 0; i < 6; i++)
p->timer[i] = i365_get (s, PD67_TIME_SETUP (0) + i);
}
static void cirrus_set_state (socket_info_t * s)
{
int i;
u_char misc;
cirrus_state_t *p = &s->c_state;
misc = i365_get (s, PD67_MISC_CTL_2);
i365_set (s, PD67_MISC_CTL_2, p->misc2);
if (misc & PD67_MC2_SUSPEND)
udelay (50000);
misc = i365_get (s, PD67_MISC_CTL_1);
misc &= ~(PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA);
i365_set (s, PD67_MISC_CTL_1, misc | p->misc1);
for (i = 0; i < 6; i++)
i365_set (s, PD67_TIME_SETUP (0) + i, p->timer[i]);
}
static u_int cirrus_set_opts (socket_info_t * s)
{
cirrus_state_t *p = &s->c_state;
u_int mask = 0xffff;
#if DEBUG
char buf[200];
memset (buf, 0, 200);
#endif
if (has_ring == -1)
has_ring = 1;
flip (p->misc2, PD67_MC2_IRQ15_RI, has_ring);
flip (p->misc2, PD67_MC2_DYNAMIC_MODE, dynamic_mode);
#if DEBUG
if (p->misc2 & PD67_MC2_IRQ15_RI)
strcat (buf, " [ring]");
if (p->misc2 & PD67_MC2_DYNAMIC_MODE)
strcat (buf, " [dyn mode]");
if (p->misc1 & PD67_MC1_INPACK_ENA)
strcat (buf, " [inpack]");
#endif
if (p->misc2 & PD67_MC2_IRQ15_RI)
mask &= ~0x8000;
if (has_led > 0) {
#if DEBUG
strcat (buf, " [led]");
#endif
mask &= ~0x1000;
}
if (has_dma > 0) {
#if DEBUG
strcat (buf, " [dma]");
#endif
mask &= ~0x0600;
flip (p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass);
#if DEBUG
if (p->misc2 & PD67_MC2_FREQ_BYPASS)
strcat (buf, " [freq bypass]");
#endif
}
if (setup_time >= 0)
p->timer[0] = p->timer[3] = setup_time;
if (cmd_time > 0) {
p->timer[1] = cmd_time;
p->timer[4] = cmd_time * 2 + 4;
}
if (p->timer[1] == 0) {
p->timer[1] = 6;
p->timer[4] = 16;
if (p->timer[0] == 0)
p->timer[0] = p->timer[3] = 1;
}
if (recov_time >= 0)
p->timer[2] = p->timer[5] = recov_time;
debug ("i82365 Opt: %s [%d/%d/%d] [%d/%d/%d]\n",
buf,
p->timer[0], p->timer[1], p->timer[2],
p->timer[3], p->timer[4], p->timer[5]);
return mask;
}
/*======================================================================
Routines to handle common CardBus options
======================================================================*/
/* Default settings for PCI command configuration register */
#define CMD_DFLT (PCI_COMMAND_IO|PCI_COMMAND_MEMORY| \
PCI_COMMAND_MASTER|PCI_COMMAND_WAIT)
static void cb_get_state (socket_info_t * s)
{
pci_readb (s, PCI_CACHE_LINE_SIZE, &s->cache);
pci_readb (s, PCI_LATENCY_TIMER, &s->pci_lat);
pci_readb (s, CB_LATENCY_TIMER, &s->cb_lat);
pci_readb (s, CB_CARDBUS_BUS, &s->cap.cardbus);
pci_readb (s, CB_SUBORD_BUS, &s->sub_bus);
pci_readw (s, CB_BRIDGE_CONTROL, &s->bcr);
}
static void cb_set_state (socket_info_t * s)
{
pci_writew (s, PCI_COMMAND, CMD_DFLT);
pci_writeb (s, PCI_CACHE_LINE_SIZE, s->cache);
pci_writeb (s, PCI_LATENCY_TIMER, s->pci_lat);
pci_writeb (s, CB_LATENCY_TIMER, s->cb_lat);
pci_writeb (s, CB_CARDBUS_BUS, s->cap.cardbus);
pci_writeb (s, CB_SUBORD_BUS, s->sub_bus);
pci_writew (s, CB_BRIDGE_CONTROL, s->bcr);
}
static void cb_set_opts (socket_info_t * s)
{
}
/*======================================================================
Power control for Cardbus controllers: used both for 16-bit and
Cardbus cards.
======================================================================*/
static int cb_set_power (socket_info_t * s, socket_state_t * state)
{
u_int reg = 0;
reg = I365_PWR_NORESET;
if (state->flags & SS_PWR_AUTO)
reg |= I365_PWR_AUTO;
if (state->flags & SS_OUTPUT_ENA)
reg |= I365_PWR_OUT;
if (state->Vpp != 0) {
if (state->Vpp == 120) {
reg |= I365_VPP1_12V;
puts (" 12V card found: ");
} else if (state->Vpp == state->Vcc) {
reg |= I365_VPP1_5V;
} else {
puts (" power not found: ");
return -1;
}
}
if (state->Vcc != 0) {
reg |= I365_VCC_5V;
if (state->Vcc == 33) {
puts (" 3.3V card found: ");
i365_bset (s, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
} else if (state->Vcc == 50) {
puts (" 5V card found: ");
i365_bclr (s, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
} else {
puts (" power not found: ");
return -1;
}
}
if (reg != i365_get (s, I365_POWER)) {
reg = (I365_PWR_OUT | I365_PWR_NORESET | I365_VCC_5V | I365_VPP1_5V);
i365_set (s, I365_POWER, reg);
}
return 0;
}
/*======================================================================
Generic routines to get and set controller options
======================================================================*/
static void get_bridge_state (socket_info_t * s)
{
cirrus_get_state (s);
cb_get_state (s);
}
static void set_bridge_state (socket_info_t * s)
{
cb_set_state (s);
i365_set (s, I365_GBLCTL, 0x00);
i365_set (s, I365_GENCTL, 0x00);
cirrus_set_state (s);
}
static void set_bridge_opts (socket_info_t * s)
{
cirrus_set_opts (s);
cb_set_opts (s);
}
/*====================================================================*/
#define PD67_EXT_INDEX 0x2e /* Extension index */
#define PD67_EXT_DATA 0x2f /* Extension data */
#define PD67_EXD_VS1(s) (0x01 << ((s)<<1))
#define pd67_ext_get(s, r) \
(i365_set(s, PD67_EXT_INDEX, r), i365_get(s, PD67_EXT_DATA))
static int i365_get_status (socket_info_t * s, u_int * value)
{
u_int status;
u_char val;
u_char power, vcc, vpp;
u_int powerstate;
status = i365_get (s, I365_IDENT);
status = i365_get (s, I365_STATUS);
*value = ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
if (i365_get (s, I365_INTCTL) & I365_PC_IOCARD) {
*value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
} else {
*value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
*value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
}
*value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
*value |= (status & I365_CS_READY) ? SS_READY : 0;
*value |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
/* Check for Cirrus CL-PD67xx chips */
i365_set (s, PD67_CHIP_INFO, 0);
val = i365_get (s, PD67_CHIP_INFO);
s->type = -1;
if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) {
val = i365_get (s, PD67_CHIP_INFO);
if ((val & PD67_INFO_CHIP_ID) == 0) {
s->type = (val & PD67_INFO_SLOTS) ? IS_PD672X : IS_PD6710;
i365_set (s, PD67_EXT_INDEX, 0xe5);
if (i365_get (s, PD67_EXT_INDEX) != 0xe5)
s->type = IS_VT83C469;
}
} else {
printf ("no Cirrus Chip found\n");
*value = 0;
return -1;
}
/* - 0xfe000000 see MPC 8245 Users Manual Adress Map B */
membaseCsr = PCMCIA_IO_BASE - 0xfe000000;
power = i365_get (s, I365_POWER);
state.flags |= (power & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
state.flags |= (power & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
vcc = power & I365_VCC_MASK;
vpp = power & I365_VPP1_MASK;
state.Vcc = state.Vpp = 0;
if((vcc== 0) || (vpp == 0)) {
/*
* On the Cirrus we get the info which card voltage
* we have in EXTERN DATA and write it to MISC_CTL1
*/
powerstate = pd67_ext_get(s, PD67_EXTERN_DATA);
if (powerstate & PD67_EXD_VS1(0)) {
/* 5V Card */
i365_bclr (s, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
} else {
/* 3.3V Card */
i365_bset (s, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
}
i365_set (s, I365_POWER, (I365_PWR_OUT | I365_PWR_NORESET | I365_VCC_5V | I365_VPP1_5V));
power = i365_get (s, I365_POWER);
}
if (power & I365_VCC_5V) {
state.Vcc = (i365_get(s, PD67_MISC_CTL_1) & PD67_MC1_VCC_3V) ? 33 : 50;
}
if (power == I365_VPP1_12V)
state.Vpp = 120;
/* IO card, RESET flags, IO interrupt */
power = i365_get (s, I365_INTCTL);
state.flags |= (power & I365_PC_RESET) ? 0 : SS_RESET;
if (power & I365_PC_IOCARD)
state.flags |= SS_IOCARD;
state.io_irq = power & I365_IRQ_MASK;
/* Card status change mask */
power = i365_get (s, I365_CSCINT);
state.csc_mask = (power & I365_CSC_DETECT) ? SS_DETECT : 0;
if (state.flags & SS_IOCARD)
state.csc_mask |= (power & I365_CSC_STSCHG) ? SS_STSCHG : 0;
else {
state.csc_mask |= (power & I365_CSC_BVD1) ? SS_BATDEAD : 0;
state.csc_mask |= (power & I365_CSC_BVD2) ? SS_BATWARN : 0;
state.csc_mask |= (power & I365_CSC_READY) ? SS_READY : 0;
}
debug ("i82365: GetStatus(0) = flags %#3.3x, Vcc %d, Vpp %d, "
"io_irq %d, csc_mask %#2.2x\n", state.flags,
state.Vcc, state.Vpp, state.io_irq, state.csc_mask);
return 0;
} /* i365_get_status */
static int i365_set_socket (socket_info_t * s, socket_state_t * state)
{
u_char reg;
set_bridge_state (s);
/* IO card, RESET flag */
reg = 0;
reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
i365_set (s, I365_INTCTL, reg);
cb_set_power (s, state);
#if 0
/* Card status change interrupt mask */
reg = s->cs_irq << 4;
if (state->csc_mask & SS_DETECT)
reg |= I365_CSC_DETECT;
if (state->flags & SS_IOCARD) {
if (state->csc_mask & SS_STSCHG)
reg |= I365_CSC_STSCHG;
} else {
if (state->csc_mask & SS_BATDEAD)
reg |= I365_CSC_BVD1;
if (state->csc_mask & SS_BATWARN)
reg |= I365_CSC_BVD2;
if (state->csc_mask & SS_READY)
reg |= I365_CSC_READY;
}
i365_set (s, I365_CSCINT, reg);
i365_get (s, I365_CSC);
#endif /* 0 */
return 0;
} /* i365_set_socket */
/*====================================================================*/
static int i365_set_mem_map (socket_info_t * s, struct pccard_mem_map *mem)
{
u_short base, i;
u_char map;
debug ("i82365: SetMemMap(%d, %#2.2x, %d ns, %#5.5lx-%#5.5lx, %#5.5x)\n",
mem->map, mem->flags, mem->speed,
mem->sys_start, mem->sys_stop, mem->card_start);
map = mem->map;
if ((map > 4) ||
(mem->card_start > 0x3ffffff) ||
(mem->sys_start > mem->sys_stop) ||
(mem->speed > 1000)) {
return -1;
}
/* Turn off the window before changing anything */
if (i365_get (s, I365_ADDRWIN) & I365_ENA_MEM (map))
i365_bclr (s, I365_ADDRWIN, I365_ENA_MEM (map));
/* Take care of high byte, for PCI controllers */
i365_set (s, CB_MEM_PAGE (map), mem->sys_start >> 24);
base = I365_MEM (map);
i = (mem->sys_start >> 12) & 0x0fff;
if (mem->flags & MAP_16BIT)
i |= I365_MEM_16BIT;
if (mem->flags & MAP_0WS)
i |= I365_MEM_0WS;
i365_set_pair (s, base + I365_W_START, i);
i = (mem->sys_stop >> 12) & 0x0fff;
switch (mem->speed / CYCLE_TIME) {
case 0:
break;
case 1:
i |= I365_MEM_WS0;
break;
case 2:
i |= I365_MEM_WS1;
break;
default:
i |= I365_MEM_WS1 | I365_MEM_WS0;
break;
}
i365_set_pair (s, base + I365_W_STOP, i);
i = 0;
if (mem->flags & MAP_WRPROT)
i |= I365_MEM_WRPROT;
if (mem->flags & MAP_ATTRIB)
i |= I365_MEM_REG;
i365_set_pair (s, base + I365_W_OFF, i);
/* set System Memory map Upper Adress */
i365_set(s, PD67_EXT_INDEX, PD67_MEM_PAGE(map));
i365_set(s, PD67_EXT_DATA, ((mem->sys_start >> 24) & 0xff));
/* Turn on the window if necessary */
if (mem->flags & MAP_ACTIVE)
i365_bset (s, I365_ADDRWIN, I365_ENA_MEM (map));
return 0;
} /* i365_set_mem_map */
static int i365_set_io_map (socket_info_t * s, struct pccard_io_map *io)
{
u_char map, ioctl;
map = io->map;
/* comment out: comparison is always false due to limited range of data type */
if ((map > 1) || /* (io->start > 0xffff) || (io->stop > 0xffff) || */
(io->stop < io->start))
return -1;
/* Turn off the window before changing anything */
if (i365_get (s, I365_ADDRWIN) & I365_ENA_IO (map))
i365_bclr (s, I365_ADDRWIN, I365_ENA_IO (map));
i365_set_pair (s, I365_IO (map) + I365_W_START, io->start);
i365_set_pair (s, I365_IO (map) + I365_W_STOP, io->stop);
ioctl = i365_get (s, I365_IOCTL) & ~I365_IOCTL_MASK (map);
if (io->speed)
ioctl |= I365_IOCTL_WAIT (map);
if (io->flags & MAP_0WS)
ioctl |= I365_IOCTL_0WS (map);
if (io->flags & MAP_16BIT)
ioctl |= I365_IOCTL_16BIT (map);
if (io->flags & MAP_AUTOSZ)
ioctl |= I365_IOCTL_IOCS16 (map);
i365_set (s, I365_IOCTL, ioctl);
/* Turn on the window if necessary */
if (io->flags & MAP_ACTIVE)
i365_bset (s, I365_ADDRWIN, I365_ENA_IO (map));
return 0;
} /* i365_set_io_map */
/*====================================================================*/
/*
* PCI_ADDR = (HOST_ADDR - 0xfe000000)
* see MPC 8245 Users Manual Adress Map B
*/
#define HOST_TO_PCI(addr) ((addr) - 0xfe000000)
#define PCI_TO_HOST(addr) ((addr) + 0xfe000000)
int i82365_init (void)
{
u_int val;
int i;
if ((socket.dev = pci_find_devices (supported, 0)) < 0) {
/* Controller not found */
printf ("No PD67290 device found !!\n");
return 1;
}
debug ("i82365 Device Found!\n");
socket.cb_phys = PCMCIA_IO_BASE;
/* set base address */
pci_write_config_dword (devno, PCI_BASE_ADDRESS_0, membaseCsr);
pci_write_config_dword (socket.dev, PCI_BASE_ADDRESS_0,
HOST_TO_PCI(socket.cb_phys));
/* enable mapped memory and IO addresses */
pci_write_config_dword (devno,
pci_write_config_dword (socket.dev,
PCI_COMMAND,
PCI_COMMAND_MEMORY |
PCI_COMMAND_IO | PCI_COMMAND_WAIT);
get_bridge_state (&socket);
set_bridge_opts (&socket);
i = i365_get_status (&socket, &val);
if (i > -1) {
puts (pcic[socket.type].name);
} else {
printf ("i82365: Controller not found.\n");
return 1;
}
if((val & SS_DETECT) != SS_DETECT){
puts ("No card\n");
return 1;
}
state.flags |= SS_OUTPUT_ENA;
i365_set_socket (&socket, &state);
for (i = 500; i; i--) {
if ((i365_get (&socket, I365_STATUS) & I365_CS_READY))
break;
udelay (1000);
}
if (i == 0) {
/* PC Card not ready for data transfer */
puts ("i82365 PC Card not ready for data transfer\n");
return 1;
}
debug (" PC Card ready for data transfer: ");
mem.map = 0;
mem.flags = MAP_ATTRIB | MAP_ACTIVE;
mem.speed = 300;
mem.sys_start = CFG_PCMCIA_MEM_ADDR;
mem.sys_stop = CFG_PCMCIA_MEM_ADDR + CFG_PCMCIA_MEM_SIZE - 1;
mem.card_start = 0;
i365_set_mem_map (&socket, &mem);
mem.map = 1;
mem.flags = MAP_ACTIVE;
mem.speed = 300;
mem.sys_start = CFG_PCMCIA_MEM_ADDR + CFG_PCMCIA_MEM_SIZE;
mem.sys_stop = CFG_PCMCIA_MEM_ADDR + (2 * CFG_PCMCIA_MEM_SIZE) - 1;
mem.card_start = 0;
i365_set_mem_map (&socket, &mem);
#ifdef DEBUG
i82365_dump_regions (socket.dev);
#endif
return 0;
}
void i82365_exit (void)
{
io.map = 0;
io.flags = 0;
io.speed = 0;
io.start = 0;
io.stop = 0x1;
i365_set_io_map (&socket, &io);
mem.map = 0;
mem.flags = 0;
mem.speed = 0;
mem.sys_start = 0;
mem.sys_stop = 0x1000;
mem.card_start = 0;
i365_set_mem_map (&socket, &mem);
mem.map = 1;
mem.flags = 0;
mem.speed = 0;
mem.sys_start = 0;
mem.sys_stop = 0x1000;
mem.card_start = 0;
i365_set_mem_map (&socket, &mem);
state.Vcc = state.Vpp = 0;
i365_set_socket (&socket, &state);
}
int pcmcia_on (void)
{
u_int rc;
debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
rc = i82365_init();
if (rc)
goto exit;
rc = check_ide_device(0);
if (rc == 0)
goto exit;
i82365_exit();
exit:
return rc;
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_off (void)
{
printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
i82365_exit();
return 0;
}
#endif
/*======================================================================
Debug stuff
======================================================================*/
#ifdef DEBUG
static void i82365_dump_regions (pci_dev_t dev)
{
u_int tmp[2];
u_int *mem = (void *) socket.cb_phys;
u_char *cis = (void *) CFG_PCMCIA_MEM_ADDR;
u_char *ide = (void *) (CFG_ATA_BASE_ADDR + CFG_ATA_REG_OFFSET);
pci_read_config_dword (dev, 0x00, tmp + 0);
pci_read_config_dword (dev, 0x80, tmp + 1);
printf ("PCI CONF: %08X ... %08X\n",
tmp[0], tmp[1]);
printf ("PCI MEM: ... %08X ... %08X\n",
mem[0x8 / 4], mem[0x800 / 4]);
printf ("CIS: ...%c%c%c%c%c%c%c%c...\n",
cis[0x38], cis[0x3a], cis[0x3c], cis[0x3e],
cis[0x40], cis[0x42], cis[0x44], cis[0x48]);
printf ("CIS CONF: %02X %02X %02X ...\n",
cis[0x200], cis[0x202], cis[0x204]);
printf ("IDE: %02X %02X %02X %02X %02X %02X %02X %02X\n",
ide[0], ide[1], ide[2], ide[3],
ide[4], ide[5], ide[6], ide[7]);
}
#endif /* DEBUG */
#endif /* CONFIG_I82365 */

2
board/fads/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o lamp.o
OBJS = $(BOARD).o flash.o lamp.o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

84
board/fads/pcmcia.c
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@ -0,0 +1,84 @@
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
#ifdef CONFIG_ADS
#define PCMCIA_BOARD_MSG "ADS"
#else
#define PCMCIA_BOARD_MSG "FADS"
#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
u_long reg = 0;
switch(vpp) {
case 0: reg = 0; break;
case 50: reg = 1; break;
case 120: reg = 2; break;
default: return 1;
}
switch(vcc) {
case 0: reg = 0; break;
#ifdef CONFIG_ADS
case 50: reg = BCSR1_PCCVCCON; break;
#endif
#ifdef CONFIG_FADS
case 33: reg = BCSR1_PCCVCC0 | BCSR1_PCCVCC1; break;
case 50: reg = BCSR1_PCCVCC1; break;
#endif
default: return 1;
}
/* first, turn off all power */
#ifdef CONFIG_ADS
*((uint *)BCSR1) |= BCSR1_PCCVCCON;
#endif
#ifdef CONFIG_FADS
*((uint *)BCSR1) &= ~(BCSR1_PCCVCC0 | BCSR1_PCCVCC1);
#endif
*((uint *)BCSR1) &= ~BCSR1_PCCVPP_MASK;
/* enable new powersettings */
#ifdef CONFIG_ADS
*((uint *)BCSR1) &= ~reg;
#endif
#ifdef CONFIG_FADS
*((uint *)BCSR1) |= reg;
#endif
*((uint *)BCSR1) |= reg << 20;
return 0;
}
int pcmcia_hardware_enable(int slot)
{
*((uint *)BCSR1) &= ~BCSR1_PCCEN;
return 0;
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
*((uint *)BCSR1) &= ~BCSR1_PCCEN;
return 0;
}
#endif /* CFG_CMD_PCMCIA */
#endif /* CONFIG_PCMCIA */

2
board/gth/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o ee_access.o
OBJS = $(BOARD).o flash.o ee_access.o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

93
board/gth/pcmcia.c
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@ -0,0 +1,93 @@
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
#define PCMCIA_BOARD_MSG "GTH COMPACT FLASH"
int pcmcia_voltage_set (int slot, int vcc, int vpp)
{ /* Do nothing */
return 0;
}
int pcmcia_hardware_enable (int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
debug ("hardware_enable: GTH Slot %c\n", 'A' + slot);
immap = (immap_t *) CFG_IMMR;
sysp = (sysconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *) (&(((immap_t *) CFG_IMMR)->im_cpm));
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK (_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK (_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX (_slot_) = reg;
udelay (500);
/*
* Make sure there is a card in the slot,
* then configure the interface.
*/
udelay (10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__, __FUNCTION__,
&(pcmp->pcmc_pipr), pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & 0x98000000) {
printf (" No Card found\n");
return (1);
}
mask = PCMCIA_VS1 (slot) | PCMCIA_VS2 (slot);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
reg,
(reg & PCMCIA_VS1 (slot)) ? "n" : "ff",
(reg & PCMCIA_VS2 (slot)) ? "n" : "ff");
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX (_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX (_slot_) = reg;
udelay (250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return 0;
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
return 0; /* No hardware to disable */
}
#endif
#endif /* CONFIG_PCMCIA */

2
board/icu862/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
OBJS = $(BOARD).o flash.o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

268
board/icu862/pcmcia.c
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@ -0,0 +1,268 @@
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
#define PCMCIA_BOARD_MSG "ICU862"
static void cfg_port_B (void)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
uint reg;
immap = (immap_t *)CFG_IMMR;
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/*
* Configure Port B for TPS2205 PC-Card Power-Interface Switch
*
* Switch off all voltages, assert shutdown
*/
reg = cp->cp_pbdat;
reg |= (TPS2205_VPP_PGM | TPS2205_VPP_VCC | /* VAVPP => Hi-Z */
TPS2205_VCC3 | TPS2205_VCC5 | /* VAVCC => Hi-Z */
TPS2205_SHDN); /* enable switch */
cp->cp_pbdat = reg;
cp->cp_pbpar &= ~(TPS2205_INPUTS | TPS2205_OUTPUTS);
reg = cp->cp_pbdir & ~(TPS2205_INPUTS);
cp->cp_pbdir = reg | TPS2205_OUTPUTS;
debug ("Set Port B: PAR: %08x DIR: %08x DAT: %08x\n",
cp->cp_pbpar, cp->cp_pbdir, cp->cp_pbdat);
}
int pcmcia_hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, pipr, mask;
int i;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/* Configure Port B for TPS2205 PC-Card Power-Interface Switch */
cfg_port_B ();
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On: Set VAVCC to 3.3V or 5V, set VAVPP to Hi-Z
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
pipr = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
pipr,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
reg = cp->cp_pbdat;
if ((pipr & mask) == mask) {
reg |= (TPS2205_VPP_PGM | TPS2205_VPP_VCC | /* VAVPP => Hi-Z */
TPS2205_VCC3); /* 3V off */
reg &= ~(TPS2205_VCC5); /* 5V on */
puts (" 5.0V card found: ");
} else {
reg |= (TPS2205_VPP_PGM | TPS2205_VPP_VCC | /* VAVPP => Hi-Z */
TPS2205_VCC5); /* 5V off */
reg &= ~(TPS2205_VCC3); /* 3V on */
puts (" 3.3V card found: ");
}
debug ("\nPB DAT: %08x -> 3.3V %s 5.0V %s VPP_PGM %s VPP_VCC %s\n",
reg,
(reg & TPS2205_VCC3) ? "off" : "on",
(reg & TPS2205_VCC5) ? "off" : "on",
(reg & TPS2205_VPP_PGM) ? "off" : "on",
(reg & TPS2205_VPP_VCC) ? "off" : "on" );
cp->cp_pbdat = reg;
/* Wait 500 ms; use this to check for over-current */
for (i=0; i<5000; ++i) {
if ((cp->cp_pbdat & TPS2205_OC) == 0) {
printf (" *** Overcurrent - Safety shutdown ***\n");
cp->cp_pbdat &= ~(TPS2205_SHDN);
return (1);
}
udelay (100);
}
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/* Shut down */
cp->cp_pbdat &= ~(TPS2205_SHDN);
/* Configure PCMCIA General Control Register */
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("voltage_set: "
PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
immap = (immap_t *)CFG_IMMR;
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Configure Port C pins for
* 5 Volts Enable and 3 Volts enable,
* Turn all power pins to Hi-Z
*/
debug ("PCMCIA power OFF\n");
cfg_port_B (); /* Enables switch, but all in Hi-Z */
reg = cp->cp_pbdat;
switch(vcc) {
case 0: break; /* Switch off */
case 33: reg &= ~TPS2205_VCC3; break; /* Switch on 3.3V */
case 50: reg &= ~TPS2205_VCC5; break; /* Switch on 5.0V */
default: goto done;
}
/* Checking supported voltages */
debug ("PIPR: 0x%x --> %s\n",
pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
cp->cp_pbdat = reg;
#ifdef DEBUG
{
char *s;
if ((reg & TPS2205_VCC3) == 0) {
s = "at 3.3V";
} else if ((reg & TPS2205_VCC5) == 0) {
s = "at 5.0V";
} else {
s = "down";
}
printf ("PCMCIA powered %s\n", s);
}
#endif
done:
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* CONFIG_PCMCIA */

225
board/kup/common/pcmcia.c
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@ -0,0 +1,225 @@
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
#define PCMCIA_BOARD_MSG "KUP"
#define KUP4K_PCMCIA_B_3V3 (0x00020000)
int pcmcia_hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(slot);
pcmp->pcmc_per &= ~PCMCIA_MASK(slot);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(slot) = reg;
udelay(2500);
/*
* Configure Port B pins for
* 3 Volts enable
*/
if (slot) { /* Slot A is built-in */
cp->cp_pbdir |= KUP4K_PCMCIA_B_3V3;
cp->cp_pbpar &= ~KUP4K_PCMCIA_B_3V3;
/* remove all power */
cp->cp_pbdat |= KUP4K_PCMCIA_B_3V3; /* active low */
}
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On.
*/
printf("%s Slot %c:", slot ? "" : "\n", 'A' + slot);
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
reg,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
if ((reg & mask) == mask) {
puts (" 5.0V card found: NOT SUPPORTED !!!\n");
} else {
if(slot)
cp->cp_pbdat &= ~KUP4K_PCMCIA_B_3V3;
puts (" 3.3V card found: ");
}
#if 0
/* VCC switch error flag, PCMCIA slot INPACK_ pin */
cp->cp_pbdir &= ~(0x0020 | 0x0010);
cp->cp_pbpar &= ~(0x0020 | 0x0010);
udelay(500000);
#endif
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(slot);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(slot) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/* remove all power */
if (slot)
cp->cp_pbdat |= KUP4K_PCMCIA_B_3V3;
/* Configure PCMCIA General Control Register */
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(slot) = reg;
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("voltage_set: " \
PCMCIA_BOARD_MSG \
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
if (!slot) /* Slot A is not configurable */
return 0;
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(slot);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(slot) = reg;
udelay(500);
debug ("PCMCIA power OFF\n");
/*
* Configure Port B pins for
* 3 Volts enable
*/
cp->cp_pbdir |= KUP4K_PCMCIA_B_3V3;
cp->cp_pbpar &= ~KUP4K_PCMCIA_B_3V3;
/* remove all power */
cp->cp_pbdat |= KUP4K_PCMCIA_B_3V3; /* active low */
switch(vcc) {
case 0: break;
case 33:
cp->cp_pbdat &= ~KUP4K_PCMCIA_B_3V3;
debug ("PCMCIA powered at 3.3V\n");
break;
case 50:
debug ("PCMCIA: 5Volt vcc not supported\n");
break;
default:
puts("PCMCIA: vcc not supported");
break;
}
udelay(10000);
/* Checking supported voltages */
debug ("PIPR: 0x%x --> %s\n",
pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & (0x80000000 >> (slot << 4)))
? "only 5 V --> NOT SUPPORTED"
: "can do 3.3V");
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(slot);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(slot) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* CONFIG_PCMCIA */

2
board/kup/kup4k/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o
OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o ../common/pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

2
board/kup/kup4x/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o
OBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o ../common/pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

2
board/lwmon/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
OBJS = $(BOARD).o flash.o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

240
board/lwmon/pcmcia.c
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#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#include <i2c.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
#define PCMCIA_BOARD_MSG "LWMON"
/* #define's for MAX1604 Power Switch */
#define MAX1604_OP_SUS 0x80
#define MAX1604_VCCBON 0x40
#define MAX1604_VCC_35 0x20
#define MAX1604_VCCBHIZ 0x10
#define MAX1604_VPPBON 0x08
#define MAX1604_VPPBPBPGM 0x04
#define MAX1604_VPPBHIZ 0x02
/* reserved 0x01 */
int pcmcia_hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
uchar val;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
/* Switch on PCMCIA port in PIC register 0x60 */
reg = pic_read (0x60);
debug ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
reg &= ~0x10;
/* reg |= 0x08; Vpp not needed */
pic_write (0x60, reg);
#ifdef DEBUG
reg = pic_read (0x60);
printf ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
#endif
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On.
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
reg,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
if ((reg & mask) == mask) {
val = 0; /* VCCB3/5 = 0 ==> use Vx = 5.0 V */
puts (" 5.0V card found: ");
} else {
val = MAX1604_VCC_35; /* VCCB3/5 = 1 ==> use Vy = 3.3 V */
puts (" 3.3V card found: ");
}
/* switch VCC on */
val |= MAX1604_OP_SUS | MAX1604_VCCBON;
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
udelay(500000);
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
uchar val;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/* remove all power, put output in high impedance state */
val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ;
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
/* Configure PCMCIA General Control Register */
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
/* Switch off PCMCIA port in PIC register 0x60 */
reg = pic_read (0x60);
debug ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
reg |= 0x10;
reg &= ~0x08;
pic_write (0x60, reg);
#ifdef DEBUG
reg = pic_read (0x60);
printf ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);
#endif
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
uchar val;
debug ("voltage_set: "
PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Turn off all power (switch to high impedance)
*/
debug ("PCMCIA power OFF\n");
val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ;
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
val = 0;
switch(vcc) {
case 0: break;
case 33: val = MAX1604_VCC_35; break;
case 50: break;
default: goto done;
}
/* Checking supported voltages */
debug ("PIPR: 0x%x --> %s\n",
pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
i2c_write (CFG_I2C_POWER_A_ADDR, 0, 0, &val, 1);
if (val) {
debug ("PCMCIA powered at %sV\n",
(val & MAX1604_VCC_35) ? "3.3" : "5.0");
} else {
debug ("PCMCIA powered down\n");
}
done:
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* CONFIG_PCMCIA */

2
board/mbx8xx/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o vpd.o
OBJS = $(BOARD).o flash.o vpd.o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

166
board/mbx8xx/pcmcia.c
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#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#include "csr.h"
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
/* A lot of this has been taken from the RPX code in this file it works from me.
I have added the voltage selection for the MBX board. */
/* MBX voltage bit in control register #2 */
#define CR2_VPP12 ((uchar)0x10)
#define CR2_VPPVDD ((uchar)0x20)
#define CR2_VDD5 ((uchar)0x40)
#define CR2_VDD3 ((uchar)0x80)
#define PCMCIA_BOARD_MSG "MBX860"
int pcmcia_voltage_set (int slot, int vcc, int vpp)
{
uchar reg = 0;
debug ("voltage_set: PCMCIA_BOARD_MSG Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A' + slot, vcc / 10, vcc % 10, vpp / 10, vcc % 10);
switch (vcc) {
case 0:
break;
case 33:
reg |= CR2_VDD3;
break;
case 50:
reg |= CR2_VDD5;
break;
default:
return 1;
}
switch (vpp) {
case 0:
break;
case 33:
case 50:
if (vcc == vpp) {
reg |= CR2_VPPVDD;
} else {
return 1;
}
break;
case 120:
reg |= CR2_VPP12;
break;
default:
return 1;
}
/* first, turn off all power */
MBX_CSR2 &= ~(CR2_VDDSEL | CR2_VPPSEL);
/* enable new powersettings */
MBX_CSR2 |= reg;
debug ("MBX_CSR2 read = 0x%02x\n", MBX_CSR2);
return (0);
}
int pcmcia_hardware_enable (int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n",
'A' + slot);
udelay (10000);
immap = (immap_t *) CFG_IMMR;
sysp = (sysconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *) (&(((immap_t *) CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *) (&(((immap_t *) CFG_IMMR)->im_cpm));
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK (_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK (_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX (_slot_) = reg;
udelay (500);
/* remove all power */
pcmcia_voltage_set (slot, 0, 0);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
#ifndef CONFIG_HMI10
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
#else
if (pcmp->pcmc_pipr & (0x10000000 >> (slot << 4))) {
#endif /* CONFIG_HMI10 */
printf (" No Card found\n");
return (1);
}
/*
* Power On.
*/
mask = PCMCIA_VS1 (_slot_) | PCMCIA_VS2 (_slot_);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n", reg,
(reg & PCMCIA_VS1 (slot)) ? "n" : "ff",
(reg & PCMCIA_VS2 (slot)) ? "n" : "ff");
if ((reg & mask) == mask) {
pcmcia_voltage_set (_slot_, 50, 0);
printf (" 5.0V card found: ");
} else {
pcmcia_voltage_set (_slot_, 33, 0);
printf (" 3.3V card found: ");
}
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX (_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX (_slot_) = reg;
udelay (250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable (int slot)
{
return 0; /* No hardware to disable */
}
#endif /* CFG_CMD_PCMCIA */
#endif /* CONFIG_PCMCIA */

2
board/netta/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o dsp.o codec.o
OBJS = $(BOARD).o flash.o dsp.o codec.o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

370
board/netta/pcmcia.c
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@ -0,0 +1,370 @@
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
/* some sane bit macros */
#define _BD(_b) (1U << (31-(_b)))
#define _BDR(_l, _h) (((((1U << (31-(_l))) - 1) << 1) | 1) & ~((1U << (31-(_h))) - 1))
#define _BW(_b) (1U << (15-(_b)))
#define _BWR(_l, _h) (((((1U << (15-(_l))) - 1) << 1) | 1) & ~((1U << (15-(_h))) - 1))
#define _BB(_b) (1U << (7-(_b)))
#define _BBR(_l, _h) (((((1U << (7-(_l))) - 1) << 1) | 1) & ~((1U << (7-(_h))) - 1))
#define _B(_b) _BD(_b)
#define _BR(_l, _h) _BDR(_l, _h)
#define PCMCIA_BOARD_MSG "NETTA"
static const unsigned short vppd_masks[2] = { _BW(14), _BW(15) };
static void cfg_vppd(int no)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
unsigned short mask;
if ((unsigned int)no >= sizeof(vppd_masks)/sizeof(vppd_masks[0]))
return;
mask = vppd_masks[no];
immap->im_ioport.iop_papar &= ~mask;
immap->im_ioport.iop_paodr &= ~mask;
immap->im_ioport.iop_padir |= mask;
}
static void set_vppd(int no, int what)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
unsigned short mask;
if ((unsigned int)no >= sizeof(vppd_masks)/sizeof(vppd_masks[0]))
return;
mask = vppd_masks[no];
if (what)
immap->im_ioport.iop_padat |= mask;
else
immap->im_ioport.iop_padat &= ~mask;
}
static const unsigned short vccd_masks[2] = { _BW(10), _BW(6) };
static void cfg_vccd(int no)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
unsigned short mask;
if ((unsigned int)no >= sizeof(vccd_masks)/sizeof(vccd_masks[0]))
return;
mask = vccd_masks[no];
immap->im_ioport.iop_papar &= ~mask;
immap->im_ioport.iop_paodr &= ~mask;
immap->im_ioport.iop_padir |= mask;
}
static void set_vccd(int no, int what)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
unsigned short mask;
if ((unsigned int)no >= sizeof(vccd_masks)/sizeof(vccd_masks[0]))
return;
mask = vccd_masks[no];
if (what)
immap->im_ioport.iop_padat |= mask;
else
immap->im_ioport.iop_padat &= ~mask;
}
static const unsigned short oc_mask = _BW(8);
static void cfg_oc(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
unsigned short mask = oc_mask;
immap->im_ioport.iop_pcdir &= ~mask;
immap->im_ioport.iop_pcso &= ~mask;
immap->im_ioport.iop_pcint &= ~mask;
immap->im_ioport.iop_pcpar &= ~mask;
}
static int get_oc(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
unsigned short mask = oc_mask;
int what;
what = !!(immap->im_ioport.iop_pcdat & mask);;
return what;
}
static const unsigned short shdn_mask = _BW(12);
static void cfg_shdn(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
unsigned short mask;
mask = shdn_mask;
immap->im_ioport.iop_papar &= ~mask;
immap->im_ioport.iop_paodr &= ~mask;
immap->im_ioport.iop_padir |= mask;
}
static void set_shdn(int what)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
unsigned short mask;
mask = shdn_mask;
if (what)
immap->im_ioport.iop_padat |= mask;
else
immap->im_ioport.iop_padat &= ~mask;
}
static void cfg_ports (void)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
immap = (immap_t *)CFG_IMMR;
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
cfg_vppd(0); cfg_vppd(1); /* VPPD0,VPPD1 VAVPP => Hi-Z */
cfg_vccd(0); cfg_vccd(1); /* 3V and 5V off */
cfg_shdn();
cfg_oc();
/*
* Configure Port A for TPS2211 PC-Card Power-Interface Switch
*
* Switch off all voltages, assert shutdown
*/
set_vppd(0, 1); set_vppd(1, 1);
set_vccd(0, 0); set_vccd(1, 0);
set_shdn(1);
udelay(100000);
}
int pcmcia_hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, pipr, mask;
int i;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/* Configure Ports for TPS2211A PC-Card Power-Interface Switch */
cfg_ports ();
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On: Set VAVCC to 3.3V or 5V, set VAVPP to Hi-Z
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
pipr = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
pipr,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
if ((pipr & mask) == mask) {
set_vppd(0, 1); set_vppd(1, 1); /* VAVPP => Hi-Z */
set_vccd(0, 0); set_vccd(1, 1); /* 5V on, 3V off */
puts (" 5.0V card found: ");
} else {
set_vppd(0, 1); set_vppd(1, 1); /* VAVPP => Hi-Z */
set_vccd(0, 1); set_vccd(1, 0); /* 5V off, 3V on */
puts (" 3.3V card found: ");
}
/* Wait 500 ms; use this to check for over-current */
for (i=0; i<5000; ++i) {
if (!get_oc()) {
printf (" *** Overcurrent - Safety shutdown ***\n");
set_vccd(0, 0); set_vccd(1, 0); /* VAVPP => Hi-Z */
return (1);
}
udelay (100);
}
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/* Configure PCMCIA General Control Register */
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
/* All voltages off / Hi-Z */
set_vppd(0, 1); set_vppd(1, 1);
set_vccd(0, 1); set_vccd(1, 1);
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
u_long reg;
ushort sreg;
debug ("voltage_set: "
PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
immap = (immap_t *)CFG_IMMR;
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Configure Port C pins for
* 5 Volts Enable and 3 Volts enable,
* Turn all power pins to Hi-Z
*/
debug ("PCMCIA power OFF\n");
cfg_ports (); /* Enables switch, but all in Hi-Z */
sreg = immap->im_ioport.iop_pcdat;
set_vppd(0, 1); set_vppd(1, 1);
switch(vcc) {
case 0:
break; /* Switch off */
case 33:
set_vccd(0, 1); set_vccd(1, 0);
break;
case 50:
set_vccd(0, 0); set_vccd(1, 1);
break;
default:
goto done;
}
/* Checking supported voltages */
debug ("PIPR: 0x%x --> %s\n",
pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
done:
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* CONFIG_PCMCIA */

2
board/r360mpi/Makefile
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@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
OBJS = $(BOARD).o flash.o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

236
board/r360mpi/pcmcia.c
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@ -0,0 +1,236 @@
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
#define PCMCIA_BOARD_MSG "R360MPI"
int pcmcia_hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Configure Ports A, B & C pins for
* 5 Volts Enable and 3 Volts enable
*/
immap->im_ioport.iop_pcpar &= ~(0x0400);
immap->im_ioport.iop_pcso &= ~(0x0400);/*
immap->im_ioport.iop_pcdir |= 0x0400;*/
immap->im_ioport.iop_papar &= ~(0x0200);/*
immap->im_ioport.iop_padir |= 0x0200;*/
#if 0
immap->im_ioport.iop_pbpar &= ~(0xC000);
immap->im_ioport.iop_pbdir &= ~(0xC000);
#endif
/* remove all power */
immap->im_ioport.iop_pcdat |= 0x0400;
immap->im_ioport.iop_padat |= 0x0200;
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On.
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
reg,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
if ((reg & mask) == mask) {
immap->im_ioport.iop_pcdat &= ~(0x4000);
puts (" 5.0V card found: ");
} else {
immap->im_ioport.iop_padat &= ~(0x0002);
puts (" 3.3V card found: ");
}
immap->im_ioport.iop_pcdir |= 0x0400;
immap->im_ioport.iop_padir |= 0x0200;
#if 0
/* VCC switch error flag, PCMCIA slot INPACK_ pin */
cp->cp_pbdir &= ~(0x0020 | 0x0010);
cp->cp_pbpar &= ~(0x0020 | 0x0010);
udelay(500000);
#endif
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/* remove all power */
immap->im_ioport.iop_pcdat |= 0x0400;
immap->im_ioport.iop_padat |= 0x0200;
/* Configure PCMCIA General Control Register */
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("voltage_set: "
PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Configure Ports A & C pins for
* 5 Volts Enable and 3 Volts enable,
* Turn off all power
*/
debug ("PCMCIA power OFF\n");
immap->im_ioport.iop_pcpar &= ~(0x0400);
immap->im_ioport.iop_pcso &= ~(0x0400);/*
immap->im_ioport.iop_pcdir |= 0x0400;*/
immap->im_ioport.iop_papar &= ~(0x0200);/*
immap->im_ioport.iop_padir |= 0x0200;*/
immap->im_ioport.iop_pcdat |= 0x0400;
immap->im_ioport.iop_padat |= 0x0200;
reg = 0;
switch(vcc) {
case 0: break;
case 33: reg |= 0x0200; break;
case 50: reg |= 0x0400; break;
default: goto done;
}
/* Checking supported voltages */
debug ("PIPR: 0x%x --> %s\n",
pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
if (reg & 0x0200)
immap->im_ioport.iop_pcdat &= !reg;
if (reg & 0x0400)
immap->im_ioport.iop_padat &= !reg;
immap->im_ioport.iop_pcdir |= 0x0200;
immap->im_ioport.iop_padir |= 0x0400;
if (reg) {
debug ("PCMCIA powered at %sV\n",
(reg&0x0400) ? "5.0" : "3.3");
} else {
debug ("PCMCIA powered down\n");
}
done:
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* CCONFIG_PCMCIA */

4
board/uc100/Makefile
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@ -25,8 +25,8 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
#OBJS = $(BOARD).o flash.o
OBJS = $(BOARD).o
#OBJS = $(BOARD).o flash.o pcmcia.o
OBJS = $(BOARD).o pcmcia.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

198
board/uc100/pcmcia.c
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@ -0,0 +1,198 @@
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#ifdef CONFIG_PCMCIA
#define PCMCIA_BOARD_MSG "UC100"
/*
* Remark: don't turn off OE "__MY_PCMCIA_GCRX_CXOE" on UC100 board.
* This leads to board-hangup! (sr, 8 Dez. 2004)
*/
static void cfg_ports (void)
{
volatile immap_t *immap;
immap = (immap_t *)CFG_IMMR;
/*
* Configure Port A for MAX1602 PC-Card Power-Interface Switch
*/
immap->im_ioport.iop_padat &= ~0x8000; /* set port x output to low */
immap->im_ioport.iop_padir |= 0x8000; /* enable port x as output */
debug ("Set Port A: PAR: %08x DIR: %08x DAT: %08x\n",
immap->im_ioport.iop_papar, immap->im_ioport.iop_padir,
immap->im_ioport.iop_padat);
}
int pcmcia_hardware_enable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
volatile sysconf8xx_t *sysp;
uint reg, mask;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
udelay(10000);
immap = (immap_t *)CFG_IMMR;
sysp = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
cp = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));
/* Configure Ports for TPS2211A PC-Card Power-Interface Switch */
cfg_ports ();
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {
printf (" No Card found\n");
return (1);
}
/*
* Power On.
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
reg,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
if ((reg & mask) == mask) {
puts (" 5.0V card found: ");
} else {
puts (" 3.3V card found: ");
}
/* switch VCC on */
immap->im_ioport.iop_padat |= 0x8000; /* power enable 3.3V */
udelay(10000);
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
volatile cpm8xx_t *cp;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/* switch VCC off */
immap->im_ioport.iop_padat &= ~0x8000; /* power disable 3.3V */
/* Configure PCMCIA General Control Register */
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
PCMCIA_PGCRX(_slot_) = reg;
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
volatile immap_t *immap;
volatile pcmconf8xx_t *pcmp;
u_long reg;
debug ("voltage_set: "
PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
immap = (immap_t *)CFG_IMMR;
pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
/*
* Configure Port C pins for
* 5 Volts Enable and 3 Volts enable,
* Turn all power pins to Hi-Z
*/
debug ("PCMCIA power OFF\n");
cfg_ports (); /* Enables switch, but all in Hi-Z */
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(_slot_);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
udelay(500);
debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
slot+'A');
return (0);
}
#endif /* CONFIG_PCMCIA */

3401
common/cmd_pcmcia.c
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6
drivers/Makefile
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@ -31,7 +31,7 @@ OBJS = 3c589.o 5701rls.o ali512x.o \
bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
cs8900.o ct69000.o dataflash.o dc2114x.o dm9000x.o \
e1000.o eepro100.o \
i8042.o i82365.o inca-ip_sw.o keyboard.o \
i8042.o inca-ip_sw.o keyboard.o \
lan91c96.o \
natsemi.o ne2000.o netarm_eth.o netconsole.o \
ns16550.o ns8382x.o ns87308.o ns7520_eth.o omap1510_i2c.o \
@ -48,7 +48,9 @@ OBJS = 3c589.o 5701rls.o ali512x.o \
ti_pci1410a.o tigon3.o tsec.o \
usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o \
videomodes.o w83c553f.o \
ks8695eth.o
ks8695eth.o \
pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o \
rpx_pcmcia.o
all: $(LIB)

302
drivers/mpc8xx_pcmcia.c
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#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#if defined(CONFIG_8xx) && defined(CONFIG_PCMCIA)
#if defined(CONFIG_IDE_8xx_PCCARD)
extern int check_ide_device (int slot);
#endif
extern int pcmcia_hardware_enable (int slot);
extern int pcmcia_voltage_set(int slot, int vcc, int vpp);
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
extern int pcmcia_hardware_disable(int slot);
#endif
static u_int m8xx_get_graycode(u_int size);
#if 0 /* Disabled */
static u_int m8xx_get_speed(u_int ns, u_int is_io);
#endif
/* look up table for pgcrx registers */
u_int *pcmcia_pgcrx[2] = {
&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcra,
&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcrb,
};
/*
* Search this table to see if the windowsize is
* supported...
*/
#define M8XX_SIZES_NO 32
static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =
{ 0x00000001, 0x00000002, 0x00000008, 0x00000004,
0x00000080, 0x00000040, 0x00000010, 0x00000020,
0x00008000, 0x00004000, 0x00001000, 0x00002000,
0x00000100, 0x00000200, 0x00000800, 0x00000400,
0x0fffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0x01000000, 0x02000000, 0xffffffff, 0x04000000,
0x00010000, 0x00020000, 0x00080000, 0x00040000,
0x00800000, 0x00400000, 0x00100000, 0x00200000 };
/* -------------------------------------------------------------------- */
#ifdef CONFIG_HMI10
#define HMI10_FRAM_TIMING ( PCMCIA_SHT(2) \
| PCMCIA_SST(2) \
| PCMCIA_SL(4))
#endif
#if defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
#define CFG_PCMCIA_TIMING ( PCMCIA_SHT(9) \
| PCMCIA_SST(3) \
| PCMCIA_SL(12))
#else
#define CFG_PCMCIA_TIMING ( PCMCIA_SHT(2) \
| PCMCIA_SST(4) \
| PCMCIA_SL(9))
#endif
/* -------------------------------------------------------------------- */
int pcmcia_on (void)
{
u_long reg, base;
pcmcia_win_t *win;
u_int slotbit;
u_int rc, slot;
int i;
debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
/* intialize the fixed memory windows */
win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
base = CFG_PCMCIA_MEM_ADDR;
if((reg = m8xx_get_graycode(CFG_PCMCIA_MEM_SIZE)) == -1) {
printf ("Cannot set window size to 0x%08x\n",
CFG_PCMCIA_MEM_SIZE);
return (1);
}
slotbit = PCMCIA_SLOT_x;
for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
win->br = base;
#if (PCMCIA_SOCKETS_NO == 2)
if (i == 4) /* Another slot starting from win 4 */
slotbit = (slotbit ? PCMCIA_PSLOT_A : PCMCIA_PSLOT_B);
#endif
switch (i) {
#ifdef CONFIG_IDE_8xx_PCCARD
case 4:
#ifdef CONFIG_HMI10
{ /* map FRAM area */
win->or = ( PCMCIA_BSIZE_256K
| PCMCIA_PPS_8
| PCMCIA_PRS_ATTR
| slotbit
| PCMCIA_PV
| HMI10_FRAM_TIMING );
break;
}
#endif
case 0: { /* map attribute memory */
win->or = ( PCMCIA_BSIZE_64M
| PCMCIA_PPS_8
| PCMCIA_PRS_ATTR
| slotbit
| PCMCIA_PV
| CFG_PCMCIA_TIMING );
break;
}
case 5:
case 1: { /* map I/O window for data reg */
win->or = ( PCMCIA_BSIZE_1K
| PCMCIA_PPS_16
| PCMCIA_PRS_IO
| slotbit
| PCMCIA_PV
| CFG_PCMCIA_TIMING );
break;
}
case 6:
case 2: { /* map I/O window for cmd/ctrl reg block */
win->or = ( PCMCIA_BSIZE_1K
| PCMCIA_PPS_8
| PCMCIA_PRS_IO
| slotbit
| PCMCIA_PV
| CFG_PCMCIA_TIMING );
break;
}
#endif /* CONFIG_IDE_8xx_PCCARD */
#ifdef CONFIG_HMI10
case 3: { /* map I/O window for 4xUART data/ctrl */
win->br += 0x40000;
win->or = ( PCMCIA_BSIZE_256K
| PCMCIA_PPS_8
| PCMCIA_PRS_IO
| slotbit
| PCMCIA_PV
| CFG_PCMCIA_TIMING );
break;
}
#endif /* CONFIG_HMI10 */
default: /* set to not valid */
win->or = 0;
break;
}
debug ("MemWin %d: PBR 0x%08lX POR %08lX\n",
i, win->br, win->or);
base += CFG_PCMCIA_MEM_SIZE;
++win;
}
for (i=0, rc=0, slot=_slot_; i<PCMCIA_SOCKETS_NO; i++, slot = !slot) {
/* turn off voltage */
if ((rc = pcmcia_voltage_set(slot, 0, 0)))
continue;
/* Enable external hardware */
if ((rc = pcmcia_hardware_enable(slot)))
continue;
#ifdef CONFIG_IDE_8xx_PCCARD
if ((rc = check_ide_device(i)))
continue;
#endif
}
return rc;
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_off (void)
{
int i;
pcmcia_win_t *win;
printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
/* clear interrupt state, and disable interrupts */
((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pscr = PCMCIA_MASK(_slot_);
((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_);
/* turn off interrupt and disable CxOE */
PCMCIA_PGCRX(_slot_) = __MY_PCMCIA_GCRX_CXOE;
/* turn off memory windows */
win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
/* disable memory window */
win->or = 0;
++win;
}
/* turn off voltage */
pcmcia_voltage_set(_slot_, 0, 0);
/* disable external hardware */
printf ("Shutdown and Poweroff " PCMCIA_SLOT_MSG "\n");
pcmcia_hardware_disable(_slot_);
return 0;
}
#endif /* CFG_CMD_PCMCIA */
static u_int m8xx_get_graycode(u_int size)
{
u_int k;
for (k = 0; k < M8XX_SIZES_NO; k++) {
if(m8xx_size_to_gray[k] == size)
break;
}
if((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
k = -1;
return k;
}
#if 0
#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
* SYPCR is write once only, therefore must the slowest memory be faster
* than the bus monitor or we will get a machine check due to the bus timeout.
*/
#undef PCMCIA_BMT_LIMIT
#define PCMCIA_BMT_LIMIT (6*8)
#endif
static u_int m8xx_get_speed(u_int ns, u_int is_io)
{
u_int reg, clocks, psst, psl, psht;
if(!ns) {
/*
* We get called with IO maps setup to 0ns
* if not specified by the user.
* They should be 255ns.
*/
if(is_io)
ns = 255;
else
ns = 100; /* fast memory if 0 */
}
/*
* In PSST, PSL, PSHT fields we tell the controller
* timing parameters in CLKOUT clock cycles.
* CLKOUT is the same as GCLK2_50.
*/
/* how we want to adjust the timing - in percent */
#define ADJ 180 /* 80 % longer accesstime - to be sure */
clocks = ((M8XX_BUSFREQ / 1000) * ns) / 1000;
clocks = (clocks * ADJ) / (100*1000);
if(clocks >= PCMCIA_BMT_LIMIT) {
DEBUG(0, "Max access time limit reached\n");
clocks = PCMCIA_BMT_LIMIT-1;
}
psst = clocks / 7; /* setup time */
psht = clocks / 7; /* hold time */
psl = (clocks * 5) / 7; /* strobe length */
psst += clocks - (psst + psht + psl);
reg = psst << 12;
reg |= psl << 7;
reg |= psht << 16;
return reg;
}
#endif /* 0 */
#endif /* CONFIG_8xx && CONFIG_PCMCIA */

95
drivers/pxa_pcmcia.c
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#include <common.h>
#include <config.h>
#ifdef CONFIG_PXA_PCMCIA
#include <pcmcia.h>
#include <asm/arch/pxa-regs.h>
#include <asm/io.h>
static inline void msWait(unsigned msVal)
{
udelay(msVal*1000);
}
int pcmcia_on (void)
{
unsigned int reg_arr[] = {
0x48000028, CFG_MCMEM0_VAL,
0x4800002c, CFG_MCMEM1_VAL,
0x48000030, CFG_MCATT0_VAL,
0x48000034, CFG_MCATT1_VAL,
0x48000038, CFG_MCIO0_VAL,
0x4800003c, CFG_MCIO1_VAL,
0, 0
};
int i, rc;
#ifdef CONFIG_EXADRON1
int cardDetect;
volatile unsigned int *v_pBCRReg =
(volatile unsigned int *) 0x08000000;
#endif
debug ("%s\n", __FUNCTION__);
i = 0;
while (reg_arr[i])
*((volatile unsigned int *) reg_arr[i++]) |= reg_arr[i++];
udelay (1000);
debug ("%s: programmed mem controller \n", __FUNCTION__);
#ifdef CONFIG_EXADRON1
/*define useful BCR masks */
#define BCR_CF_INIT_VAL 0x00007230
#define BCR_CF_PWRON_BUSOFF_RESETOFF_VAL 0x00007231
#define BCR_CF_PWRON_BUSOFF_RESETON_VAL 0x00007233
#define BCR_CF_PWRON_BUSON_RESETON_VAL 0x00007213
#define BCR_CF_PWRON_BUSON_RESETOFF_VAL 0x00007211
/* we see from the GPIO bit if the card is present */
cardDetect = !(GPLR0 & GPIO_bit (14));
if (cardDetect) {
printf ("No PCMCIA card found!\n");
}
/* reset the card via the BCR line */
*v_pBCRReg = (unsigned) BCR_CF_INIT_VAL;
msWait (500);
*v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETOFF_VAL;
msWait (500);
*v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETON_VAL;
msWait (500);
*v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETON_VAL;
msWait (500);
*v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETOFF_VAL;
msWait (1500);
/* enable address bus */
GPCR1 = 0x01;
/* and the first CF slot */
MECR = 0x00000002;
#endif /* EXADRON 1 */
rc = check_ide_device (0); /* use just slot 0 */
return rc;
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_off (void)
{
return 0;
}
#endif
#endif /* CONFIG_PXA_PCMCIA */

71
drivers/rpx_pcmcia.c
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/* -------------------------------------------------------------------- */
/* RPX Boards from Embedded Planet */
/* -------------------------------------------------------------------- */
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if CONFIG_COMMANDS & CFG_CMD_PCMCIA
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#if defined(CONFIG_PCMCIA) \
&& (defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE))
#define PCMCIA_BOARD_MSG "RPX CLASSIC or RPX LITE"
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
u_long reg = 0;
switch(vcc) {
case 0: break;
case 33: reg |= BCSR1_PCVCTL4; break;
case 50: reg |= BCSR1_PCVCTL5; break;
default: return 1;
}
switch(vpp) {
case 0: break;
case 33:
case 50:
if(vcc == vpp)
reg |= BCSR1_PCVCTL6;
else
return 1;
break;
case 120:
reg |= BCSR1_PCVCTL7;
default: return 1;
}
/* first, turn off all power */
*((uint *)RPX_CSR_ADDR) &= ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5
| BCSR1_PCVCTL6 | BCSR1_PCVCTL7);
/* enable new powersettings */
*((uint *)RPX_CSR_ADDR) |= reg;
return 0;
}
int pcmcia_hardware_enable (int slot)
{
return 0; /* No hardware to enable */
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
static int pcmcia_hardware_disable(int slot)
{
return 0; /* No hardware to disable */
}
#endif /* CONFIG_COMMANDS & CFG_CMD_PCMCIA */
#endif /* CONFIG_PCMCIA && (CONFIG_RPXCLASSIC || CONFIG_RPXLITE) */

328
drivers/tqm8xx_pcmcia.c
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/* -------------------------------------------------------------------- */
/* TQM8xxL Boards by TQ Components */
/* SC8xx Boards by SinoVee Microsystems */
/* -------------------------------------------------------------------- */
#include <common.h>
#include <mpc8xx.h>
#include <pcmcia.h>
#undef CONFIG_PCMCIA
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
#if defined(CONFIG_PCMCIA) \
&& (defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx))
#if defined(CONFIG_VIRTLAB2)
#define PCMCIA_BOARD_MSG "Virtlab2"
#elif defined(CONFIG_TQM8xxL)
#define PCMCIA_BOARD_MSG "TQM8xxL"
#elif defined(CONFIG_SVM_SC8xx)
#define PCMCIA_BOARD_MSG "SC8xx"
#endif
#if defined(CONFIG_NSCU)
#define power_config(slot) do {} while (0)
#define power_off(slot) do {} while (0)
#define power_on_5_0(slot) do {} while (0)
#define power_on_3_3(slot) do {} while (0)
#elif defined(CONFIG_HMI10)
static inline void power_config(int slot)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
/*
* Configure Port B pins for
* 5 Volts Enable and 3 Volts enable
*/
immap->im_cpm.cp_pbpar &= ~(0x00000300);
}
static inline void power_off(int slot)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
/* remove all power */
immap->im_cpm.cp_pbdat |= 0x00000300;
}
static inline void power_on_5_0(int slot)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
immap->im_cpm.cp_pbdat &= ~(0x0000100);
immap->im_cpm.cp_pbdir |= 0x00000300;
}
static inline void power_on_3_3(int slot)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
immap->im_cpm.cp_pbdat &= ~(0x0000200);
immap->im_cpm.cp_pbdir |= 0x00000300;
}
#elif defined(CONFIG_VIRTLAB2)
#define power_config(slot) do {} while (0)
static inline void power_off(int slot)
{
volatile unsigned char *powerctl =
(volatile unsigned char *)PCMCIA_CTRL;
*powerctl = 0;
}
static inline void power_on_5_0(int slot)
{
volatile unsigned char *powerctl =
(volatile unsigned char *)PCMCIA_CTRL;
*powerctl = 2; /* Enable 5V Vccout */
}
static inline void power_on_3_3(int slot)
{
volatile unsigned char *powerctl =
(volatile unsigned char *)PCMCIA_CTRL;
*powerctl = 1; /* Enable 3.3V Vccout */
}
#else
static inline void power_config(int slot)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
/*
* Configure Port C pins for
* 5 Volts Enable and 3 Volts enable
*/
immap->im_ioport.iop_pcpar &= ~(0x0002 | 0x0004);
immap->im_ioport.iop_pcso &= ~(0x0002 | 0x0004);
}
static inline void power_off(int slot)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
}
static inline void power_on_5_0(int slot)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
immap->im_ioport.iop_pcdat |= 0x0004;
immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
}
static inline void power_on_3_3(int slot)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
immap->im_ioport.iop_pcdat |= 0x0002;
immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
}
#endif
#ifdef CONFIG_HMI10
static inline int check_card_is_absent(int slot)
{
volatile pcmconf8xx_t *pcmp =
(pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
return pcmp->pcmc_pipr & (0x10000000 >> (slot << 4));
}
#else
static inline int check_card_is_absent(int slot)
{
volatile pcmconf8xx_t *pcmp =
(pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
return pcmp->pcmc_pipr & (0x18000000 >> (slot << 4));
}
#endif
#ifdef NSCU_OE_INV
#define NSCU_GCRX_CXOE 0
#else
#define NSCU_GCRX_CXOE __MY_PCMCIA_GCRX_CXOE
#endif
int pcmcia_hardware_enable(int slot)
{
volatile pcmconf8xx_t *pcmp =
(pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
volatile sysconf8xx_t *sysp =
(sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));
uint reg, mask;
debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
udelay(10000);
/*
* Configure SIUMCR to enable PCMCIA port B
* (VFLS[0:1] are not used for debugging, we connect FRZ# instead)
*/
sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
/* clear interrupt state, and disable interrupts */
pcmp->pcmc_pscr = PCMCIA_MASK(slot);
pcmp->pcmc_per &= ~PCMCIA_MASK(slot);
/*
* Disable interrupts, DMA, and PCMCIA buffers
* (isolate the interface) and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= NSCU_GCRX_CXOE;
PCMCIA_PGCRX(slot) = reg;
udelay(500);
power_config(slot);
power_off(slot);
/*
* Make sure there is a card in the slot, then configure the interface.
*/
udelay(10000);
debug ("[%d] %s: PIPR(%p)=0x%x\n", __LINE__,__FUNCTION__,
&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (check_card_is_absent(slot)) {
printf (" No Card found\n");
return (1);
}
/*
* Power On.
*/
mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);
reg = pcmp->pcmc_pipr;
debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
reg,
(reg&PCMCIA_VS1(slot))?"n":"ff",
(reg&PCMCIA_VS2(slot))?"n":"ff");
if ((reg & mask) == mask) {
power_on_5_0(slot);
puts (" 5.0V card found: ");
} else {
power_on_3_3(slot);
puts (" 3.3V card found: ");
}
#if 0
/* VCC switch error flag, PCMCIA slot INPACK_ pin */
cp->cp_pbdir &= ~(0x0020 | 0x0010);
cp->cp_pbpar &= ~(0x0020 | 0x0010);
udelay(500000);
#endif
udelay(1000);
debug ("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(slot);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
reg &= ~NSCU_GCRX_CXOE;
PCMCIA_PGCRX(slot) = reg;
udelay(250000); /* some cards need >150 ms to come up :-( */
debug ("# hardware_enable done\n");
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile pcmconf8xx_t *pcmp =
(pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
u_long reg;
debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);
/* remove all power */
power_off(slot);
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = 0;
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= NSCU_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(slot) = reg;
udelay(10000);
return (0);
}
#endif /* CFG_CMD_PCMCIA */
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
#ifndef CONFIG_NSCU
volatile pcmconf8xx_t *pcmp =
(pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
u_long reg;
debug ("voltage_set: " PCMCIA_BOARD_MSG
" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",
'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);
/*
* Disable PCMCIA buffers (isolate the interface)
* and assert RESET signal
*/
debug ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(slot);
reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
reg |= NSCU_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(slot) = reg;
udelay(500);
debug ("PCMCIA power OFF\n");
power_config(slot);
power_off(slot);
switch(vcc) {
case 0: break;
case 33: power_on_3_3(slot); break;
case 50: power_on_5_0(slot); break;
default: goto done;
}
/* Checking supported voltages */
debug("PIPR: 0x%x --> %s\n", pcmp->pcmc_pipr,
(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");
if (vcc)
debug("PCMCIA powered at %sV\n", (vcc == 50) ? "5.0" : "3.3");
else
debug("PCMCIA powered down\n");
done:
debug("Enable PCMCIA buffers and stop RESET\n");
reg = PCMCIA_PGCRX(slot);
reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
reg &= ~NSCU_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(slot) = reg;
udelay(500);
debug("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n", slot+'A');
#endif /* CONFIG_NSCU */
return (0);
}
#endif /* CONFIG_PCMCIA && (CONFIG_TQM8xxL || CONFIG_SVM_SC8xx) */

10
include/pcmcia.h
Unescape View File

@ -308,4 +308,14 @@ typedef struct {
#endif /* CFG_CMD_PCMCIA || CFG_CMD_IDE && (CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT) */
#ifdef CONFIG_8xx
extern u_int *pcmcia_pgcrx[];
#define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
#endif
#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD) \
|| defined(CONFIG_PXA_PCMCIA)
extern int check_ide_device(int slot);
#endif
#endif /* _PCMCIA_H */

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