fsl_usb.h file created to share data bewteen usb platform code and usb ip driver. Internal phy structure definitions moved to this file Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Acked-by: York Sun <yorksun@freescale.com>master
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/*
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* Freescale USB Controller |
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* |
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* Copyright 2013 Freescale Semiconductor, Inc. |
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* |
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* This software may be used and distributed according to the |
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* terms of the GNU Public License, Version 2, incorporated |
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* herein by reference. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* Version 2 as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef _ASM_FSL_USB_H_ |
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#define _ASM_FSL_USB_H_ |
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#ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE |
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struct ccsr_usb_port_ctrl { |
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u32 ctrl; |
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u32 drvvbuscfg; |
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u32 pwrfltcfg; |
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u32 sts; |
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u8 res_14[0xc]; |
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u32 bistcfg; |
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u32 biststs; |
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u32 abistcfg; |
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u32 abiststs; |
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u8 res_30[0x10]; |
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u32 xcvrprg; |
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u32 anaprg; |
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u32 anadrv; |
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u32 anasts; |
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}; |
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struct ccsr_usb_phy { |
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u32 id; |
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struct ccsr_usb_port_ctrl port1; |
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u8 res_50[0xc]; |
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u32 tvr; |
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u32 pllprg[4]; |
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u8 res_70[0x4]; |
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u32 anaccfg; |
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u32 dbg; |
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u8 res_7c[0x4]; |
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struct ccsr_usb_port_ctrl port2; |
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u8 res_dc[0x334]; |
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}; |
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#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0) |
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#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1) |
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#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1) |
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#define CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV (1 << 0) |
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#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0) |
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#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1) |
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#define CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN (1 << 13) |
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#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4) |
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#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16) |
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#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21) |
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#define CONFIG_SYS_FSL_USB_SYS_CLK_VALID (1 << 0) |
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#else |
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struct ccsr_usb_phy { |
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u8 res0[0x18]; |
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u32 usb_enable_override; |
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u8 res[0xe4]; |
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}; |
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#define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1 |
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#endif |
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#endif /*_ASM_FSL_USB_H_ */ |
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