board/freescale/common:QIXIS:Fix magic number usage

QIXIS FPGA layout defines the  address of registers but The actual register bit
implementation is board-specific,

So avoid use of magic numbers as it may vary across different boards's QIXIS
FPGA implementation.
Also, Avoid board specific defines in common/qixis.h

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

board/freescale/common/qixis.c

@@ -32,22 +32,22 @@ void qixis_write(unsigned int reg, u8 value)
 
 void qixis_reset(void)
 {
-	QIXIS_WRITE(rst_ctl, 0x83);
+	QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET);
 }
 
 void qixis_bank_reset(void)
 {
-	QIXIS_WRITE(rcfg_ctl, 0x20);
-	QIXIS_WRITE(rcfg_ctl, 0x21);
+	QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+	QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
 }
 
-/* Set the boot bank to the power-on default bank0 */
+/* Set the boot bank to the power-on default bank */
 void clear_altbank(void)
 {
 	u8 reg;
 
 	reg = QIXIS_READ(brdcfg[0]);
-	reg = reg & ~QIXIS_LBMAP_MASK;
+	reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_DFLTBANK;
 	QIXIS_WRITE(brdcfg[0], reg);
 }
 
@@ -115,7 +115,8 @@ int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		for (i = 0; i < ARRAY_SIZE(period); i++) {
 			if (strcmp(argv[2], period[i]) == 0) {
 				/* disable watchdog */
-				QIXIS_WRITE(rcfg_ctl, rcfg & ~0x08);
+				QIXIS_WRITE(rcfg_ctl,
+					rcfg & ~QIXIS_RCFG_CTL_WATCHDOG_ENBLE);
 				QIXIS_WRITE(watch, ((i<<2) - 1));
 				QIXIS_WRITE(rcfg_ctl, rcfg);
 				return 0;

board/freescale/common/qixis.h

@@ -86,12 +86,6 @@ struct qixis {
 	u8 res15[16];
 };
 
-#define QIXIS_BASE		0xffdf0000
-#define QIXIS_LBMAP_SWITCH	7
-#define QIXIS_LBMAP_MASK	0x0f
-#define QIXIS_LBMAP_SHIFT	0
-#define QIXIS_LBMAP_ALTBANK	0x04
-
 u8 qixis_read(unsigned int reg);
 void qixis_write(unsigned int reg, u8 value);