cosmetic: rockchip: rk3288: pinctrl: fix config symbol naming

The rk3288 pinctrl is very specific to this soc, so should
not hog the generic rockchip naming.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>

configs/chromebook_jerry_defconfig

@@ -53,7 +53,7 @@ CONFIG_ROCKCHIP_DWMMC=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK808=y

configs/firefly-rk3288_defconfig

@@ -46,7 +46,7 @@ CONFIG_ROCKCHIP_DWMMC=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y

configs/rock2_defconfig

@@ -44,7 +44,7 @@ CONFIG_ROCKCHIP_DWMMC=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y

configs/sandbox_defconfig

@@ -120,7 +120,7 @@ CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCI_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_ROCKCHIP_3036_PINCTRL=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_DM_PMIC=y

configs/sandbox_noblk_defconfig

@@ -112,7 +112,7 @@ CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCI_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_ROCKCHIP_RK3288_PINCTRL=y
 CONFIG_ROCKCHIP_3036_PINCTRL=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_DM_PMIC=y

drivers/pinctrl/Kconfig

@@ -123,12 +123,12 @@ config QCA953X_PINCTRL
 	  both the GPIO definitions and pin control functions for each
 	  available multiplex function.
 
-config ROCKCHIP_PINCTRL
+config ROCKCHIP_RK3288_PINCTRL
 	bool "Rockchip pin control driver"
 	depends on DM
 	help
-	  Support pin multiplexing control on Rockchip SoCs. The driver is
-	  controlled by a device tree node which contains both the GPIO
+	  Support pin multiplexing control on Rockchip rk3288 SoCs. The driver
+	  is controlled by a device tree node which contains both the GPIO
 	  definitions and pin control functions for each available multiplex
 	  function.
 

drivers/pinctrl/rockchip/Makefile

@@ -5,5 +5,5 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_ROCKCHIP_PINCTRL) += pinctrl_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3288_PINCTRL) += pinctrl_rk3288.o
 obj-$(CONFIG_ROCKCHIP_3036_PINCTRL) += pinctrl_rk3036.o