@ -108,26 +108,6 @@ static u_int8_t num_phy;
phy_t phy [ CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT ] ;
static inline void davinci_flush_rx_descs ( void )
{
/* flush the whole RX descs area */
flush_dcache_range ( EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE ,
EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE ) ;
}
static inline void davinci_invalidate_rx_descs ( void )
{
/* invalidate the whole RX descs area */
invalidate_dcache_range ( EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE ,
EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE ) ;
}
static inline void davinci_flush_desc ( emac_desc * desc )
{
flush_dcache_range ( ( unsigned long ) desc ,
( unsigned long ) desc + sizeof ( * desc ) ) ;
}
static int davinci_eth_set_mac_addr ( struct eth_device * dev )
{
unsigned long mac_hi ;
@ -496,8 +476,6 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
emac_rx_active_tail = rx_desc ;
emac_rx_queue_active = 1 ;
davinci_flush_rx_descs ( ) ;
/* Enable TX/RX */
writel ( EMAC_MAX_ETHERNET_PKT_SIZE , & adap_emac - > RXMAXLEN ) ;
writel ( 0 , & adap_emac - > RXBUFFEROFFSET ) ;
@ -660,7 +638,6 @@ static int davinci_eth_send_packet (struct eth_device *dev,
flush_dcache_range ( ( unsigned long ) packet ,
( unsigned long ) packet + length ) ;
davinci_flush_desc ( emac_tx_desc ) ;
/* Send the packet */
writel ( BD_TO_HW ( ( unsigned long ) emac_tx_desc ) , & adap_emac - > TX0HDP ) ;
@ -694,8 +671,6 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
volatile emac_desc * tail_desc ;
int status , ret = - 1 ;
davinci_invalidate_rx_descs ( ) ;
rx_curr_desc = emac_rx_active_head ;
if ( ! rx_curr_desc )
return 0 ;
@ -734,7 +709,6 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
rx_curr_desc - > buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE ;
rx_curr_desc - > pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT ;
rx_curr_desc - > next = 0 ;
davinci_flush_desc ( rx_curr_desc ) ;
if ( emac_rx_active_head = = 0 ) {
printf ( " INFO: emac_rcv_pkt: active queue head = 0 \n " ) ;
@ -752,13 +726,11 @@ static int davinci_eth_rcv_packet (struct eth_device *dev)
tail_desc - > next = BD_TO_HW ( ( ulong ) curr_desc ) ;
status = tail_desc - > pkt_flag_len ;
if ( status & EMAC_CPPI_EOQ_BIT ) {
davinci_flush_desc ( tail_desc ) ;
writel ( BD_TO_HW ( ( ulong ) curr_desc ) ,
& adap_emac - > RX0HDP ) ;
status & = ~ EMAC_CPPI_EOQ_BIT ;
tail_desc - > pkt_flag_len = status ;
}
davinci_flush_desc ( tail_desc ) ;
}
return ( ret ) ;
}