RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>master
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if ROCKCHIP_RK3399 |
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choice |
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prompt "RK3399 board select" |
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config TARGET_EVB_RK3399 |
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bool "RK3399 evaluation board" |
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help |
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RK3399evb is a evaluation board for Rockchp rk3399, |
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with full function and phisical connectors support like type-C ports, |
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usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial... |
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endchoice |
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config SYS_SOC |
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default "rockchip" |
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config SYS_MALLOC_F_LEN |
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default 0x0800 |
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source "board/rockchip/evb_rk3399/Kconfig" |
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endif |
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#
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# (C) Copyright 2016 Rockchip Electronics Co., Ltd
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += rk3399.o
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/*
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* Copyright (c) 2016 Rockchip Electronics Co., Ltd |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/armv8/mmu.h> |
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static struct mm_region rk3399_mem_map[] = { |
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{ |
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.virt = 0x0UL, |
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.phys = 0x0UL, |
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.size = 0x80000000UL, |
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | |
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PTE_BLOCK_INNER_SHARE |
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}, { |
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.virt = 0xf0000000UL, |
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.phys = 0xf0000000UL, |
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.size = 0x10000000UL, |
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
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PTE_BLOCK_NON_SHARE | |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN |
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}, { |
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/* List terminator */ |
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0, |
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} |
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}; |
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struct mm_region *mem_map = rk3399_mem_map; |
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if TARGET_EVB_RK3399 |
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config SYS_BOARD |
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default "evb_rk3399" |
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config SYS_VENDOR |
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default "rockchip" |
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config SYS_CONFIG_NAME |
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default "evb_rk3399" |
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config BOARD_SPECIFIC_OPTIONS # dummy |
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def_bool y |
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endif |
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#
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# (C) Copyright 2016 Rockchip Electronics Co., Ltd
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += evb-rk3399.o
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/armv8/mmu.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int board_init(void) |
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{ |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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gd->ram_size = 0x80000000; |
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return 0; |
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} |
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void dram_init_banksize(void) |
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{ |
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gd->bd->bi_dram[0].start = 0; |
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gd->bd->bi_dram[0].size = 0x80000000; |
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} |
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __EVB_RK3399_H |
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#define __EVB_RK3399_H |
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#include <configs/rk3399_common.h> |
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#define CONFIG_ENV_IS_IN_MMC |
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#define CONFIG_SYS_MMC_ENV_DEV 0 |
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/*
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* SPL @ 32k for ~36k |
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* ENV @ 96k |
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* u-boot @ 128K |
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*/ |
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#define CONFIG_ENV_OFFSET (96 * 1024) |
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#define SDRAM_BANK_SIZE (2UL << 30) |
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#define CONFIG_SYS_WHITE_ON_BLACK |
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#define CONFIG_CONSOLE_SCROLL_LINES 10 |
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#endif |
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __CONFIG_RK3399_COMMON_H |
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#define __CONFIG_RK3399_COMMON_H |
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#define CONFIG_SYS_CACHELINE_SIZE 64 |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define CONFIG_ENV_SIZE 0x2000 |
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#define CONFIG_SYS_MAXARGS 16 |
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#define CONFIG_BAUDRATE 1500000 |
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#define CONFIG_SYS_MALLOC_LEN (32 << 20) |
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#define CONFIG_SYS_CBSIZE 1024 |
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#define CONFIG_SKIP_LOWLEVEL_INIT |
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#define CONFIG_DISPLAY_BOARDINFO |
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#define CONFIG_SYS_NS16550_MEM32 |
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#define CONFIG_SYS_TEXT_BASE 0x00200000 |
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#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 |
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#define CONFIG_SYS_LOAD_ADDR 0x00800800 |
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ |
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/* MMC/SD IP block */ |
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#define CONFIG_MMC |
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#define CONFIG_GENERIC_MMC |
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#define CONFIG_SDHCI |
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#define CONFIG_BOUNCE_BUFFER |
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#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 |
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#define CONFIG_FAT_WRITE |
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/* RAW SD card / eMMC locations. */ |
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 |
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#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) |
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/* FAT sd card locations. */ |
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
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#define CONFIG_SYS_SDRAM_BASE 0 |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define CONFIG_SPI_FLASH |
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#define CONFIG_SPI |
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#define CONFIG_SF_DEFAULT_SPEED 20000000 |
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#ifndef CONFIG_SPL_BUILD |
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#include <config_distro_defaults.h> |
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#define ENV_MEM_LAYOUT_SETTINGS \ |
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"scriptaddr=0x00000000\0" \
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"pxefile_addr_r=0x00100000\0" \
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"fdt_addr_r=0x01f00000\0" \
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"kernel_addr_r=0x02000000\0" \
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"ramdisk_addr_r=0x04000000\0" |
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/* First try to boot from SD (index 0), then eMMC (index 1) */ |
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#define BOOT_TARGET_DEVICES(func) \ |
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1) |
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#include <config_distro_bootcmd.h> |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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BOOTENV |
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#endif |
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#endif |
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