NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>lime2-spi
Miquel Raynal
6 years ago
committed by
Jagan Teki
parent
ce9bdc8743
commit
a430fa06a4
@ -1,297 +1 @@ |
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|
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menuconfig NAND |
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bool "NAND Device Support" |
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if NAND |
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|
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config SYS_NAND_SELF_INIT |
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bool |
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help |
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This option, if enabled, provides more flexible and linux-like |
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NAND initialization process. |
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|
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config NAND_ATMEL |
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bool "Support Atmel NAND controller" |
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imply SYS_NAND_USE_FLASH_BBT |
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help |
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Enable this driver for NAND flash platforms using an Atmel NAND |
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controller. |
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|
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config NAND_DAVINCI |
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bool "Support TI Davinci NAND controller" |
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help |
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Enable this driver for NAND flash controllers available in TI Davinci |
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and Keystone2 platforms |
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|
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config NAND_DENALI |
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bool |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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|
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config NAND_DENALI_DT |
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bool "Support Denali NAND controller as a DT device" |
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select NAND_DENALI |
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depends on OF_CONTROL && DM |
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help |
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Enable the driver for NAND flash on platforms using a Denali NAND |
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controller as a DT device. |
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|
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config NAND_DENALI_SPARE_AREA_SKIP_BYTES |
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int "Number of bytes skipped in OOB area" |
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depends on NAND_DENALI |
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range 0 63 |
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help |
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This option specifies the number of bytes to skip from the beginning |
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of OOB area before last ECC sector data starts. This is potentially |
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used to preserve the bad block marker in the OOB area. |
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|
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config NAND_LPC32XX_SLC |
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bool "Support LPC32XX_SLC controller" |
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help |
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Enable the LPC32XX SLC NAND controller. |
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|
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config NAND_OMAP_GPMC |
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bool "Support OMAP GPMC NAND controller" |
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depends on ARCH_OMAP2PLUS |
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help |
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Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. |
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GPMC controller is used for parallel NAND flash devices, and can |
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do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 |
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and BCH16 ECC algorithms. |
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|
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config NAND_OMAP_GPMC_PREFETCH |
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bool "Enable GPMC Prefetch" |
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depends on NAND_OMAP_GPMC |
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default y |
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help |
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On OMAP platforms that use the GPMC controller |
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(CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that |
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uses the prefetch mode to speed up read operations. |
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|
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config NAND_OMAP_ELM |
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bool "Enable ELM driver for OMAPxx and AMxx platforms." |
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depends on NAND_OMAP_GPMC && !OMAP34XX |
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help |
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ELM controller is used for ECC error detection (not ECC calculation) |
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of BCH4, BCH8 and BCH16 ECC algorithms. |
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Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, |
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thus such SoC platforms need to depend on software library for ECC error |
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detection. However ECC calculation on such plaforms would still be |
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done by GPMC controller. |
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|
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config NAND_VF610_NFC |
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bool "Support for Freescale NFC for VF610" |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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help |
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Enables support for NAND Flash Controller on some Freescale |
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processors like the VF610, MCF54418 or Kinetis K70. |
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The driver supports a maximum 2k page size. The driver |
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currently does not support hardware ECC. |
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|
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choice |
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prompt "Hardware ECC strength" |
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depends on NAND_VF610_NFC |
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default SYS_NAND_VF610_NFC_45_ECC_BYTES |
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help |
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Select the ECC strength used in the hardware BCH ECC block. |
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|
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config SYS_NAND_VF610_NFC_45_ECC_BYTES |
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bool "24-error correction (45 ECC bytes)" |
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|
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config SYS_NAND_VF610_NFC_60_ECC_BYTES |
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bool "32-error correction (60 ECC bytes)" |
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|
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endchoice |
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|
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config NAND_PXA3XX |
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bool "Support for NAND on PXA3xx and Armada 370/XP/38x" |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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help |
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This enables the driver for the NAND flash device found on |
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PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). |
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|
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config NAND_SUNXI |
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bool "Support for NAND on Allwinner SoCs" |
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default ARCH_SUNXI |
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depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I |
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select SYS_NAND_SELF_INIT |
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select SYS_NAND_U_BOOT_LOCATIONS |
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select SPL_NAND_SUPPORT |
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imply CMD_NAND |
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---help--- |
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Enable support for NAND. This option enables the standard and |
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SPL drivers. |
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The SPL driver only supports reading from the NAND using DMA |
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transfers. |
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|
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if NAND_SUNXI |
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|
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config NAND_SUNXI_SPL_ECC_STRENGTH |
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int "Allwinner NAND SPL ECC Strength" |
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default 64 |
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config NAND_SUNXI_SPL_ECC_SIZE |
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int "Allwinner NAND SPL ECC Step Size" |
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default 1024 |
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|
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config NAND_SUNXI_SPL_USABLE_PAGE_SIZE |
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int "Allwinner NAND SPL Usable Page Size" |
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default 1024 |
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|
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endif |
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|
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config NAND_ARASAN |
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bool "Configure Arasan Nand" |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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help |
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This enables Nand driver support for Arasan nand flash |
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controller. This uses the hardware ECC for read and |
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write operations. |
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|
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config NAND_MXC |
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bool "MXC NAND support" |
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depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 |
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imply CMD_NAND |
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help |
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This enables the NAND driver for the NAND flash controller on the |
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i.MX27 / i.MX31 / i.MX5 rocessors. |
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|
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config NAND_MXS |
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bool "MXS NAND support" |
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depends on MX23 || MX28 || MX6 || MX7 |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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select APBH_DMA |
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select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 |
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select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 |
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help |
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This enables NAND driver for the NAND flash controller on the |
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MXS processors. |
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|
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if NAND_MXS |
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|
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config NAND_MXS_DT |
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bool "Support MXS NAND controller as a DT device" |
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depends on OF_CONTROL && MTD |
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help |
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Enable the driver for MXS NAND flash on platforms using |
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device tree. |
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|
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config NAND_MXS_USE_MINIMUM_ECC |
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bool "Use minimum ECC strength supported by the controller" |
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default false |
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endif |
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|
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config NAND_ZYNQ |
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bool "Support for Zynq Nand controller" |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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help |
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This enables Nand driver support for Nand flash controller |
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found on Zynq SoC. |
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|
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config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS |
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bool "Enable use of 1st stage bootloader timing for NAND" |
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depends on NAND_ZYNQ |
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help |
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This flag prevent U-boot reconfigure NAND flash controller and reuse |
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the NAND timing from 1st stage bootloader. |
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comment "Generic NAND options" |
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|
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config SYS_NAND_BLOCK_SIZE |
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hex "NAND chip eraseblock size" |
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depends on ARCH_SUNXI |
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help |
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Number of data bytes in one eraseblock for the NAND chip on the |
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board. This is the multiple of NAND_PAGE_SIZE and the number of |
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pages. |
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|
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config SYS_NAND_PAGE_SIZE |
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hex "NAND chip page size" |
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depends on ARCH_SUNXI |
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help |
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Number of data bytes in one page for the NAND chip on the |
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board, not including the OOB area. |
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|
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config SYS_NAND_OOBSIZE |
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hex "NAND chip OOB size" |
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depends on ARCH_SUNXI |
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help |
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Number of bytes in the Out-Of-Band area for the NAND chip on |
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the board. |
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|
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# Enhance depends when converting drivers to Kconfig which use this config |
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# option (mxc_nand, ndfc, omap_gpmc). |
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config SYS_NAND_BUSWIDTH_16BIT |
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bool "Use 16-bit NAND interface" |
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depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI |
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help |
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Indicates that NAND device has 16-bit wide data-bus. In absence of this |
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config, bus-width of NAND device is assumed to be either 8-bit and later |
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determined by reading ONFI params. |
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Above config is useful when NAND device's bus-width information cannot |
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be determined from on-chip ONFI params, like in following scenarios: |
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- SPL boot does not support reading of ONFI parameters. This is done to |
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keep SPL code foot-print small. |
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- In current U-Boot flow using nand_init(), driver initialization |
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happens in board_nand_init() which is called before any device probe |
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(nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are |
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not available while configuring controller. So a static CONFIG_NAND_xx |
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is needed to know the device's bus-width in advance. |
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if SPL |
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|
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config SYS_NAND_U_BOOT_LOCATIONS |
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bool "Define U-boot binaries locations in NAND" |
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help |
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Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. |
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This option should not be enabled when compiling U-boot for boards |
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defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h |
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file. |
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|
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config SYS_NAND_U_BOOT_OFFS |
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hex "Location in NAND to read U-Boot from" |
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default 0x800000 if NAND_SUNXI |
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depends on SYS_NAND_U_BOOT_LOCATIONS |
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help |
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Set the offset from the start of the nand where u-boot should be |
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loaded from. |
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|
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config SYS_NAND_U_BOOT_OFFS_REDUND |
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hex "Location in NAND to read U-Boot from" |
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default SYS_NAND_U_BOOT_OFFS |
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depends on SYS_NAND_U_BOOT_LOCATIONS |
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help |
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Set the offset from the start of the nand where the redundant u-boot |
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should be loaded from. |
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|
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config SPL_NAND_AM33XX_BCH |
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bool "Enables SPL-NAND driver which supports ELM based" |
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depends on NAND_OMAP_GPMC && !OMAP34XX |
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default y |
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help |
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Hardware ECC correction. This is useful for platforms which have ELM |
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hardware engine and use NAND boot mode. |
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Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, |
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so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling |
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SPL-NAND driver with software ECC correction support. |
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|
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config SPL_NAND_DENALI |
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bool "Support Denali NAND controller for SPL" |
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help |
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This is a small implementation of the Denali NAND controller |
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for use on SPL. |
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|
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config SPL_NAND_SIMPLE |
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bool "Use simple SPL NAND driver" |
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depends on !SPL_NAND_AM33XX_BCH |
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help |
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Support for NAND boot using simple NAND drivers that |
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expose the cmd_ctrl() interface. |
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endif |
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endif # if NAND |
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source "drivers/mtd/nand/raw/Kconfig" |
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@ -0,0 +1,297 @@ |
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|
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menuconfig NAND |
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bool "NAND Device Support" |
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if NAND |
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|
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config SYS_NAND_SELF_INIT |
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bool |
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help |
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This option, if enabled, provides more flexible and linux-like |
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NAND initialization process. |
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|
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config NAND_ATMEL |
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bool "Support Atmel NAND controller" |
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imply SYS_NAND_USE_FLASH_BBT |
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help |
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Enable this driver for NAND flash platforms using an Atmel NAND |
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controller. |
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|
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config NAND_DAVINCI |
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bool "Support TI Davinci NAND controller" |
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help |
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Enable this driver for NAND flash controllers available in TI Davinci |
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and Keystone2 platforms |
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|
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config NAND_DENALI |
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bool |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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|
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config NAND_DENALI_DT |
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bool "Support Denali NAND controller as a DT device" |
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select NAND_DENALI |
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depends on OF_CONTROL && DM |
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help |
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Enable the driver for NAND flash on platforms using a Denali NAND |
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controller as a DT device. |
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|
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config NAND_DENALI_SPARE_AREA_SKIP_BYTES |
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int "Number of bytes skipped in OOB area" |
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depends on NAND_DENALI |
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range 0 63 |
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help |
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This option specifies the number of bytes to skip from the beginning |
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of OOB area before last ECC sector data starts. This is potentially |
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used to preserve the bad block marker in the OOB area. |
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|
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config NAND_LPC32XX_SLC |
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bool "Support LPC32XX_SLC controller" |
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help |
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Enable the LPC32XX SLC NAND controller. |
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|
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config NAND_OMAP_GPMC |
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bool "Support OMAP GPMC NAND controller" |
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depends on ARCH_OMAP2PLUS |
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help |
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Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. |
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GPMC controller is used for parallel NAND flash devices, and can |
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do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 |
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and BCH16 ECC algorithms. |
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|
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config NAND_OMAP_GPMC_PREFETCH |
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bool "Enable GPMC Prefetch" |
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depends on NAND_OMAP_GPMC |
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default y |
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help |
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On OMAP platforms that use the GPMC controller |
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(CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that |
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uses the prefetch mode to speed up read operations. |
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|
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config NAND_OMAP_ELM |
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bool "Enable ELM driver for OMAPxx and AMxx platforms." |
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depends on NAND_OMAP_GPMC && !OMAP34XX |
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help |
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ELM controller is used for ECC error detection (not ECC calculation) |
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of BCH4, BCH8 and BCH16 ECC algorithms. |
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Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, |
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thus such SoC platforms need to depend on software library for ECC error |
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detection. However ECC calculation on such plaforms would still be |
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done by GPMC controller. |
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|
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config NAND_VF610_NFC |
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bool "Support for Freescale NFC for VF610" |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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help |
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Enables support for NAND Flash Controller on some Freescale |
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processors like the VF610, MCF54418 or Kinetis K70. |
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The driver supports a maximum 2k page size. The driver |
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currently does not support hardware ECC. |
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|
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choice |
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prompt "Hardware ECC strength" |
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depends on NAND_VF610_NFC |
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default SYS_NAND_VF610_NFC_45_ECC_BYTES |
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help |
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Select the ECC strength used in the hardware BCH ECC block. |
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|
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config SYS_NAND_VF610_NFC_45_ECC_BYTES |
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bool "24-error correction (45 ECC bytes)" |
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|
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config SYS_NAND_VF610_NFC_60_ECC_BYTES |
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bool "32-error correction (60 ECC bytes)" |
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|
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endchoice |
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|
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config NAND_PXA3XX |
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bool "Support for NAND on PXA3xx and Armada 370/XP/38x" |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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help |
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This enables the driver for the NAND flash device found on |
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PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). |
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|
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config NAND_SUNXI |
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bool "Support for NAND on Allwinner SoCs" |
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default ARCH_SUNXI |
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depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I |
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select SYS_NAND_SELF_INIT |
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select SYS_NAND_U_BOOT_LOCATIONS |
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select SPL_NAND_SUPPORT |
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imply CMD_NAND |
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---help--- |
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Enable support for NAND. This option enables the standard and |
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SPL drivers. |
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The SPL driver only supports reading from the NAND using DMA |
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transfers. |
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|
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if NAND_SUNXI |
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|
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config NAND_SUNXI_SPL_ECC_STRENGTH |
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int "Allwinner NAND SPL ECC Strength" |
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default 64 |
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|
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config NAND_SUNXI_SPL_ECC_SIZE |
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int "Allwinner NAND SPL ECC Step Size" |
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default 1024 |
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|
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config NAND_SUNXI_SPL_USABLE_PAGE_SIZE |
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int "Allwinner NAND SPL Usable Page Size" |
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default 1024 |
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|
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endif |
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|
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config NAND_ARASAN |
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bool "Configure Arasan Nand" |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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help |
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This enables Nand driver support for Arasan nand flash |
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controller. This uses the hardware ECC for read and |
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write operations. |
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|
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config NAND_MXC |
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bool "MXC NAND support" |
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depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 |
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imply CMD_NAND |
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help |
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This enables the NAND driver for the NAND flash controller on the |
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i.MX27 / i.MX31 / i.MX5 rocessors. |
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|
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config NAND_MXS |
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bool "MXS NAND support" |
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depends on MX23 || MX28 || MX6 || MX7 |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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select APBH_DMA |
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select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 |
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select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 |
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help |
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This enables NAND driver for the NAND flash controller on the |
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MXS processors. |
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|
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if NAND_MXS |
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|
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config NAND_MXS_DT |
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bool "Support MXS NAND controller as a DT device" |
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depends on OF_CONTROL && MTD |
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help |
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Enable the driver for MXS NAND flash on platforms using |
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device tree. |
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|
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config NAND_MXS_USE_MINIMUM_ECC |
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bool "Use minimum ECC strength supported by the controller" |
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default false |
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|
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endif |
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|
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config NAND_ZYNQ |
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bool "Support for Zynq Nand controller" |
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select SYS_NAND_SELF_INIT |
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imply CMD_NAND |
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help |
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This enables Nand driver support for Nand flash controller |
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found on Zynq SoC. |
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|
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config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS |
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bool "Enable use of 1st stage bootloader timing for NAND" |
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depends on NAND_ZYNQ |
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help |
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This flag prevent U-boot reconfigure NAND flash controller and reuse |
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the NAND timing from 1st stage bootloader. |
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|
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comment "Generic NAND options" |
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|
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config SYS_NAND_BLOCK_SIZE |
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hex "NAND chip eraseblock size" |
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depends on ARCH_SUNXI |
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help |
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Number of data bytes in one eraseblock for the NAND chip on the |
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board. This is the multiple of NAND_PAGE_SIZE and the number of |
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pages. |
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|
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config SYS_NAND_PAGE_SIZE |
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hex "NAND chip page size" |
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depends on ARCH_SUNXI |
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help |
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Number of data bytes in one page for the NAND chip on the |
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board, not including the OOB area. |
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|
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config SYS_NAND_OOBSIZE |
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hex "NAND chip OOB size" |
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depends on ARCH_SUNXI |
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help |
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Number of bytes in the Out-Of-Band area for the NAND chip on |
||||
the board. |
||||
|
||||
# Enhance depends when converting drivers to Kconfig which use this config |
||||
# option (mxc_nand, ndfc, omap_gpmc). |
||||
config SYS_NAND_BUSWIDTH_16BIT |
||||
bool "Use 16-bit NAND interface" |
||||
depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI |
||||
help |
||||
Indicates that NAND device has 16-bit wide data-bus. In absence of this |
||||
config, bus-width of NAND device is assumed to be either 8-bit and later |
||||
determined by reading ONFI params. |
||||
Above config is useful when NAND device's bus-width information cannot |
||||
be determined from on-chip ONFI params, like in following scenarios: |
||||
- SPL boot does not support reading of ONFI parameters. This is done to |
||||
keep SPL code foot-print small. |
||||
- In current U-Boot flow using nand_init(), driver initialization |
||||
happens in board_nand_init() which is called before any device probe |
||||
(nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are |
||||
not available while configuring controller. So a static CONFIG_NAND_xx |
||||
is needed to know the device's bus-width in advance. |
||||
|
||||
if SPL |
||||
|
||||
config SYS_NAND_U_BOOT_LOCATIONS |
||||
bool "Define U-boot binaries locations in NAND" |
||||
help |
||||
Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. |
||||
This option should not be enabled when compiling U-boot for boards |
||||
defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h |
||||
file. |
||||
|
||||
config SYS_NAND_U_BOOT_OFFS |
||||
hex "Location in NAND to read U-Boot from" |
||||
default 0x800000 if NAND_SUNXI |
||||
depends on SYS_NAND_U_BOOT_LOCATIONS |
||||
help |
||||
Set the offset from the start of the nand where u-boot should be |
||||
loaded from. |
||||
|
||||
config SYS_NAND_U_BOOT_OFFS_REDUND |
||||
hex "Location in NAND to read U-Boot from" |
||||
default SYS_NAND_U_BOOT_OFFS |
||||
depends on SYS_NAND_U_BOOT_LOCATIONS |
||||
help |
||||
Set the offset from the start of the nand where the redundant u-boot |
||||
should be loaded from. |
||||
|
||||
config SPL_NAND_AM33XX_BCH |
||||
bool "Enables SPL-NAND driver which supports ELM based" |
||||
depends on NAND_OMAP_GPMC && !OMAP34XX |
||||
default y |
||||
help |
||||
Hardware ECC correction. This is useful for platforms which have ELM |
||||
hardware engine and use NAND boot mode. |
||||
Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, |
||||
so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling |
||||
SPL-NAND driver with software ECC correction support. |
||||
|
||||
config SPL_NAND_DENALI |
||||
bool "Support Denali NAND controller for SPL" |
||||
help |
||||
This is a small implementation of the Denali NAND controller |
||||
for use on SPL. |
||||
|
||||
config SPL_NAND_SIMPLE |
||||
bool "Use simple SPL NAND driver" |
||||
depends on !SPL_NAND_AM33XX_BCH |
||||
help |
||||
Support for NAND boot using simple NAND drivers that |
||||
expose the cmd_ctrl() interface. |
||||
endif |
||||
|
||||
endif # if NAND |
||||
@ -0,0 +1,77 @@ |
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
# (C) Copyright 2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
|
||||
ifdef CONFIG_SPL_BUILD |
||||
|
||||
ifdef CONFIG_SPL_NAND_DRIVERS |
||||
NORMAL_DRIVERS=y
|
||||
endif |
||||
|
||||
obj-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
|
||||
obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o
|
||||
obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
|
||||
obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
|
||||
obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
|
||||
obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
|
||||
obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o
|
||||
obj-$(CONFIG_SPL_NAND_INIT) += nand.o
|
||||
ifeq ($(CONFIG_SPL_ENV_SUPPORT),y) |
||||
obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
|
||||
endif |
||||
|
||||
else # not spl
|
||||
|
||||
NORMAL_DRIVERS=y
|
||||
|
||||
obj-y += nand.o
|
||||
obj-y += nand_bbt.o
|
||||
obj-y += nand_ids.o
|
||||
obj-y += nand_util.o
|
||||
obj-y += nand_ecc.o
|
||||
obj-y += nand_base.o
|
||||
obj-y += nand_timings.o
|
||||
|
||||
endif # not spl
|
||||
|
||||
ifdef NORMAL_DRIVERS |
||||
|
||||
obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
|
||||
|
||||
obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
|
||||
obj-$(CONFIG_NAND_ARASAN) += arasan_nfc.o
|
||||
obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
|
||||
obj-$(CONFIG_NAND_DENALI) += denali.o
|
||||
obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o
|
||||
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
|
||||
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
|
||||
obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
|
||||
obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o
|
||||
obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
|
||||
obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
|
||||
obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
|
||||
obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
|
||||
obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
|
||||
obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
|
||||
obj-$(CONFIG_NAND_MXC) += mxc_nand.o
|
||||
obj-$(CONFIG_NAND_MXS) += mxs_nand.o
|
||||
obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o
|
||||
obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
|
||||
obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
|
||||
obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
|
||||
obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
|
||||
obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
|
||||
obj-$(CONFIG_NAND_PLAT) += nand_plat.o
|
||||
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
|
||||
obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
|
||||
|
||||
else # minimal SPL drivers
|
||||
|
||||
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
|
||||
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
|
||||
obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
|
||||
obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
|
||||
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
|
||||
|
||||
endif # drivers
|
||||
@ -1,6 +1,6 @@ |
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* drivers/mtd/nand/nand_util.c |
||||
* drivers/mtd/nand/raw/nand_util.c |
||||
* |
||||
* Copyright (C) 2006 by Weiss-Electronic GmbH. |
||||
* All rights reserved. |
||||
@ -1,6 +1,6 @@ |
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* drivers/mtd/nand/pxa3xx_nand.c |
||||
* drivers/mtd/nand/raw/pxa3xx_nand.c |
||||
* |
||||
* Copyright © 2005 Intel Corporation |
||||
* Copyright © 2006 Marvell International Ltd. |
||||
Loading…
Reference in new issue