@ -95,6 +95,7 @@ _end_vect:
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* /
.globl _TEXT_BASE
_TEXT_BASE :
.word TEXT_BASE
@ -106,9 +107,11 @@ _TEXT_BASE:
_TEXT_PHY_BASE :
.word CONFIG_SYS_PHY_UBOOT_BASE
# if d e f i n e d ( C O N F I G _ S Y S _ A R M _ W I T H O U T _ R E L O C )
.globl _armboot_start
_armboot_start :
.word _start
# endif
/ *
* These a r e d e f i n e d i n t h e b o a r d - s p e c i f i c l i n k e r s c r i p t .
@ -121,6 +124,275 @@ _bss_start:
_bss_end :
.word _end
# if ! d e f i n e d ( C O N F I G _ S Y S _ A R M _ W I T H O U T _ R E L O C )
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN :
.word 0x0badc0de
.globl _datarel_start
_datarel_start :
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start :
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start :
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start :
.word __datarelro_start
.globl _got_start
_got_start :
.word __got_start
.globl _got_end
_got_end :
.word __got_end
/ *
* the a c t u a l r e s e t c o d e
* /
reset :
/ *
* set t h e c p u t o S V C 3 2 m o d e
* /
mrs r0 , c p s r
bic r0 , r0 , #0x3f
orr r0 , r0 , #0xd3
msr c p s r , r0
/ *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
*
* CPU_ i n i t _ c r i t i c a l r e g i s t e r s
*
* setup i m p o r t a n t r e g i s t e r s
* setup m e m o r y t i m i n g
*
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* /
/ *
* we d o s y s - c r i t i c a l i n i t s o n l y a t r e b o o t ,
* not w h e n b o o t i n g f r o m r a m !
* /
cpu_init_crit :
/ *
* When b o o t i n g f r o m N A N D - i t h a s d e f i n i t e l y b e e n a r e s e t , s o , n o n e e d
* to f l u s h c a c h e s a n d d i s a b l e t h e M M U
* /
# ifndef C O N F I G _ N A N D _ S P L
/ *
* flush v4 I / D c a c h e s
* /
mov r0 , #0
mcr p15 , 0 , r0 , c7 , c7 , 0 / * f l u s h v3 / v4 c a c h e * /
mcr p15 , 0 , r0 , c8 , c7 , 0 / * f l u s h v4 T L B * /
/ *
* disable M M U s t u f f a n d c a c h e s
* /
mrc p15 , 0 , r0 , c1 , c0 , 0
bic r0 , r0 , #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0 , r0 , #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0 , r0 , #0x00000002 @ set bit 2 (A) Align
orr r0 , r0 , #0x00001000 @ set bit 12 (I) I-Cache
/* Prepare to disable the MMU */
adr r2 , m m u _ d i s a b l e _ p h y s
sub r2 , r2 , #( C O N F I G _ S Y S _ P H Y _ U B O O T _ B A S E - T E X T _ B A S E )
b m m u _ d i s a b l e
.align 5
/* Run in a single cache-line */
mmu_disable :
mcr p15 , 0 , r0 , c1 , c0 , 0
nop
nop
mov p c , r2
mmu_disable_phys :
# ifdef C O N F I G _ D I S A B L E _ T C M
/ *
* Disable t h e T C M s
* /
mrc p15 , 0 , r0 , c0 , c0 , 2 / * R e t u r n T C M d e t a i l s * /
cmp r0 , #0
beq s k i p _ t c m d i s a b l e
mov r1 , #0
mov r2 , #1
tst r0 , r2
mcrne p15 , 0 , r1 , c9 , c1 , 1 / * D i s a b l e I n s t r u c t i o n T C M i f p r e s e n t * /
tst r0 , r2 , L S L #16
mcrne p15 , 0 , r1 , c9 , c1 , 0 / * D i s a b l e D a t a T C M i f p r e s e n t * /
skip_tcmdisable :
# endif
# endif
# ifdef C O N F I G _ P E R I P O R T _ R E M A P
/* Peri port setup */
ldr r0 , =CONFIG_PERIPORT_BASE
orr r0 , r0 , #C O N F I G _ P E R I P O R T _ S I Z E
mcr p15 ,0 ,r0 ,c15 ,c2 ,4
# endif
/ *
* Go s e t u p M e m o r y a n d b o a r d s p e c i f i c b i t s p r i o r t o r e l o c a t i o n .
* /
bl l o w l e v e l _ i n i t / * g o s e t u p p l l ,m u x ,m e m o r y * /
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f :
ldr s p , = ( C O N F I G _ S Y S _ I N I T _ S P _ A D D R )
ldr r0 ,=0x00000000
bl b o a r d _ i n i t _ f
/*------------------------------------------------------------------------------*/
/ *
* void r e l o c a t e _ c o d e ( a d d r _ s p , g d , a d d r _ m o n i )
*
* This " f u n c t i o n " d o e s n o t r e t u r n , i n s t e a d i t c o n t i n u e s i n R A M
* after r e l o c a t i n g t h e m o n i t o r c o d e .
*
* /
.globl relocate_code
relocate_code :
mov r4 , r0 / * s a v e a d d r _ s p * /
mov r5 , r1 / * s a v e a d d r o f g d * /
mov r6 , r2 / * s a v e a d d r o f d e s t i n a t i o n * /
mov r7 , r2 / * s a v e a d d r o f d e s t i n a t i o n * /
/* Set up the stack */
stack_setup :
mov s p , r4
adr r0 , _ s t a r t
ldr r2 , _ T E X T _ B A S E
ldr r3 , _ b s s _ s t a r t
sub r2 , r3 , r2 / * r2 < - s i z e o f a r m b o o t * /
add r2 , r0 , r2 / * r2 < - s o u r c e e n d a d d r e s s * /
cmp r0 , r6
beq c l e a r _ b s s
# ifndef C O N F I G _ S K I P _ R E L O C A T E _ U B O O T
copy_loop :
ldmia r0 ! , { r9 - r10 } / * c o p y f r o m s o u r c e a d d r e s s [ r0 ] * /
stmia r6 ! , { r9 - r10 } / * c o p y t o t a r g e t a d d r e s s [ r1 ] * /
cmp r0 , r2 / * u n t i l s o u r c e e n d a d d r e e e [ r2 ] * /
ble c o p y _ l o o p
# ifndef C O N F I G _ P R E L O A D E R
/* fix got entries */
ldr r1 , _ T E X T _ B A S E / * T e x t b a s e * /
mov r0 , r7 / * r e l o c a d d r * /
ldr r2 , _ g o t _ s t a r t / * a d d r i n F l a s h * /
ldr r3 , _ g o t _ e n d / * a d d r i n F l a s h * /
sub r3 , r3 , r1
add r3 , r3 , r0
sub r2 , r2 , r1
add r2 , r2 , r0
fixloop :
ldr r4 , [ r2 ]
sub r4 , r4 , r1
add r4 , r4 , r0
str r4 , [ r2 ]
add r2 , r2 , #4
cmp r2 , r3
bne f i x l o o p
# endif
# endif / * #i f n d e f C O N F I G _ S K I P _ R E L O C A T E _ U B O O T * /
# ifdef C O N F I G _ E N A B L E _ M M U
enable_mmu :
/* enable domain access */
ldr r5 , =0x0000ffff
mcr p15 , 0 , r5 , c3 , c0 , 0 / * l o a d d o m a i n a c c e s s r e g i s t e r * /
/* Set the TTB register */
ldr r0 , _ m m u _ t a b l e _ b a s e
ldr r1 , =CONFIG_SYS_PHY_UBOOT_BASE
ldr r2 , =0xfff00000
bic r0 , r0 , r2
orr r1 , r0 , r1
mcr p15 , 0 , r1 , c2 , c0 , 0
/* Enable the MMU */
mrc p15 , 0 , r0 , c1 , c0 , 0
orr r0 , r0 , #1 / * S e t C R _ M t o e n a b l e M M U * /
/* Prepare to enable the MMU */
adr r1 , s k i p _ h w _ i n i t
and r1 , r1 , #0x3fc
ldr r2 , _ T E X T _ B A S E
ldr r3 , =0xfff00000
and r2 , r2 , r3
orr r2 , r2 , r1
b m m u _ e n a b l e
.align 5
/* Run in a single cache-line */
mmu_enable :
mcr p15 , 0 , r0 , c1 , c0 , 0
nop
nop
mov p c , r2
skip_hw_init :
# endif
clear_bss :
# ifndef C O N F I G _ P R E L O A D E R
ldr r0 , _ b s s _ s t a r t
ldr r1 , _ b s s _ e n d
ldr r3 , _ T E X T _ B A S E / * T e x t b a s e * /
mov r4 , r7 / * r e l o c a d d r * /
sub r0 , r0 , r3
add r0 , r0 , r4
sub r1 , r1 , r3
add r1 , r1 , r4
mov r2 , #0x00000000 / * c l e a r * /
clbss_l : str r2 , [ r0 ] / * c l e a r l o o p . . . * /
add r0 , r0 , #4
cmp r0 , r1
bne c l b s s _ l
bl c o l o u r e d _ L E D _ i n i t
bl r e d _ L E D _ o n
# endif
/ *
* We a r e d o n e . D o n o t r e t u r n , i n s t e a d b r a n c h t o s e c o n d p a r t o f b o a r d
* initialization, n o w r u n n i n g f r o m R A M .
* /
# ifdef C O N F I G _ N A N D _ S P L
ldr p c , _ n a n d _ b o o t
_nand_boot : .word n a n d _ b o o t
# else
ldr r0 , _ T E X T _ B A S E
ldr r2 , _ b o a r d _ i n i t _ r
sub r2 , r2 , r0
add r2 , r2 , r7 / * p o s i t i o n f r o m b o a r d _ i n i t _ r i n R A M * /
/* setup parameters for board_init_r */
mov r0 , r5 / * g d _ t * /
mov r1 , r7 / * d e s t _ a d d r * /
/* jump to it ... */
mov l r , r2
mov p c , l r
_board_init_r : .word b o a r d _ i n i t _ r
# endif
# else / * #i f ! d e f i n e d ( C O N F I G _ S Y S _ A R M _ W I T H O U T _ R E L O C ) * /
/ *
* the a c t u a l r e s e t c o d e
* /
@ -299,6 +571,8 @@ _start_armboot:
/* .word nand_boot*/
# endif
# endif / * #i f ! d e f i n e d ( C O N F I G _ S Y S _ A R M _ W I T H O U T _ R E L O C ) * /
# ifdef C O N F I G _ E N A B L E _ M M U
_mmu_table_base :
.word mmu_table
@ -385,10 +659,14 @@ phy_last_jump:
/* Save user registers (now in svc mode) r0-r12 */
stmia s p , { r0 - r12 }
# if d e f i n e d ( C O N F I G _ S Y S _ A R M _ W I T H O U T _ R E L O C )
ldr r2 , _ a r m b o o t _ s t a r t
sub r2 , r2 , #( C O N F I G _ S Y S _ M A L L O C _ L E N )
/* set base 2 words into abort stack */
sub r2 , r2 , #( C O N F I G _ S Y S _ G B L _ D A T A _ S I Z E + 8 )
# else
ldr r2 , I R Q _ S T A C K _ S T A R T _ I N
# endif
/* get values for "aborted" pc and cpsr (into parm regs) */
ldmia r2 , { r2 - r3 }
/* grab pointer to old stack */
@ -403,12 +681,16 @@ phy_last_jump:
.endm
.macro get_bad_stack
# if d e f i n e d ( C O N F I G _ S Y S _ A R M _ W I T H O U T _ R E L O C )
/* setup our mode stack (enter in banked mode) */
ldr r13 , _ a r m b o o t _ s t a r t
/* move past malloc pool */
sub r13 , r13 , #( C O N F I G _ S Y S _ M A L L O C _ L E N )
/* move to reserved a couple spots for abort stack */
sub r13 , r13 , #( C O N F I G _ S Y S _ G B L _ D A T A _ S I Z E + 8 )
# else
ldr r13 , I R Q _ S T A C K _ S T A R T _ I N @ setup our mode stack
# endif
/* save caller lr in position 0 of saved stack */
str l r , [ r13 ]
@ -433,12 +715,16 @@ phy_last_jump:
sub r13 , r13 , #4
/* save R0's value. */
str r0 , [ r13 ]
# if d e f i n e d ( C O N F I G _ S Y S _ A R M _ W I T H O U T _ R E L O C )
/* get data regions start */
ldr r0 , _ a r m b o o t _ s t a r t
/* move past malloc pool */
sub r0 , r0 , #( C O N F I G _ S Y S _ M A L L O C _ L E N )
/* move past gbl and a couple spots for abort stack */
sub r0 , r0 , #( C O N F I G _ S Y S _ G B L _ D A T A _ S I Z E + 8 )
# else
ldr r13 , I R Q _ S T A C K _ S T A R T _ I N @ setup our mode stack
# endif
/* save caller lr in position 0 of saved stack */
str l r , [ r0 ]
/* get the spsr */
Heiko Schocher
15 years ago
committed by
Wolfgang Denk