Add a uclass for AXI (Advanced eXtensible Interface) busses, and a driver for the gdsys IHS AXI bus on IHS FPGAs. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>lime2-spi
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menuconfig AXI |
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bool "AXI bus drivers" |
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help |
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Support AXI (Advanced eXtensible Interface) busses, a on-chip |
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interconnect specification for managing functional blocks in SoC |
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designs, which is also often used in designs involving FPGAs (e.g. |
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communication with IP cores in Xilinx FPGAs). |
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These types of busses expose a virtual address space that can be |
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accessed using different address widths (8, 16, and 32 are supported |
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for now). |
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Other similar bus architectures may be compatible as well. |
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#
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# (C) Copyright 2017
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# Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_AXI) += axi-uclass.o
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2017 |
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* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <axi.h> |
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int axi_read(struct udevice *dev, ulong address, void *data, |
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enum axi_size_t size) |
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{ |
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struct axi_ops *ops = axi_get_ops(dev); |
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if (!ops->read) |
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return -ENOSYS; |
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return ops->read(dev, address, data, size); |
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} |
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int axi_write(struct udevice *dev, ulong address, void *data, |
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enum axi_size_t size) |
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{ |
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struct axi_ops *ops = axi_get_ops(dev); |
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if (!ops->write) |
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return -ENOSYS; |
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return ops->write(dev, address, data, size); |
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} |
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UCLASS_DRIVER(axi) = { |
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.id = UCLASS_AXI, |
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.name = "axi", |
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.post_bind = dm_scan_fdt_dev, |
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.flags = DM_UC_FLAG_SEQ_ALIAS, |
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}; |
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/* SPDX-License-Identifier: GPL-2.0+ */ |
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/*
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* (C) Copyright 2017 |
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* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc |
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*/ |
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#ifndef _AXI_H_ |
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#define _AXI_H_ |
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enum axi_size_t { |
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AXI_SIZE_8, |
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AXI_SIZE_16, |
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AXI_SIZE_32, |
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}; |
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/**
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* struct axi_ops - driver operations for AXI uclass |
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* |
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* Drivers should support these operations unless otherwise noted. These |
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* operations are intended to be used by uclass code, not directly from |
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* other code. |
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*/ |
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struct axi_ops { |
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/**
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* read() - Read a single value from a specified address on a AXI bus |
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* |
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* @dev: AXI bus to read from. |
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* @address: The address to read from. |
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* @data: Pointer to a variable that takes the data value read |
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* from the address on the AXI bus. |
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* @size: The size of the data to be read. |
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* @return 0 if OK, -ve on error. |
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*/ |
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int (*read)(struct udevice *dev, ulong address, void *data, |
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enum axi_size_t size); |
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/**
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* write() - Write a single value to a specified address on a AXI bus |
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* |
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* @dev: AXI bus to write to. |
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* @address: The address to write to. |
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* @data: Pointer to the data value to be written to the address |
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* on the AXI bus. |
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* @size: The size of the data to write. |
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* @return 0 if OK, -ve on error. |
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*/ |
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int (*write)(struct udevice *dev, ulong address, void *data, |
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enum axi_size_t size); |
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}; |
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#define axi_get_ops(dev) ((struct axi_ops *)(dev)->driver->ops) |
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/**
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* axi_read() - Read a single value from a specified address on a AXI bus |
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* |
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* @dev: AXI bus to read from. |
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* @address: The address to read from. |
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* @data: Pointer to a variable that takes the data value read from the |
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* address on the AXI bus. |
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* @size: The size of the data to write. |
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* @return 0 if OK, -ve on error. |
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*/ |
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int axi_read(struct udevice *dev, ulong address, void *data, |
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enum axi_size_t size); |
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/**
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* axi_write() - Write a single value to a specified address on a AXI bus |
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* |
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* @dev: AXI bus to write to. |
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* @address: The address to write to. |
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* @data: Pointer to the data value to be written to the address on the |
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* AXI bus. |
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* @size: The size of the data to write. |
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* @return 0 if OK, -ve on error. |
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*/ |
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int axi_write(struct udevice *dev, ulong address, void *data, |
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enum axi_size_t size); |
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#endif |
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