Merge branch 'master' of git://www.denx.de/git/u-boot-coldfire

master
Wolfgang Denk 17 years ago
commit a75e1a3dda
  1. 144
      board/freescale/m54455evb/u-boot.atm
  2. 141
      board/freescale/m54455evb/u-boot.int
  3. 4
      cpu/mcf523x/config.mk
  4. 29
      cpu/mcf52x2/config.mk
  5. 4
      cpu/mcf532x/config.mk
  6. 8
      cpu/mcf532x/cpu.c
  7. 4
      cpu/mcf5445x/config.mk
  8. 2
      cpu/mcf5445x/start.S
  9. 29
      include/asm-m68k/immap_5329.h
  10. 15
      include/asm-m68k/m5329.h
  11. 4
      include/asm-m68k/m5445x.h

@ -0,0 +1,144 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(m68k)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mcf5445x/start.o (.text)
lib_m68k/traps.o (.text)
lib_m68k/interrupts.o (.text)
common/dlmalloc.o (.text)
lib_generic/zlib.o (.text)
. = DEFINED(env_offset) ? env_offset : .;
common/environment.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
__got_start = .;
*(.got)
__got_end = .;
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
_sbss = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
_ebss = .;
}
_end = . ;
PROVIDE (end = .);
}

@ -0,0 +1,141 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(m68k)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mcf5445x/start.o (.text)
lib_m68k/traps.o (.text)
lib_m68k/interrupts.o (.text)
common/dlmalloc.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
__got_start = .;
*(.got)
__got_end = .;
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
_sbss = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
_ebss = .;
}
_end = . ;
PROVIDE (end = .);
}

@ -24,4 +24,8 @@
#
PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
PLATFORM_CPPFLAGS += -mcpu=5235 -fPIC
else
PLATFORM_CPPFLAGS += -m5307 -fPIC
endif

@ -24,4 +24,33 @@
#
PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/')
is5249=$(shell grep CONFIG_M5249 $(TOPDIR)/include/$(cfg))
is5253=$(shell grep CONFIG_M5253 $(TOPDIR)/include/$(cfg))
is5271=$(shell grep CONFIG_M5271 $(TOPDIR)/include/$(cfg))
is5272=$(shell grep CONFIG_M5272 $(TOPDIR)/include/$(cfg))
is5282=$(shell grep CONFIG_M5282 $(TOPDIR)/include/$(cfg))
ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
ifneq (,$(findstring CONFIG_M5249,$(is5249)))
PLATFORM_CPPFLAGS += -mcpu=5249
endif
ifneq (,$(findstring CONFIG_M5253,$(is5253)))
PLATFORM_CPPFLAGS += -mcpu=5253
endif
ifneq (,$(findstring CONFIG_M5271,$(is5271)))
PLATFORM_CPPFLAGS += -mcpu=5271
endif
ifneq (,$(findstring CONFIG_M5272,$(is5272)))
PLATFORM_CPPFLAGS += -mcpu=5272
endif
ifneq (,$(findstring CONFIG_M5282,$(is5282)))
PLATFORM_CPPFLAGS += -mcpu=5282
endif
else
PLATFORM_CPPFLAGS += -m5307
endif

@ -24,4 +24,8 @@
#
PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
PLATFORM_CPPFLAGS += -mcpu=5329 -fPIC
else
PLATFORM_CPPFLAGS += -m5307 -fPIC
endif

@ -35,14 +35,10 @@ DECLARE_GLOBAL_DATA_PTR;
int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
{
volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
wdp->cr = 0;
udelay(1000);
/* enable watchdog, set timeout to 0 and wait */
wdp->cr = WTM_WCR_EN;
while (1) ;
rcm->rcr |= RCM_RCR_SOFTRST;
/* we don't return! */
return 0;

@ -24,4 +24,8 @@
#
PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
PLATFORM_CPPFLAGS += -mcpu=54455 -fPIC
else
PLATFORM_CPPFLAGS += -m5407 -fPIC
endif

@ -136,7 +136,7 @@ _start:
movec %d0, %VBR
move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR0
movec %d0, %RAMBAR1
/* initialize general use internal ram */
move.l #0, %d0

@ -57,7 +57,8 @@
#define MMAP_PWM 0xFC090000
#define MMAP_EPORT 0xFC094000
#define MMAP_WDOG 0xFC098000
#define MMAP_CCM 0xFC0A0000
#define MMAP_RCM 0xFC0A0000
#define MMAP_CCM 0xFC0A0004
#define MMAP_GPIO 0xFC0A4000
#define MMAP_RTC 0xFC0A8000
#define MMAP_LCDC 0xFC0AC000
@ -479,20 +480,22 @@ typedef struct wdog_ctrl {
/*Chip configuration module registers */
typedef struct ccm_ctrl {
u8 rstctrl; /* 0x00 Reset Controller register */
u8 rststat; /* 0x01 Reset Status register */
u16 res1; /* 0x02 - 0x03 */
u16 ccr; /* 0x04 Chip configuration register */
u16 res2; /* 0x06 */
u16 rcon; /* 0x08 Rreset configuration register */
u16 cir; /* 0x0A Chip identification register */
u32 res3; /* 0x0C */
u16 misccr; /* 0x10 Miscellaneous control register */
u16 cdr; /* 0x12 Clock divider register */
u16 uhcsr; /* 0x14 USB Host controller status register */
u16 uocsr; /* 0x16 USB On-the-Go Controller Status Register */
u16 ccr; /* 0x00 Chip configuration register */
u16 res2; /* 0x02 */
u16 rcon; /* 0x04 Rreset configuration register */
u16 cir; /* 0x06 Chip identification register */
u32 res3; /* 0x08 */
u16 misccr; /* 0x0A Miscellaneous control register */
u16 cdr; /* 0x0C Clock divider register */
u16 uhcsr; /* 0x10 USB Host controller status register */
u16 uocsr; /* 0x12 USB On-the-Go Controller Status Reg */
} ccm_t;
typedef struct rcm {
u8 rcr;
u8 rsr;
} rcm_t;
/* GPIO port registers */
typedef struct gpio_ctrl {
/* Port Output Data Registers */

@ -246,6 +246,21 @@
#define CSCR_BSTW (0x00000008)
/*********************************************************************
* Reset Controller Module (RCM)
*********************************************************************/
/* Bit definitions and macros for RCR */
#define RCM_RCR_FRCRSTOUT (0x40)
#define RCM_RCR_SOFTRST (0x80)
/* Bit definitions and macros for RSR */
#define RCM_RSR_LOL (0x01)
#define RCM_RSR_WDR_CORE (0x02)
#define RCM_RSR_EXT (0x04)
#define RCM_RSR_POR (0x08)
#define RCM_RSR_SOFT (0x20)
/*********************************************************************
* FlexCAN Module (CAN)
*********************************************************************/
/* Bit definitions and macros for CAN_CANMCR */

@ -792,8 +792,8 @@
#define GPIO_PAR_FEC_FEC0_MASK (0xF8)
#define GPIO_PAR_FEC_FEC0_MII (0x07)
#define GPIO_PAR_FEC_FEC0_RMII_GPIO (0x03)
#define GPIO_PAR_FEC_FEC0_RMII_ATA (0x02)
#define GPIO_PAR_FEC_FEC0_ATA (0x01)
#define GPIO_PAR_FEC_FEC0_RMII_ULPI (0x02)
#define GPIO_PAR_FEC_FEC0_ULPI (0x01)
#define GPIO_PAR_FEC_FEC0_GPIO (0x00)
/* Bit definitions and macros for PAR_DMA */

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