Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>master
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#
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# (C) Copyright 2007
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# Stefan Roese, DENX Software Engineering, sr@denx.de.
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#
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# Copyright 2011 Freescale Semiconductor, Inc.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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NAND_SPL := y
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CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000
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PAD_TO := 0xff801000
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include $(TOPDIR)/config.mk |
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nandobj := $(OBJTREE)/nand_spl/
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LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds
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LSTSCRIPT= $(nandobj)/board/$(BOARDDIR)/u-boot.lst
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LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
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$(LDFLAGS) $(LDFLAGS_FINAL)
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AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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__OBJS := $(SOBJS) $(COBJS)
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LNDIR := $(nandobj)board/$(BOARDDIR)
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ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
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all: $(obj).depend $(ALL) |
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$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl |
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$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
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$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl |
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$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
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$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds |
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cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
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-Map $(nandobj)u-boot-spl.map \
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-o $(nandobj)u-boot-spl
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# The following line expands into whole rule which generates $(LSTSCRIPT),
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# the file containing u-boots LG-array linker section. This is included into
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# $(LDSCRIPT). The function make_u_boot_list is defined in helper.mk file.
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$(eval $(call make_u_boot_list, $(LSTSCRIPT), $(OBJS))) |
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$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) $(LSTSCRIPT) |
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$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(obj) -ansi -D__ASSEMBLY__ -P - <$< >$@
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# create symbolic links for common files
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$(obj)cache.c: |
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@rm -f $(obj)cache.c
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ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c
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$(obj)cpu_init_early.c: |
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)spl_minimal.c: |
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@rm -f $(obj)spl_minimal.c
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ln -sf $(SRCTREE)/$(CPUDIR)/spl_minimal.c $(obj)spl_minimal.c
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$(obj)fsl_law.c: |
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@rm -f $(obj)fsl_law.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc8xxx/law.c $(obj)fsl_law.c
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$(obj)law.c: |
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@rm -f $(obj)law.c
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ln -sf $(SRCTREE)/board/$(BOARDDIR)/law.c $(obj)law.c
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$(obj)nand_boot_fsl_elbc.c: |
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@rm -f $(obj)nand_boot_fsl_elbc.c
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ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
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$(obj)nand_boot_fsl_elbc.c
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$(obj)ns16550.c: |
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@rm -f $(obj)ns16550.c
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ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
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$(obj)resetvec.S: |
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@rm -f $(obj)resetvec.S
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ln -s $(SRCTREE)/$(CPUDIR)/resetvec.S $(obj)resetvec.S
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$(obj)fixed_ivor.S: |
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@rm -f $(obj)fixed_ivor.S
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ln -sf $(SRCTREE)/$(CPUDIR)/fixed_ivor.S $(obj)fixed_ivor.S
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$(obj)start.S: $(obj)fixed_ivor.S |
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@rm -f $(obj)start.S
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ln -sf $(SRCTREE)/$(CPUDIR)/start.S $(obj)start.S
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$(obj)tlb.c: |
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@rm -f $(obj)tlb.c
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ln -sf $(SRCTREE)/$(CPUDIR)/tlb.c $(obj)tlb.c
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$(obj)tlb_table.c: |
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@rm -f $(obj)tlb_table.c
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ln -sf $(SRCTREE)/board/$(BOARDDIR)/tlb.c $(obj)tlb_table.c
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ifneq ($(OBJTREE), $(SRCTREE)) |
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$(obj)nand_boot.c: |
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@rm -f $(obj)nand_boot.c
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ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/nand_boot.c $(obj)nand_boot.c
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endif |
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#########################################################################
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$(obj)%.o: $(obj)%.S |
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$(CC) $(AFLAGS) -c -o $@ $<
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$(obj)%.o: $(obj)%.c |
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$(CC) $(CFLAGS) -c -o $@ $<
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -1,132 +0,0 @@ |
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/*
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* Copyright 2011 Freescale Semiconductor, Inc. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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* |
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*/ |
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#include <common.h> |
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#include <ns16550.h> |
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#include <asm/io.h> |
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#include <nand.h> |
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#include <asm/fsl_law.h> |
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#include <asm/fsl_ddr_sdram.h> |
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#include <asm/global_data.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/*
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* Fixed sdram init -- doesn't use serial presence detect. |
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*/ |
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void sdram_init(void) |
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{ |
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ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC85xx_DDR_ADDR; |
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__raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds); |
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__raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config); |
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#if CONFIG_CHIP_SELECTS_PER_CTRL > 1 |
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__raw_writel(CONFIG_SYS_DDR_CS1_BNDS, &ddr->cs1_bnds); |
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__raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, &ddr->cs1_config); |
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#endif |
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__raw_writel(CONFIG_SYS_DDR_TIMING_3, &ddr->timing_cfg_3); |
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__raw_writel(CONFIG_SYS_DDR_TIMING_0, &ddr->timing_cfg_0); |
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__raw_writel(CONFIG_SYS_DDR_TIMING_1, &ddr->timing_cfg_1); |
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__raw_writel(CONFIG_SYS_DDR_TIMING_2, &ddr->timing_cfg_2); |
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__raw_writel(CONFIG_SYS_DDR_CONTROL_2, &ddr->sdram_cfg_2); |
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__raw_writel(CONFIG_SYS_DDR_MODE_1, &ddr->sdram_mode); |
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__raw_writel(CONFIG_SYS_DDR_MODE_2, &ddr->sdram_mode_2); |
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__raw_writel(CONFIG_SYS_DDR_INTERVAL, &ddr->sdram_interval); |
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__raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init); |
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__raw_writel(CONFIG_SYS_DDR_CLK_CTRL, &ddr->sdram_clk_cntl); |
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__raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4); |
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__raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5); |
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__raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl); |
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__raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL, &ddr->ddr_wrlvl_cntl); |
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/* Set, but do not enable the memory */ |
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__raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg); |
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asm volatile("sync;isync"); |
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udelay(500); |
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/* Let the controller go */ |
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out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN); |
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set_next_law(0, CONFIG_SYS_SDRAM_SIZE_LAW, LAW_TRGT_IF_DDR_1); |
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} |
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void board_init_f(ulong bootflag) |
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{ |
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u32 plat_ratio; |
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
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#ifndef CONFIG_QE |
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ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); |
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#endif |
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/* initialize selected port with appropriate baud rate */ |
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plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
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plat_ratio >>= 1; |
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gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; |
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NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
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gd->bus_clk / 16 / CONFIG_BAUDRATE); |
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puts("\nNAND boot... "); |
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#ifndef CONFIG_QE |
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/* init DDR3 reset signal */ |
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__raw_writel(0x02000000, &pgpio->gpdir); |
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__raw_writel(0x00200000, &pgpio->gpodr); |
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__raw_writel(0x00000000, &pgpio->gpdat); |
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udelay(1000); |
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__raw_writel(0x00200000, &pgpio->gpdat); |
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udelay(1000); |
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__raw_writel(0x00000000, &pgpio->gpdir); |
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#endif |
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/* Initialize the DDR3 */ |
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sdram_init(); |
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/* copy code to RAM and jump to it - this should not return */ |
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/* NOTE - code has to be copied out of NAND buffer before
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* other blocks can be read. |
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*/ |
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relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, |
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CONFIG_SYS_NAND_U_BOOT_RELOC); |
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} |
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void board_init_r(gd_t *gd, ulong dest_addr) |
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{ |
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nand_boot(); |
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} |
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void putc(char c) |
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{ |
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if (c == '\n') |
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NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); |
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NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); |
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} |
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void puts(const char *str) |
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{ |
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while (*str) |
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putc(*str++); |
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} |
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