ks2_evm: readme: align according to actual sources

Update readme file for Keystone II EVM boards to actual sources.
Also correct some typos. For now the Edison evaluation board is
added, README for K2E is mostly the same, so update README to
contain information also for K2E evm. Rename file to README as
it contains information for all keystone evm boards.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

board/ti/ks2_evm/README

@@ -1,46 +1,56 @@
-U-Boot port for Texas Instruments XTCIEVMK2X
-============================================
+U-Boot port for Texas Instruments Keystone II EVM boards
+========================================================
 
 Author: Murali Karicheri <m-karicheri2@ti.com>
 
-This README has information on the u-boot port for XTCIEVMK2X EVM board.
+This README has information on the u-boot port for K2HK, K2E boards.
 Documentation for this board can be found at
-  http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx
+http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx
+https://www.einfochips.com/index.php/partnerships/texas-instruments/k2e-evm.html
 
-The board is based on Texas Instruments Keystone2 family of SoCs : K2H, K2K.
+The K2HK board is based on Texas Instruments Keystone2 family of SoCs: K2H, K2K.
 More details on these SoCs are available at company websites
  K2K: http://www.ti.com/product/tci6638k2k
  K2H: http://www.ti.com/product/tci6638k2h
 
+The K2E SoC details are available at
+ K2E http://www.ti.com/lit/ds/symlink/66ak2e05.pdf
+
 Board configuration:
 ====================
 
-Some of the peripherals that are configured by u-boot are:-
+Some of the peripherals that are configured by u-boot
++------+-------+-------+-----------+-----------+-------+-------+----+
+|      |DDR3   |NAND   |MSM SRAM   |ETH ports  |UART   |I2C    |SPI |
++------+-------+-------+-----------+-----------+-------+-------+----+
+|K2HK  |2      |512MB  |6MB	   |4(2)       |2      |3      |3   |
+|K2E   |4      |512MB  |2MB	   |8(2)       |2      |3      |3   |
++------+-------+-------+-----------+-----------+-------+-------+----+
 
-1. 2GB DDR3 (can support 8GB SO DIMM as well)
-2. 512M NAND (over ti emif16 bus)
-3. 6MB MSM SRAM (part of the SoC)
-4. two 1GBit Ethernet ports (SoC supports upto 4)
-5. two UART ports
-6. three i2c interfaces
-7. three spi interfaces (only 1 interface supported in driver)
+There are only 2 eth port installed on the boards.
 
-There are seperate PLLs to drive clocks to Tetris ARM and Peripherals.
+There are separate PLLs to drive clocks to Tetris ARM and Peripherals.
 To bring up SMP Linux on this board, there is a boot monitor
 code that will be installed in MSMC SRAM. There is command available
 to install this image from u-boot.
 
 The port related files can be found at following folders
  keystone2 SoC related files: arch/arm/cpu/armv7/keystone/
- K2HK evm board files: board/ti/k2hk_evm/
+ EVMs board files: board/ti/k2s_evm/
+
+Board configuration files:
+include/configs/k2hk_evm.h
+include/configs/k2e_evm.h
 
-board configuration file: include/configs/k2hk_evm.h
+As u-boot is migrating to Kconfig there is also board defconfig files
+configs/k2e_evm_defconfig
+configs/k2hk_evm_defconfig
 
 Supported boot modes:
  - SPI NOR boot
  - AEMIF NAND boot
 
-Supported image formats:-
+Supported image formats:
  - u-boot.bin: for loading and running u-boot.bin through Texas instruments
                code composure studio (CCS)
  - u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
@@ -48,29 +58,32 @@ Supported image formats:-
 
 Build instructions:
 ===================
+Examples for k2hk, for k2e just replace k2hk prefix accordingly.
+Don't forget to add ARCH=arm and CROSS_COMPILE.
 
 To build u-boot.bin
-  >make k2hk_evm_config
+  >make k2hk_evm_defconfig
   >make u-boot-spi.gph
 
 To build u-boot-spi.gph
-  >make k2hk_evm_config
+  >make k2hk_evm_defconfig
   >make u-boot-spi.gph
 
 To build u-boot-nand.gph
-  >make k2hk_evm_config
+  >make k2hk_evm_defconfig
   >make u-boot-nand.gph
 
-Load and Run U-Boot on K2HK EVM using CCS
+Load and Run U-Boot on keystone EVMs using CCS
 =========================================
 
 Need Code Composer Studio (CCS) installed on a PC to load and run u-boot.bin
 on EVM. See instructions at below link for installing CCS on a Windows PC.
 http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started#
 Installing_Code_Composer_Studio
-Use u-boot.bin from the build folder for loading annd running u-boot binary
+Use u-boot.bin from the build folder for loading and running u-boot binary
 on EVM. Follow instructions at
-http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup
+K2HK http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup
+K2E  http://processors.wiki.ti.com/index.php/EVMK2E_Hardware_Setup
 to configure SW1 dip switch to use "No Boot/JTAG DSP Little Endian Boot Mode"
 and Power ON the EVM.  Follow instructions to connect serial port of EVM to
 PC and start TeraTerm or Hyper Terminal.
@@ -82,7 +95,7 @@ The instructions provided in the above link uses a script for
 loading the u-boot binary on the target EVM. Instead do the following:-
 
 1. Right click to "Texas Instruments XDS2xx USB Emulator_0/CortexA15_1 core (D
-   isconnected: Unknown)" at the debug window (This is created once Target
+   is connected: Unknown)" at the debug window (This is created once Target
    configuration is launched) and select "Connect Target".
 2. Once target connect is successful, choose Tools->Load Memory option from the
    top level menu. At the Load Memory window, choose the file u-boot.bin
@@ -109,28 +122,28 @@ Hit any key to stop autoboot:  0
 SPI NOR Flash programming instructions
 ======================================
 U-Boot image can be flashed to first 512KB of the NOR flash using following
-instructions:-
+instructions:
 
 1. Start CCS and run U-boot as described above.
 2. Suspend Target. Select Run -> Suspend from top level menu
    CortexA15_1 (Free Running)"
 3. Load u-boot-spi.gph binary from build folder on to DDR address 0x87000000
-   through CCS as described in step 2 of "Load and Run U-Boot on K2HK EVM
+   through CCS as described in step 2 of "Load and Run U-Boot on K2HK/K2E EVM
    using CCS", but using address 0x87000000.
-4. Free Run the target as desribed earlier (step 4) to get u-boot prompt
+4. Free Run the target as described earlier (step 4) to get u-boot prompt
 5. At the U-Boot console type following to setup u-boot environment variables.
    setenv addr_uboot 0x87000000
    setenv filesize <size in hex of u-boot-spi.gph rounded to hex 0x10000>
    run burn_uboot_spi
    Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
    to "SPI Little Endian Boot mode" as per instruction at
-   http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup.
+   http://processors.wiki.ti.com/index.php/*_Hardware_Setup.
 6. Power ON the EVM. The EVM now boots with u-boot image on the NOR flash.
 
 AEMIF NAND Flash programming instructions
 ======================================
 U-Boot image can be flashed to first 1024KB of the NAND flash using following
-instructions:-
+instructions:
 
 1. Start CCS and run U-boot as described above.
 2. Suspend Target. Select Run -> Suspend from top level menu
@@ -138,11 +151,11 @@ instructions:-
 3. Load u-boot-nand.gph binary from build folder on to DDR address 0x87000000
    through CCS as described in step 2 of "Load and Run U-Boot on K2HK EVM
    using CCS", but using address 0x87000000.
-4. Free Run the target as desribed earlier (step 4) to get u-boot prompt
+4. Free Run the target as described earlier (step 4) to get u-boot prompt
 5. At the U-Boot console type following to setup u-boot environment variables.
    setenv filesize <size in hex of u-boot-nand.gph rounded to hex 0x10000>
    run burn_uboot_nand
    Once u-boot prompt is available, Power OFF the EVM. Set the SW1 dip switch
    to "ARM NAND Boot mode" as per instruction at
-   http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup.
+   http://processors.wiki.ti.com/index.php/*_Hardware_Setup.
 6. Power ON the EVM. The EVM now boots with u-boot image on the NAND flash.