Merge branch 'master' of http://git.denx.de/u-boot-sunxi
commit
a851604ca3
@ -0,0 +1,37 @@ |
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/*
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* DRAM init helper functions |
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* |
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* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/dram.h> |
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/*
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* Wait up to 1s for value to be set in given part of reg. |
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*/ |
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void mctl_await_completion(u32 *reg, u32 mask, u32 val) |
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{ |
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unsigned long tmo = timer_get_us() + 1000000; |
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while ((readl(reg) & mask) != val) { |
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if (timer_get_us() > tmo) |
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panic("Timeout initialising DRAM\n"); |
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} |
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} |
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/*
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* Test if memory at offset offset matches memory at begin of DRAM |
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*/ |
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bool mctl_mem_matches(u32 offset) |
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{ |
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/* Try to write different values to RAM at two addresses */ |
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writel(0, CONFIG_SYS_SDRAM_BASE); |
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writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset); |
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/* Check if the same value is actually observed when reading back */ |
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return readl(CONFIG_SYS_SDRAM_BASE) == |
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readl(CONFIG_SYS_SDRAM_BASE + offset); |
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} |
@ -0,0 +1,42 @@ |
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/* |
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* Utility functions for FEL mode. |
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* |
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* Copyright (c) 2015 Google, Inc |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <asm-offsets.h> |
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#include <config.h> |
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#include <asm/system.h> |
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#include <linux/linkage.h> |
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ENTRY(save_boot_params) |
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ldr r0, =fel_stash |
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str sp, [r0, #0] |
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str lr, [r0, #4] |
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mrs lr, cpsr @ Read CPSR
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str lr, [r0, #8] |
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mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register
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str lr, [r0, #12] |
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mrc p15, 0, lr, c12, c0, 0 @ Read VBAR
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str lr, [r0, #16] |
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mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register
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str lr, [r0, #20] |
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b save_boot_params_ret |
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ENDPROC(save_boot_params) |
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ENTRY(return_to_fel) |
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mov sp, r0 |
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mov lr, r1 |
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ldr r0, =fel_stash |
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ldr r1, [r0, #20] |
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mcr p15, 0, r1, c1, c0, 0 @ Write CP15 Control Register
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ldr r1, [r0, #16] |
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mcr p15, 0, r1, c12, c0, 0 @ Write VBAR
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ldr r1, [r0, #12] |
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mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register
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ldr r1, [r0, #8] |
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msr cpsr, r1 @ Write CPSR
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bx lr |
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ENDPROC(return_to_fel) |
@ -1,82 +0,0 @@ |
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/* |
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* (C) Copyright 2013 |
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* Henrik Nordstrom <henrik@henriknordstrom.net> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
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OUTPUT_ARCH(arm) |
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ENTRY(s_init) |
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SECTIONS |
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{ |
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. = 0x00002000; |
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. = ALIGN(4); |
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.text : |
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{ |
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*(.text.s_init) |
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*(.text*) |
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} |
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. = ALIGN(4); |
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
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. = ALIGN(4); |
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.data : { |
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*(.data*) |
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} |
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. = ALIGN(4); |
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.u_boot_list : { |
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KEEP(*(SORT(.u_boot_list*))); |
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} |
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. = ALIGN(4); |
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. = .; |
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. = ALIGN(4); |
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.rel.dyn : { |
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__rel_dyn_start = .; |
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*(.rel*) |
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__rel_dyn_end = .; |
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} |
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.dynsym : { |
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__dynsym_start = .; |
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*(.dynsym) |
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} |
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. = ALIGN(4); |
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.note.gnu.build-id : |
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{ |
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*(.note.gnu.build-id) |
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} |
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_end = .; |
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. = ALIGN(4096); |
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.mmutable : { |
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*(.mmutable) |
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} |
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.bss_start __rel_dyn_start (OVERLAY) : { |
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KEEP(*(.__bss_start)); |
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__bss_base = .; |
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} |
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.bss __bss_base (OVERLAY) : { |
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*(.bss*) |
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. = ALIGN(4); |
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__bss_limit = .; |
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} |
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.bss_end __bss_limit (OVERLAY) : { |
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KEEP(*(.__bss_end)); |
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} |
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/DISCARD/ : { *(.dynstr*) } |
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/DISCARD/ : { *(.dynamic*) } |
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/DISCARD/ : { *(.plt*) } |
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/DISCARD/ : { *(.interp*) } |
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/DISCARD/ : { *(.gnu*) } |
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/DISCARD/ : { *(.note*) } |
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} |
@ -0,0 +1,15 @@ |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER" |
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CONFIG_FDTFILE="sun5i-a13-ampe-a76.dtb" |
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CONFIG_USB_MUSB_SUNXI=y |
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CONFIG_USB0_VBUS_PIN="PG12" |
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CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" |
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CONFIG_VIDEO_LCD_POWER="AXP0-0" |
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CONFIG_VIDEO_LCD_BL_EN="AXP0-1" |
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CONFIG_VIDEO_LCD_BL_PWM="PB2" |
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+S:CONFIG_ARM=y |
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+S:CONFIG_ARCH_SUNXI=y |
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+S:CONFIG_MACH_SUN5I=y |
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+S:CONFIG_DRAM_CLK=432 |
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+S:CONFIG_DRAM_ZQ=123 |
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+S:CONFIG_DRAM_EMR1=4 |
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