Driver model will share many functions with the existing PCI implementation. Move these into their own file to avoid duplication and confusion. Signed-off-by: Simon Glass <sjg@chromium.org>master
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/*
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* Copyright (c) 2014 Google, Inc |
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* |
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* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Andreas Heppel <aheppel@sysgo.de> |
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* |
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* (C) Copyright 2002, 2003 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <errno.h> |
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#include <pci.h> |
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#include <asm/io.h> |
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const char *pci_class_str(u8 class) |
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{ |
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switch (class) { |
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case PCI_CLASS_NOT_DEFINED: |
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return "Build before PCI Rev2.0"; |
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break; |
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case PCI_BASE_CLASS_STORAGE: |
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return "Mass storage controller"; |
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break; |
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case PCI_BASE_CLASS_NETWORK: |
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return "Network controller"; |
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break; |
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case PCI_BASE_CLASS_DISPLAY: |
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return "Display controller"; |
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break; |
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case PCI_BASE_CLASS_MULTIMEDIA: |
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return "Multimedia device"; |
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break; |
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case PCI_BASE_CLASS_MEMORY: |
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return "Memory controller"; |
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break; |
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case PCI_BASE_CLASS_BRIDGE: |
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return "Bridge device"; |
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break; |
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case PCI_BASE_CLASS_COMMUNICATION: |
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return "Simple comm. controller"; |
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break; |
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case PCI_BASE_CLASS_SYSTEM: |
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return "Base system peripheral"; |
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break; |
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case PCI_BASE_CLASS_INPUT: |
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return "Input device"; |
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break; |
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case PCI_BASE_CLASS_DOCKING: |
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return "Docking station"; |
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break; |
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case PCI_BASE_CLASS_PROCESSOR: |
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return "Processor"; |
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break; |
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case PCI_BASE_CLASS_SERIAL: |
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return "Serial bus controller"; |
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break; |
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case PCI_BASE_CLASS_INTELLIGENT: |
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return "Intelligent controller"; |
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break; |
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case PCI_BASE_CLASS_SATELLITE: |
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return "Satellite controller"; |
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break; |
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case PCI_BASE_CLASS_CRYPT: |
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return "Cryptographic device"; |
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break; |
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case PCI_BASE_CLASS_SIGNAL_PROCESSING: |
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return "DSP"; |
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break; |
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case PCI_CLASS_OTHERS: |
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return "Does not fit any class"; |
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break; |
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default: |
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return "???"; |
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break; |
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}; |
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} |
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pci_dev_t pci_find_class(uint find_class, int index) |
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{ |
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int bus; |
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int devnum; |
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pci_dev_t bdf; |
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uint32_t class; |
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for (bus = 0; bus <= pci_last_busno(); bus++) { |
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for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES - 1; devnum++) { |
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pci_read_config_dword(PCI_BDF(bus, devnum, 0), |
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PCI_CLASS_REVISION, &class); |
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if (class >> 16 == 0xffff) |
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continue; |
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for (bdf = PCI_BDF(bus, devnum, 0); |
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bdf <= PCI_BDF(bus, devnum, |
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PCI_MAX_PCI_FUNCTIONS - 1); |
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bdf += PCI_BDF(0, 0, 1)) { |
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pci_read_config_dword(bdf, PCI_CLASS_REVISION, |
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&class); |
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class >>= 8; |
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if (class != find_class) |
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continue; |
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/*
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* Decrement the index. We want to return the |
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* correct device, so index is 0 for the first |
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* matching device, 1 for the second, etc. |
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*/ |
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if (index) { |
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index--; |
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continue; |
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} |
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/* Return index'th controller. */ |
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return bdf; |
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} |
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} |
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} |
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return -ENODEV; |
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} |
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__weak int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) |
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{ |
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/*
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* Check if pci device should be skipped in configuration |
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*/ |
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if (dev == PCI_BDF(hose->first_busno, 0, 0)) { |
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#if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE) /* don't skip host bridge */ |
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/*
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* Only skip configuration if "pciconfighost" is not set |
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*/ |
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if (getenv("pciconfighost") == NULL) |
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return 1; |
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#else |
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return 1; |
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#endif |
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} |
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return 0; |
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} |
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/* Get a virtual address associated with a BAR region */ |
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void *pci_map_bar(pci_dev_t pdev, int bar, int flags) |
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{ |
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pci_addr_t pci_bus_addr; |
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u32 bar_response; |
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/* read BAR address */ |
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pci_read_config_dword(pdev, bar, &bar_response); |
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pci_bus_addr = (pci_addr_t)(bar_response & ~0xf); |
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/*
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* Pass "0" as the length argument to pci_bus_to_virt. The arg |
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* isn't actualy used on any platform because u-boot assumes a static |
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* linear mapping. In the future, this could read the BAR size |
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* and pass that as the size if needed. |
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*/ |
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return pci_bus_to_virt(pdev, pci_bus_addr, flags, 0, MAP_NOCACHE); |
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} |
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void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum, |
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u32 addr_and_ctrl) |
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{ |
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int bar; |
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bar = PCI_BASE_ADDRESS_0 + barnum * 4; |
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pci_hose_write_config_dword(hose, dev, bar, addr_and_ctrl); |
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} |
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u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum) |
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{ |
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u32 addr; |
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int bar; |
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bar = PCI_BASE_ADDRESS_0 + barnum * 4; |
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pci_hose_read_config_dword(hose, dev, bar, &addr); |
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if (addr & PCI_BASE_ADDRESS_SPACE_IO) |
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return addr & PCI_BASE_ADDRESS_IO_MASK; |
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else |
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return addr & PCI_BASE_ADDRESS_MEM_MASK; |
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} |
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int __pci_hose_bus_to_phys(struct pci_controller *hose, |
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pci_addr_t bus_addr, |
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unsigned long flags, |
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unsigned long skip_mask, |
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phys_addr_t *pa) |
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{ |
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struct pci_region *res; |
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int i; |
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for (i = 0; i < hose->region_count; i++) { |
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res = &hose->regions[i]; |
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if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0) |
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continue; |
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if (res->flags & skip_mask) |
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continue; |
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if (bus_addr >= res->bus_start && |
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(bus_addr - res->bus_start) < res->size) { |
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*pa = (bus_addr - res->bus_start + res->phys_start); |
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return 0; |
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} |
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} |
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return 1; |
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} |
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phys_addr_t pci_hose_bus_to_phys(struct pci_controller *hose, |
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pci_addr_t bus_addr, |
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unsigned long flags) |
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{ |
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phys_addr_t phys_addr = 0; |
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int ret; |
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if (!hose) { |
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puts("pci_hose_bus_to_phys: invalid hose\n"); |
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return phys_addr; |
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} |
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/*
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* if PCI_REGION_MEM is set we do a two pass search with preference |
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* on matches that don't have PCI_REGION_SYS_MEMORY set |
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*/ |
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if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) { |
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ret = __pci_hose_bus_to_phys(hose, bus_addr, |
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flags, PCI_REGION_SYS_MEMORY, &phys_addr); |
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if (!ret) |
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return phys_addr; |
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} |
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ret = __pci_hose_bus_to_phys(hose, bus_addr, flags, 0, &phys_addr); |
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if (ret) |
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puts("pci_hose_bus_to_phys: invalid physical address\n"); |
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return phys_addr; |
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} |
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pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index) |
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{ |
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struct pci_device_id ids[2] = { {}, {0, 0} }; |
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ids[0].vendor = vendor; |
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ids[0].device = device; |
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return pci_find_devices(ids, index); |
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} |
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pci_dev_t pci_hose_find_devices(struct pci_controller *hose, int busnum, |
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struct pci_device_id *ids, int *indexp) |
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{ |
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int found_multi = 0; |
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u16 vendor, device; |
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u8 header_type; |
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pci_dev_t bdf; |
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int i; |
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for (bdf = PCI_BDF(busnum, 0, 0); |
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bdf < PCI_BDF(busnum + 1, 0, 0); |
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bdf += PCI_BDF(0, 0, 1)) { |
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if (pci_skip_dev(hose, bdf)) |
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continue; |
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if (!PCI_FUNC(bdf)) { |
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pci_read_config_byte(bdf, PCI_HEADER_TYPE, |
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&header_type); |
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found_multi = header_type & 0x80; |
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} else { |
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if (!found_multi) |
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continue; |
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} |
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pci_read_config_word(bdf, PCI_VENDOR_ID, &vendor); |
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pci_read_config_word(bdf, PCI_DEVICE_ID, &device); |
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for (i = 0; ids[i].vendor != 0; i++) { |
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if (vendor == ids[i].vendor && |
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device == ids[i].device) { |
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if ((*indexp) <= 0) |
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return bdf; |
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(*indexp)--; |
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} |
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} |
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} |
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return -1; |
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} |
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