Tom Rini
7 years ago
commit
af8ef2ed21
@ -0,0 +1,15 @@ |
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if TARGET_PUMA_RK3399 |
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config SYS_BOARD |
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default "puma_rk3399" |
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config SYS_VENDOR |
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default "theobroma-systems" |
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config SYS_CONFIG_NAME |
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default "puma_rk3399" |
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config BOARD_SPECIFIC_OPTIONS # dummy |
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def_bool y |
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endif |
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@ -0,0 +1,10 @@ |
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PUMA-RK3399 |
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M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
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M: Klaus Goger <klaus.goger@theobroma-systems.com> |
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S: Maintained |
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F: board/theobroma-systems/puma_rk3399 |
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F: include/configs/puma_rk3399.h |
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F: arch/arm/dts/rk3399-puma.dts |
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F: configs/puma-rk3399_defconfig |
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W: https://www.theobroma-systems.com/rk3399-q7/tech-specs |
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T: git git://git.theobroma-systems.com/puma-u-boot.git |
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@ -0,0 +1,7 @@ |
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#
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# (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += puma-rk3399.o
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@ -0,0 +1,73 @@ |
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Introduction |
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============ |
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The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip |
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RK3399 in a Qseven-compatible form-factor. |
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|
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RK3399-Q7 features: |
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* CPU: ARMv8 64bit Big-Little architecture, |
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* Big: dual-core Cortex-A72 |
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* Little: quad-core Cortex-A53 |
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* IRAM: 200KB |
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* DRAM: 4GB-128MB dual-channel |
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* eMMC: onboard eMMC |
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* SD/MMC |
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* GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY |
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* USB: |
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* USB3.0 dual role port |
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* 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub |
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* Display: HDMI/eDP/MIPI |
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* Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF) |
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* NOR Flash: onboard SPI NOR |
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* Companion Controller: onboard additional Cortex-M0 microcontroller |
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* RTC |
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* fan controller |
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* CAN |
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Here is the step-by-step to boot to U-Boot on rk3399. |
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Get the Source and build ATF/Cortex-M0 binaries |
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=============================================== |
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> git clone git://git.theobroma-systems.com/arm-trusted-firmware.git |
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> git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git |
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Compile the ATF |
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=============== |
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> cd arm-trusted-firmware |
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> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 |
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> cp build/rk3399/release/bl31.bin ../u-boot |
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Compile the M0 firmware |
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======================= |
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> cd ../rk3399-cortex-m0 |
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> make CROSS_COMPILE=arm-cortex_m0-eabi- |
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> cp rk3399m0.bin ../u-boot |
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Compile the U-Boot |
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================== |
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> cd ../u-boot |
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> make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all |
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Package the image |
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================= |
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> tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl.img |
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> tools/mkimage -f board/theobroma/puma_rk3399/fit_spl_atf.its \ |
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-E rk3399_bl3x.itb |
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Flash the image |
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=============== |
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Copy the SPL to offset 32k and the FIT image containing the payloads |
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(U-Boot proper, ATF, M0 Firmware, devicetree) to offset 256k on a SD |
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card. |
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> dd if=spl.img of=/dev/sdb seek=64 |
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> dd if=rk3399_bl3x.itb of=/dev/sdb seek=512 |
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After powering up the board (with the inserted SD card), you should see |
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a U-Boot console on UART0 (115200n8). |
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@ -0,0 +1,57 @@ |
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/* |
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* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH |
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* |
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* Minimal dts for a SPL FIT image payload. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ X11 |
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*/ |
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/dts-v1/; |
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/ { |
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description = "FIT image with U-Boot proper, ATF bl31, M0 Firmware, DTB"; |
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#address-cells = <1>; |
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images { |
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uboot@1 { |
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description = "U-Boot (64-bit)"; |
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data = /incbin/("../../../u-boot-nodtb.bin"); |
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type = "standalone"; |
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arch = "arm64"; |
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compression = "none"; |
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load = <0x00200000>; |
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}; |
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atf@1 { |
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description = "ARM Trusted Firmware"; |
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data = /incbin/("../../../bl31.bin"); |
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type = "firmware"; |
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arch = "arm64"; |
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compression = "none"; |
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load = <0x00001000>; |
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entry = <0x00001000>; |
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}; |
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pmu@1 { |
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description = "Cortex-M0 firmware"; |
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data = /incbin/("../../../rk3399m0.bin"); |
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type = "pmu-firmware"; |
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compression = "none"; |
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load = <0xff8c0000>; |
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}; |
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fdt@1 { |
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description = "RK3399-Q7 (Puma) flat device-tree"; |
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data = /incbin/("../../../u-boot.dtb"); |
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type = "flat_dt"; |
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compression = "none"; |
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}; |
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}; |
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configurations { |
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default = "conf@1"; |
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conf@1 { |
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description = "Theobroma Systems RK3399-Q7 (Puma) SoM"; |
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firmware = "uboot@1"; |
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loadables = "atf@1"; |
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fdt = "fdt@1"; |
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}; |
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}; |
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}; |
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@ -0,0 +1,71 @@ |
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <dm/pinctrl.h> |
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#include <dm/uclass-internal.h> |
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#include <asm/arch/periph.h> |
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#include <power/regulator.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int board_init(void) |
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{ |
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struct udevice *pinctrl, *regulator; |
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int ret; |
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/*
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* The PWM does not have decicated interrupt number in dts and can |
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* not get periph_id by pinctrl framework, so let's init them here. |
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* The PWM2 and PWM3 are for pwm regulators. |
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*/ |
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); |
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if (ret) { |
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debug("%s: Cannot find pinctrl device\n", __func__); |
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goto out; |
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} |
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2); |
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if (ret) { |
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debug("%s PWM2 pinctrl init fail!\n", __func__); |
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goto out; |
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} |
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/* rk3399 need to init vdd_center to get the correct output voltage */ |
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ret = regulator_get_by_platname("vdd_center", ®ulator); |
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if (ret) |
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debug("%s: Cannot get vdd_center regulator\n", __func__); |
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ret = regulator_get_by_platname("vcc5v0_host", ®ulator); |
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if (ret) { |
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debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); |
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goto out; |
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} |
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ret = regulator_set_enable(regulator, true); |
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if (ret) { |
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debug("%s vcc5v0-host-en set fail!\n", __func__); |
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goto out; |
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} |
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out: |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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gd->ram_size = 0x80000000; |
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return 0; |
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} |
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int dram_init_banksize(void) |
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{ |
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/* Reserve 0x200000 for ATF bl31 */ |
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gd->bd->bi_dram[0].start = 0x200000; |
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gd->bd->bi_dram[0].size = 0x7e000000; |
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return 0; |
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} |
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@ -0,0 +1,27 @@ |
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __PUMA_RK3399_H |
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#define __PUMA_RK3399_H |
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#include <configs/rk3399_common.h> |
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/*
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* SPL @ 32kB for ~130kB |
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* ENV @ 240KB for 8kB |
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* FIT payload (ATF, U-Boot, FDT) @ 256kB |
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*/ |
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#undef CONFIG_ENV_OFFSET |
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#define CONFIG_ENV_OFFSET (240 * 1024) |
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#define CONFIG_ENV_IS_IN_MMC |
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#define CONFIG_SYS_MMC_ENV_DEV 1 |
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#define SDRAM_BANK_SIZE (2UL << 30) |
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#define CONFIG_SYS_WHITE_ON_BLACK |
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#endif |
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