Wolfgang Denk
15 years ago
commit
b097b9282c
@ -1,2 +0,0 @@ |
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# currently only NOR flash booting is supported
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CONFIG_SYS_TEXT_BASE = 0x10000000
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@ -0,0 +1,54 @@ |
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2010
|
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# Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS-y += top9000.o
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COBJS-$(CONFIG_ATMEL_SPI) += spi.o
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,61 @@ |
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/*
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* Copyright (C) 2010 |
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* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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|
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#include <common.h> |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/at91_spi.h> |
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#include <asm/arch/gpio.h> |
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#include <spi.h> |
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static const struct { |
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u32 port; |
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u32 bit; |
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} cs_to_portbit[2][4] = { |
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{{AT91_PIO_PORTA, 3}, {AT91_PIO_PORTC, 11}, |
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{AT91_PIO_PORTC, 16}, {AT91_PIO_PORTC, 17} }, |
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{{AT91_PIO_PORTB, 3}, {AT91_PIO_PORTC, 5}, |
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{AT91_PIO_PORTC, 4}, {AT91_PIO_PORTC, 3} } |
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}; |
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int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
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{ |
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debug("spi_cs_is_valid: bus=%u cs=%u\n", bus, cs); |
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if (bus < 2 && cs < 4) |
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return 1; |
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return 0; |
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} |
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void spi_cs_activate(struct spi_slave *slave) |
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{ |
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debug("spi_cs_activate: bus=%u cs=%u\n", slave->bus, slave->cs); |
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at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port, |
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cs_to_portbit[slave->bus][slave->cs].bit, 0); |
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} |
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|
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void spi_cs_deactivate(struct spi_slave *slave) |
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{ |
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debug("spi_cs_deactivate: bus=%u cs=%u\n", slave->bus, slave->cs); |
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at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port, |
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cs_to_portbit[slave->bus][slave->cs].bit, 1); |
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} |
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@ -0,0 +1,290 @@ |
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/*
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* (C) Copyright 2007-2008 |
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* Stelian Pop <stelian.pop@leadtechdesign.com> |
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* Lead Tech Design <www.leadtechdesign.com> |
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* |
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* (C) Copyright 2010 |
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* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <net.h> |
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#include <netdev.h> |
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#include <mmc.h> |
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#include <i2c.h> |
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#include <spi.h> |
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#include <asm/arch/at91sam9260.h> |
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#include <asm/arch/at91sam9260_matrix.h> |
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#include <asm/arch/at91sam9_smc.h> |
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#include <asm/arch/at91_common.h> |
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#include <asm/arch/at91_pmc.h> |
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#include <asm/arch/at91_rstc.h> |
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#include <asm/arch/at91_shdwn.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/arch/io.h> |
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#include <asm/arch/hardware.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#ifdef CONFIG_CMD_NAND |
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static void nand_hw_init(void) |
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{ |
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unsigned long csa; |
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/* Enable CS3 */ |
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csa = at91_sys_read(AT91_MATRIX_EBICSA); |
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at91_sys_write(AT91_MATRIX_EBICSA, |
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csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
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/* Configure SMC CS3 for NAND/SmartMedia */ |
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at91_sys_write(AT91_SMC_SETUP(3), |
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AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | |
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AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); |
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at91_sys_write(AT91_SMC_PULSE(3), |
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AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | |
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AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); |
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at91_sys_write(AT91_SMC_CYCLE(3), |
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AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); |
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at91_sys_write(AT91_SMC_MODE(3), |
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AT91_SMC_READMODE | AT91_SMC_WRITEMODE | |
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AT91_SMC_EXNWMODE_DISABLE | |
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AT91_SMC_DBW_8 | |
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AT91_SMC_TDF_(2)); |
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/* Configure RDY/BSY */ |
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); |
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/* Enable NandFlash */ |
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
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} |
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#endif |
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#ifdef CONFIG_MACB |
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static void macb_hw_init(void) |
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{ |
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/* Enable EMAC clock */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC); |
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/* Initialize EMAC=MACB hardware */ |
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at91_macb_hw_init(); |
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} |
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#endif |
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#ifdef CONFIG_GENERIC_ATMEL_MCI |
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/* this is a weak define that we are overriding */ |
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int board_mmc_init(bd_t *bd) |
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{ |
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/* Enable MCI clock */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI); |
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/* Initialize MCI hardware */ |
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at91_mci_hw_init(); |
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/* This calls the atmel_mmc_init in gen_atmel_mci.c */ |
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return atmel_mci_init((void *)AT91_BASE_MCI); |
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} |
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/* this is a weak define that we are overriding */ |
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int board_mmc_getcd(u8 *cd, struct mmc *mmc) |
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{ |
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/*
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* the only currently existing use of this function |
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* (fsl_esdhc.c) suggests this function must return |
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* *cs = TRUE if a card is NOT detected -> in most |
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* cases the value of the pin when the detect switch |
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* closes to GND |
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*/ |
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*cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0; |
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return 0; |
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} |
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#endif |
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int board_early_init_f(void) |
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{ |
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at91_shdwn_t *shdwn = (at91_shdwn_t *)AT91_SHDWN_BASE; |
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/*
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* make sure the board can be powered on by |
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* any transition on WKUP |
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*/ |
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writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H, |
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&shdwn->mr); |
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/* Enable clocks for all PIOs */ |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA); |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOB); |
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); |
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/* set SCL0 and SDA0 to open drain */ |
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at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1); |
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at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1); |
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at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1); |
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at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1); |
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at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1); |
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at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1); |
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/* set SCL1 and SDA1 to open drain */ |
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at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1); |
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at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1); |
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at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1); |
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at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1); |
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at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1); |
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at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1); |
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return 0; |
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} |
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int board_init(void) |
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{ |
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/* arch number of TOP9000 Board */ |
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gd->bd->bi_arch_number = MACH_TYPE_TOP9000; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
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|
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at91_serial_hw_init(); |
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#ifdef CONFIG_CMD_NAND |
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nand_hw_init(); |
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#endif |
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#ifdef CONFIG_MACB |
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macb_hw_init(); |
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#endif |
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#ifdef CONFIG_ATMEL_SPI0 |
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/* (n+4) denotes to use nSPISEL(0) in GPIO mode! */ |
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at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4)); |
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#endif |
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#ifdef CONFIG_ATMEL_SPI1 |
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at91_spi1_hw_init(1 << (ENC_CS_NUM + 4)); |
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#endif |
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return 0; |
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} |
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|
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#ifdef CONFIG_MISC_INIT_R |
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int misc_init_r(void) |
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{ |
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/* read 'factory' part of EEPROM */ |
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read_factory_r(); |
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return 0; |
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} |
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#endif |
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|
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int dram_init(void) |
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{ |
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gd->ram_size = get_ram_size( |
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(void *)CONFIG_SYS_SDRAM_BASE, |
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CONFIG_SYS_SDRAM_SIZE); |
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return 0; |
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} |
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|
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#ifdef CONFIG_RESET_PHY_R |
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void reset_phy(void) |
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{ |
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/*
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* Initialize ethernet HW addresses prior to starting Linux, |
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* needed for nfsroot. |
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* TODO: We need to investigate if that is really necessary. |
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*/ |
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eth_init(gd->bd); |
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} |
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#endif |
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|
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int board_eth_init(bd_t *bis) |
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{ |
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int rc = 0; |
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int num = 0; |
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#ifdef CONFIG_MACB |
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rc = macb_eth_initialize(0, |
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(void *)AT91_EMAC_BASE, |
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CONFIG_SYS_PHY_ID); |
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if (!rc) |
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num++; |
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#endif |
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#ifdef CONFIG_ENC28J60 |
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rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM, |
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ENC_SPI_CLOCK, SPI_MODE_0); |
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if (!rc) |
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num++; |
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# ifdef CONFIG_ENC28J60_2 |
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rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1, |
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ENC_SPI_CLOCK, SPI_MODE_0); |
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if (!rc) |
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num++; |
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# ifdef CONFIG_ENC28J60_3 |
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rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2, |
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ENC_SPI_CLOCK, SPI_MODE_0); |
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if (!rc) |
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num++; |
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# endif |
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# endif |
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#endif |
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return num; |
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} |
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|
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/*
|
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* I2C access functions |
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* |
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* Note: |
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* We need to access Bus 0 before relocation to access the |
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* environment settings. |
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* However i2c_get_bus_num() cannot be called before |
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* relocation. |
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*/ |
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#ifdef CONFIG_SOFT_I2C |
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void iic_init(void) |
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{ |
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/* ports are now initialized in board_early_init_f() */ |
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} |
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|
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int iic_read(void) |
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{ |
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { |
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case 0: |
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return at91_get_pio_value(I2C0_PORT, SDA0_PIN); |
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case 1: |
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return at91_get_pio_value(I2C1_PORT, SDA1_PIN); |
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} |
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return 1; |
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} |
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|
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void iic_sda(int bit) |
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{ |
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { |
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case 0: |
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at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit); |
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break; |
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case 1: |
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at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit); |
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break; |
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} |
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} |
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|
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void iic_scl(int bit) |
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{ |
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { |
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case 0: |
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at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit); |
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break; |
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case 1: |
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at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit); |
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break; |
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} |
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} |
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|
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#endif |
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@ -0,0 +1,314 @@ |
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/*
|
||||
* (C) Copyright 2010 |
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* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de |
||||
* |
||||
* Configuation settings for the TOP9000 CPU module with AT91SAM9XE. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
/*
|
||||
* top9000 with at91sam9xe256 or at91sam9xe512 |
||||
* |
||||
* Initial Bootloader is in embedded flash. |
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* Vital Product Data, U-Boot Environment are in I2C-EEPROM. |
||||
* U-Boot is in embedded flash, a backup U-Boot can be in NAND flash. |
||||
* kernel and file system are either in NAND flash or on a micro SD card. |
||||
* NAND flash is optional. |
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* I2C EEPROM is never optional. |
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* SPI FRAM is optional. |
||||
* SPI ENC28J60 is optional. |
||||
* 16 or 32 bit wide SDRAM. |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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|
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/*
|
||||
* Warning: changing CONFIG_SYS_TEXT_BASE requires |
||||
* adapting the initial boot program |
||||
*/ |
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#define CONFIG_SYS_TEXT_BASE 0x21f00000 /* 31 MB into RAM */ |
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|
||||
/* Command line configuration */ |
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#include <config_cmd_default.h> |
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#undef CONFIG_CMD_FPGA |
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#undef CONFIG_CMD_SETGETDCR |
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#undef CONFIG_CMD_XIMG |
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#define CONFIG_CMD_ASKENV |
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#define CONFIG_SYS_CBSIZE 256 |
||||
#define CONFIG_SYS_MAXARGS 16 |
||||
#define CONFIG_SYS_PBSIZE \ |
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_PROMPT "TOP9000> " |
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#define CONFIG_SYS_LONGHELP |
||||
#define CONFIG_CMDLINE_EDITING |
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#define CONFIG_CMD_BDI |
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#define CONFIG_CMD_CACHE |
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|
||||
/* ARM asynchronous clock */ |
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz xtal */ |
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#define CONFIG_SYS_HZ 1000 |
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|
||||
/* SoC */ |
||||
#define CONFIG_ARM926EJS /* ARM926EJS Core */ |
||||
#define CONFIG_AT91FAMILY /* it's a member of AT91 */ |
||||
#define CONFIG_AT91SAM9260 /* Atmel AT91SAM9260 based SoC */ |
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#define CONFIG_AT91SAM9XE |
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|
||||
/* Misc CPU related */ |
||||
#define CONFIG_AT91_LEGACY |
||||
#define CONFIG_ARCH_CPU_INIT |
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
||||
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS |
||||
#define CONFIG_INITRD_TAG |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT |
||||
#define CONFIG_BOARD_EARLY_INIT_F |
||||
#define CONFIG_DISPLAY_CPUINFO |
||||
#define CONFIG_AT91RESET_EXTRST /* assert external reset */ |
||||
|
||||
/* general purpose I/O */ |
||||
#define CONFIG_AT91_GPIO |
||||
#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ |
||||
|
||||
/* serial console */ |
||||
#define CONFIG_ATMEL_USART |
||||
#define CONFIG_USART3 /* USART 3 is DBGU !!! */ |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
||||
|
||||
/* SD/MMC card */ |
||||
#define CONFIG_MMC |
||||
#define CONFIG_GENERIC_MMC |
||||
#define CONFIG_GENERIC_ATMEL_MCI |
||||
#define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9 |
||||
#define CONFIG_CMD_MMC |
||||
|
||||
/* Ethernet */ |
||||
#define CONFIG_MACB |
||||
#define CONFIG_SYS_PHY_ID 1 |
||||
#define CONFIG_RMII |
||||
#define CONFIG_NET_MULTI |
||||
#define CONFIG_NET_RETRY_COUNT 20 |
||||
|
||||
/* real time clock */ |
||||
#define CONFIG_RTC_AT91SAM9_RTT |
||||
#define CONFIG_CMD_DATE |
||||
|
||||
#if defined(CONFIG_AT91SAM9XE) |
||||
/*
|
||||
* NOR flash - use embedded flash of SAM9XE256/512 |
||||
* U-Boot will not fit into 128K ! |
||||
* 2010.09 will not fit into 256K with all options enabled ! |
||||
* |
||||
* Layout: |
||||
* 16kB 1st Bootloader |
||||
* Rest U-Boot |
||||
* the first sector (16kB) of EFLASH cannot be unprotected |
||||
* with u-boot commands |
||||
*/ |
||||
# define CONFIG_AT91_EFLASH |
||||
# define CONFIG_SYS_FLASH_BASE 0x200000 |
||||
# define CONFIG_SYS_MAX_FLASH_SECT 32 |
||||
# define CONFIG_SYS_MAX_FLASH_BANKS 1 |
||||
# define CONFIG_SYS_FLASH_PROTECTION |
||||
# define CONFIG_EFLASH_PROTSECTORS 1 /* protect first sector */ |
||||
#endif |
||||
|
||||
/* SPI */ |
||||
#define CONFIG_ATMEL_SPI |
||||
#define CONFIG_CMD_SPI |
||||
|
||||
/* RAMTRON FRAM */ |
||||
#define CONFIG_CMD_SF |
||||
#define CONFIG_ATMEL_SPI0 /* SPI used for FRAM is SPI0 */ |
||||
#define FRAM_SPI_BUS 0 |
||||
#define FRAM_CS_NUM 0 |
||||
#define CONFIG_SPI_FLASH /* RAMTRON FRAM on SPI bus */ |
||||
#define CONFIG_SPI_FRAM_RAMTRON |
||||
#define CONFIG_SF_DEFAULT_SPEED 1000000 /* be conservative here... */ |
||||
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
||||
#define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "FM25H20" |
||||
|
||||
/* Microchip ENC28J60 (second LAN) */ |
||||
#if defined(CONFIG_EVAL9000) |
||||
# define CONFIG_ENC28J60 |
||||
# define CONFIG_ATMEL_SPI1 /* SPI used for ENC28J60 is SPI1 */ |
||||
# define ENC_SPI_BUS 1 |
||||
# define ENC_CS_NUM 0 |
||||
# define ENC_SPI_CLOCK 1000000 |
||||
#endif /* CONFIG_EVAL9000 */ |
||||
|
||||
/*
|
||||
* SDRAM: 1 bank, min 32, max 128 MB |
||||
* Initialized before u-boot gets started. |
||||
*/ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define CONFIG_SYS_SDRAM_BASE 0x20000000 |
||||
#define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
||||
#define CONFIG_SYS_MEMTEST_END 0x21e00000 |
||||
#define CONFIG_SYS_LOAD_ADDR \ |
||||
(CONFIG_SYS_SDRAM_BASE + 0x01000000) |
||||
/*
|
||||
* Initial stack pointer: 16k - GENERATED_GBL_DATA_SIZE in internal SRAM, |
||||
* leaving the correct space for initial global data structure above |
||||
* that address while providing maximum stack area below. |
||||
*/ |
||||
#define CONFIG_SYS_INIT_SP_ADDR \ |
||||
(0x00300000 + 0x4000 - GENERATED_GBL_DATA_SIZE) |
||||
|
||||
/*
|
||||
* NAND flash: 256 MB (optional) |
||||
* |
||||
* Layout: |
||||
* 640kB: u-boot (includes space for spare sectors, handled by |
||||
* initial loader) |
||||
* 2MB: kernel |
||||
* rest: file system |
||||
*/ |
||||
#define CONFIG_NAND_ATMEL |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define CONFIG_SYS_NAND_BASE 0x40000000 |
||||
#define CONFIG_SYS_NAND_DBW_8 |
||||
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
||||
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
||||
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
||||
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
||||
#define CONFIG_CMD_NAND |
||||
|
||||
/* USB */ |
||||
#define CONFIG_USB_ATMEL |
||||
#define CONFIG_USB_OHCI_NEW |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT |
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 |
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "top9000" |
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
||||
#define CONFIG_USB_STORAGE |
||||
#define CONFIG_CMD_USB |
||||
|
||||
/* I2C support must always be enabled */ |
||||
#define CONFIG_SOFT_I2C |
||||
#define CONFIG_CMD_I2C |
||||
#define CONFIG_SYS_I2C_SPEED 400000 |
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F |
||||
#define CONFIG_I2C_MULTI_BUS |
||||
#define I2C0_PORT AT91_PIO_PORTA |
||||
#define SDA0_PIN 23 |
||||
#define SCL0_PIN 24 |
||||
#define I2C1_PORT AT91_PIO_PORTB |
||||
#define SDA1_PIN 12 |
||||
#define SCL1_PIN 13 |
||||
#define I2C_SOFT_DECLARATIONS void iic_init(void);\ |
||||
int iic_read(void);\
|
||||
void iic_sda(int);\
|
||||
void iic_scl(int); |
||||
#define I2C_ACTIVE |
||||
#define I2C_TRISTATE |
||||
#define I2C_INIT iic_init() |
||||
#define I2C_READ iic_read() |
||||
#define I2C_SDA(bit) iic_sda(bit) |
||||
#define I2C_SCL(bit) iic_scl(bit) |
||||
#define I2C_DELAY udelay(3) |
||||
/* EEPROM configuration */ |
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 |
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 |
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 |
||||
#define CONFIG_SYS_EEPROM_SIZE 0x2000 |
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 |
||||
/* later: #define CONFIG_I2C_ENV_EEPROM_BUS 0 */ |
||||
/* ENV is always in I2C-EEPROM */ |
||||
#define CONFIG_ENV_IS_IN_EEPROM |
||||
#define CONFIG_ENV_OFFSET 0x1000 |
||||
#define CONFIG_ENV_SIZE 0x0f00 |
||||
/* VPD settings */ |
||||
#define CONFIG_SYS_I2C_FACT_ADDR 0x57 |
||||
#define CONFIG_SYS_FACT_OFFSET 0x1F00 |
||||
#define CONFIG_SYS_FACT_SIZE 0x0100 |
||||
/* later: #define CONFIG_MISC_INIT_R */ |
||||
/* define the next only if you want to allow users to enter VPD data */ |
||||
#define CONFIG_SYS_FACT_ENTRY |
||||
#ifndef __ASSEMBLY__ |
||||
extern void read_factory_r(void); |
||||
#endif |
||||
|
||||
/*
|
||||
* Only interrupt autoboot if <space> is pressed. Otherwise, garbage |
||||
* data on the serial line may interrupt the boot sequence. |
||||
*/ |
||||
#define CONFIG_BOOTDELAY 1 |
||||
#define CONFIG_AUTOBOOT |
||||
#define CONFIG_AUTOBOOT_KEYED |
||||
#define CONFIG_AUTOBOOT_PROMPT \ |
||||
"Press SPACE to abort autoboot in %d seconds\n", bootdelay |
||||
#define CONFIG_AUTOBOOT_DELAY_STR "d" |
||||
#define CONFIG_AUTOBOOT_STOP_STR " " |
||||
|
||||
/*
|
||||
* add filesystem commands if we have at least 1 storage |
||||
* media with filesystem |
||||
*/ |
||||
#if defined(CONFIG_NAND_ATMEL) \ |
||||
|| defined(CONFIG_USB_ATMEL) \
|
||||
|| defined(CONFIG_MMC) |
||||
# define CONFIG_DOS_PARTITION |
||||
# define CONFIG_CMD_FAT |
||||
# define CONFIG_CMD_EXT2 |
||||
/* later: #define CONFIG_CMD_JFFS2 */ |
||||
#endif |
||||
|
||||
/* add NET commands if we have at least 1 LAN */ |
||||
#if defined(CONFIG_MACB) || defined(CONFIG_ENC28J60) |
||||
# define CONFIG_CMD_PING |
||||
# define CONFIG_CMD_DHCP |
||||
# define CONFIG_CMD_MII |
||||
/* is this really needed ? */ |
||||
# define CONFIG_RESET_PHY_R |
||||
/* BOOTP options */ |
||||
# define CONFIG_BOOTP_BOOTFILESIZE |
||||
# define CONFIG_BOOTP_BOOTPATH |
||||
# define CONFIG_BOOTP_GATEWAY |
||||
# define CONFIG_BOOTP_HOSTNAME |
||||
#endif |
||||
|
||||
/* linux in NAND flash */ |
||||
#define CONFIG_BOOTCOUNT_LIMIT 1 |
||||
#define CONFIG_BOOTCOMMAND \ |
||||
"nand read 0x21000000 0xA0000 0x200000; bootm" |
||||
#define CONFIG_BOOTARGS \ |
||||
"console=ttyS0,115200 " \
|
||||
"root=/dev/mtdblock2 " \
|
||||
"mtdparts=atmel_nand:" \
|
||||
"640k(uboot)ro," \
|
||||
"2M(linux)," \
|
||||
"16M(root)," \
|
||||
"-(rest) " \
|
||||
"rw "\
|
||||
"rootfstype=jffs2" |
||||
|
||||
/* Size of malloc() pool */ |
||||
#define CONFIG_SYS_MALLOC_LEN \ |
||||
ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
||||
#define CONFIG_STACKSIZE (32*1024) |
||||
#ifdef CONFIG_USE_IRQ |
||||
#error CONFIG_USE_IRQ not supported |
||||
#endif |
||||
|
||||
#endif |
||||
|
||||
Loading…
Reference in new issue