CompuLab cm-t3517 is Computer on Module (CoM) based on AM3517 SoC. Features: up to 256MB DDR2, up to 512MB NAND, USB hub, mUSB, WiFi, BT, Analog audio codec, touch screen controller, LED. Add basic support including: LED, Serial console, NAND, MMC, GPIO, I2C, 256MB DRAM. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>master
Igor Grinberg
10 years ago
committed by
Tom Rini
parent
0b03a931ab
commit
b09bf72317
@ -0,0 +1,12 @@ |
||||
if TARGET_CM_T3517 |
||||
|
||||
config SYS_BOARD |
||||
default "cm_t3517" |
||||
|
||||
config SYS_VENDOR |
||||
default "compulab" |
||||
|
||||
config SYS_CONFIG_NAME |
||||
default "cm_t3517" |
||||
|
||||
endif |
||||
@ -0,0 +1,6 @@ |
||||
CM_T3517 BOARD |
||||
M: Igor Grinberg <grinberg@compulab.co.il> |
||||
S: Maintained |
||||
F: board/compulab/cm_t3517/ |
||||
F: include/configs/cm_t3517.h |
||||
F: configs/cm_t3517_defconfig |
||||
@ -0,0 +1,9 @@ |
||||
#
|
||||
# (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
|
||||
#
|
||||
# Authors: Igor Grinberg <grinberg@compulab.co.il>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += cm_t3517.o mux.o
|
||||
@ -0,0 +1,60 @@ |
||||
/*
|
||||
* (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il> |
||||
* |
||||
* Authors: Igor Grinberg <grinberg@compulab.co.il> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <status_led.h> |
||||
#include <mmc.h> |
||||
#include <linux/compiler.h> |
||||
|
||||
#include <asm/io.h> |
||||
#include <asm/arch/mem.h> |
||||
#include <asm/arch/am35x_def.h> |
||||
#include <asm/arch/mmc_host_def.h> |
||||
#include <asm/arch/sys_proto.h> |
||||
|
||||
#include "../common/common.h" |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
const omap3_sysinfo sysinfo = { |
||||
DDR_DISCRETE, |
||||
"CM-T3517 board", |
||||
"NAND 128/512M", |
||||
}; |
||||
|
||||
int board_init(void) |
||||
{ |
||||
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ |
||||
|
||||
/* boot param addr */ |
||||
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); |
||||
|
||||
#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) |
||||
status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); |
||||
#endif |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int misc_init_r(void) |
||||
{ |
||||
cl_print_pcb_info(); |
||||
dieid_num_r(); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) |
||||
#define SB_T35_CD_GPIO 144 |
||||
#define SB_T35_WP_GPIO 59 |
||||
|
||||
int board_mmc_init(bd_t *bis) |
||||
{ |
||||
return omap_mmc_init(0, 0, 0, SB_T35_CD_GPIO, SB_T35_WP_GPIO); |
||||
} |
||||
#endif |
||||
@ -0,0 +1,135 @@ |
||||
/*
|
||||
* (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il> |
||||
* |
||||
* Authors: Igor Grinberg <grinberg@compulab.co.il> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/sys_proto.h> |
||||
#include <asm/arch/mux.h> |
||||
#include <asm/io.h> |
||||
|
||||
void set_muxconf_regs(void) |
||||
{ |
||||
/* SDRC */ |
||||
MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)); |
||||
|
||||
/* GPMC */ |
||||
MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); |
||||
|
||||
/* SB-T35 SD/MMC WP GPIO59 */ |
||||
MUX_VAL(CP(GPMC_CLK), (IEN | PTU | EN | M4)); /*GPIO_59*/ |
||||
MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)); |
||||
MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)); |
||||
MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)); |
||||
MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); |
||||
/* SB-T35 Audio Enable GPIO61 */ |
||||
MUX_VAL(CP(GPMC_NBE1), (IDIS | PTU | EN | M4)); /*GPIO_61*/ |
||||
MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)); |
||||
|
||||
/* UART3 Console */ |
||||
MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)); |
||||
MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)); |
||||
/* RTC V3020 nCS GPIO163 */ |
||||
MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTU | EN | M4)); /*GPIO_163*/ |
||||
|
||||
/* SB-T35 SD/MMC CD GPIO144 */ |
||||
MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M4)); /*GPIO_144*/ |
||||
/* WIFI nRESET GPIO145 */ |
||||
MUX_VAL(CP(UART2_RTS), (IEN | PTD | EN | M4)); /*GPIO_145*/ |
||||
|
||||
/* MMC1 */ |
||||
MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); |
||||
MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); |
||||
|
||||
/* I2C */ |
||||
MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); |
||||
MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); |
||||
|
||||
/* Green LED GPIO186 */ |
||||
MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTU | DIS | M4)); /*GPIO_186*/ |
||||
|
||||
/* RTC V3020 CS Enable GPIO160 */ |
||||
MUX_VAL(CP(MCBSP_CLKS), (IEN | PTD | EN | M4)); /*GPIO_160*/ |
||||
|
||||
/* SYS_BOOT */ |
||||
MUX_VAL(CP(SYS_BOOT0), (IEN | PTU | DIS | M4)); /*GPIO_2*/ |
||||
MUX_VAL(CP(SYS_BOOT1), (IEN | PTU | DIS | M4)); /*GPIO_3*/ |
||||
MUX_VAL(CP(SYS_BOOT2), (IEN | PTU | DIS | M4)); /*GPIO_4*/ |
||||
MUX_VAL(CP(SYS_BOOT3), (IEN | PTU | DIS | M4)); /*GPIO_5*/ |
||||
MUX_VAL(CP(SYS_BOOT4), (IEN | PTU | DIS | M4)); /*GPIO_6*/ |
||||
MUX_VAL(CP(SYS_BOOT5), (IEN | PTU | DIS | M4)); /*GPIO_7*/ |
||||
} |
||||
@ -0,0 +1,4 @@ |
||||
CONFIG_SPL=n |
||||
+S:CONFIG_ARM=y |
||||
+S:CONFIG_OMAP34XX=y |
||||
+S:CONFIG_TARGET_CM_T3517=y |
||||
@ -0,0 +1,277 @@ |
||||
/*
|
||||
* (C) Copyright 2013 CompuLab, Ltd. |
||||
* Author: Igor Grinberg <grinberg@compulab.co.il> |
||||
* |
||||
* Configuration settings for the CompuLab CM-T3517 board |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/*
|
||||
* High Level Configuration Options |
||||
*/ |
||||
#define CONFIG_OMAP /* in a TI OMAP core */ |
||||
#define CONFIG_CM_T3517 /* working with CM-T3517 */ |
||||
#define CONFIG_OMAP_COMMON |
||||
#define CONFIG_SYS_GENERIC_BOARD |
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0x80008000 |
||||
|
||||
/*
|
||||
* This is needed for the DMA stuff. |
||||
* Although the default iss 64, we still define it |
||||
* to be on the safe side once the default is changed. |
||||
*/ |
||||
#define CONFIG_SYS_CACHELINE_SIZE 64 |
||||
|
||||
#define CONFIG_EMIF4 /* The chip has EMIF4 controller */ |
||||
|
||||
#include <asm/arch/cpu.h> /* get chip and board defs */ |
||||
#include <asm/arch/omap3.h> |
||||
|
||||
/*
|
||||
* Display CPU and Board information |
||||
*/ |
||||
#define CONFIG_DISPLAY_CPUINFO |
||||
#define CONFIG_DISPLAY_BOARDINFO |
||||
|
||||
/* Clock Defines */ |
||||
#define V_OSCK 26000000 /* Clock output from T2 */ |
||||
#define V_SCLK (V_OSCK >> 1) |
||||
|
||||
#define CONFIG_MISC_INIT_R |
||||
|
||||
#define CONFIG_OF_LIBFDT |
||||
/*
|
||||
* The early kernel mapping on ARM currently only maps from the base of DRAM |
||||
* to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. |
||||
* The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, |
||||
* so that leaves DRAM base to DRAM base + 0x4000 available. |
||||
*/ |
||||
#define CONFIG_SYS_BOOTMAPSZ 0x4000 |
||||
|
||||
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS |
||||
#define CONFIG_INITRD_TAG |
||||
#define CONFIG_REVISION_TAG |
||||
#define CONFIG_SERIAL_TAG |
||||
|
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ |
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
||||
|
||||
/*
|
||||
* Hardware drivers |
||||
*/ |
||||
|
||||
/*
|
||||
* NS16550 Configuration |
||||
*/ |
||||
#define CONFIG_SYS_NS16550 |
||||
#define CONFIG_SYS_NS16550_SERIAL |
||||
#define CONFIG_SYS_NS16550_REG_SIZE (-4) |
||||
#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
||||
|
||||
/*
|
||||
* select serial console configuration |
||||
*/ |
||||
#define CONFIG_CONS_INDEX 3 |
||||
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
||||
#define CONFIG_SERIAL3 3 /* UART3 */ |
||||
#define CONFIG_SYS_CONSOLE_IS_IN_ENV |
||||
|
||||
/* allow to overwrite serial and ethaddr */ |
||||
#define CONFIG_ENV_OVERWRITE |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
||||
115200} |
||||
|
||||
#define CONFIG_OMAP_GPIO |
||||
|
||||
#define CONFIG_GENERIC_MMC |
||||
#define CONFIG_MMC |
||||
#define CONFIG_OMAP_HSMMC |
||||
#define CONFIG_DOS_PARTITION |
||||
|
||||
/* commands to include */ |
||||
#include <config_cmd_default.h> |
||||
|
||||
#define CONFIG_CMD_CACHE |
||||
#define CONFIG_CMD_EXT2 /* EXT2 Support */ |
||||
#define CONFIG_CMD_FAT /* FAT support */ |
||||
#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
||||
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
||||
#define CONFIG_MTD_PARTITIONS |
||||
#define MTDIDS_DEFAULT "nand0=nand" |
||||
#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ |
||||
"1920k(u-boot),256k(u-boot-env),"\
|
||||
"4m(kernel),-(fs)" |
||||
|
||||
#define CONFIG_CMD_I2C /* I2C serial bus support */ |
||||
#define CONFIG_CMD_MMC /* MMC support */ |
||||
#define CONFIG_CMD_NAND /* NAND support */ |
||||
#define CONFIG_CMD_GPIO |
||||
|
||||
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
||||
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
||||
#undef CONFIG_CMD_IMLS /* List all found images */ |
||||
|
||||
#define CONFIG_SYS_NO_FLASH |
||||
#define CONFIG_SYS_I2C |
||||
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000 |
||||
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 |
||||
#define CONFIG_SYS_I2C_OMAP34XX |
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
||||
#define CONFIG_SYS_I2C_EEPROM_BUS 0 |
||||
#define CONFIG_I2C_MULTI_BUS |
||||
|
||||
/*
|
||||
* Board NAND Info. |
||||
*/ |
||||
#define CONFIG_SYS_NAND_QUIET_TEST |
||||
#define CONFIG_NAND_OMAP_GPMC |
||||
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
||||
/* to access nand */ |
||||
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
||||
/* to access nand at */ |
||||
/* CS0 */ |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ |
||||
/* devices */ |
||||
|
||||
/* Environment information */ |
||||
#define CONFIG_BOOTDELAY 3 |
||||
#define CONFIG_ZERO_BOOTDELAY_CHECK |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"loadaddr=0x82000000\0" \
|
||||
"baudrate=115200\0" \
|
||||
"console=ttyO2,115200n8\0" \
|
||||
"mpurate=auto\0" \
|
||||
"vram=12M\0" \
|
||||
"dvimode=1024x768MR-16@60\0" \
|
||||
"defaultdisplay=dvi\0" \
|
||||
"mmcdev=0\0" \
|
||||
"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
|
||||
"mmcrootfstype=ext4\0" \
|
||||
"nandroot=/dev/mtdblock4 rw\0" \
|
||||
"nandrootfstype=ubifs\0" \
|
||||
"mmcargs=setenv bootargs console=${console} " \
|
||||
"mpurate=${mpurate} " \
|
||||
"vram=${vram} " \
|
||||
"omapfb.mode=dvi:${dvimode} " \
|
||||
"omapdss.def_disp=${defaultdisplay} " \
|
||||
"root=${mmcroot} " \
|
||||
"rootfstype=${mmcrootfstype}\0" \
|
||||
"nandargs=setenv bootargs console=${console} " \
|
||||
"mpurate=${mpurate} " \
|
||||
"vram=${vram} " \
|
||||
"omapfb.mode=dvi:${dvimode} " \
|
||||
"omapdss.def_disp=${defaultdisplay} " \
|
||||
"root=${nandroot} " \
|
||||
"rootfstype=${nandrootfstype}\0" \
|
||||
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source ${loadaddr}\0" \
|
||||
"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"bootm ${loadaddr}\0" \
|
||||
"nandboot=echo Booting from nand ...; " \
|
||||
"run nandargs; " \
|
||||
"nand read ${loadaddr} 2a0000 400000; " \
|
||||
"bootm ${loadaddr}\0" \
|
||||
|
||||
#define CONFIG_CMD_BOOTZ |
||||
#define CONFIG_BOOTCOMMAND \ |
||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"if run loaduimage; then " \
|
||||
"run mmcboot; " \
|
||||
"else run nandboot; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else run nandboot; fi" |
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CONFIG_AUTO_COMPLETE |
||||
#define CONFIG_CMDLINE_EDITING |
||||
#define CONFIG_TIMESTAMP |
||||
#define CONFIG_SYS_AUTOLOAD "no" |
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
||||
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
||||
#define CONFIG_SYS_PROMPT "CM-T3517 # " |
||||
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
||||
/* Print Buffer Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
||||
sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
||||
/* Boot Argument Buffer Size */ |
||||
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) |
||||
|
||||
/*
|
||||
* AM3517 has 12 GP timers, they can be driven by the system clock |
||||
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
||||
* This rate is divided by a local divisor. |
||||
*/ |
||||
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
||||
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
||||
#define CONFIG_SYS_HZ 1000 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Physical Memory Map |
||||
*/ |
||||
#define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ |
||||
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
||||
#define CONFIG_SYS_CS0_SIZE (256 << 20) |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH and environment organization |
||||
*/ |
||||
|
||||
/* **** PISMO SUPPORT *** */ |
||||
/* Monitor at start of flash */ |
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
||||
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
||||
|
||||
#define CONFIG_ENV_IS_IN_NAND |
||||
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
||||
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
||||
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
||||
|
||||
/* additions for new relocation code, must be added to all boards */ |
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
||||
CONFIG_SYS_INIT_RAM_SIZE - \
|
||||
GENERATED_GBL_DATA_SIZE) |
||||
|
||||
/* Status LED */ |
||||
#define CONFIG_STATUS_LED /* Status LED enabled */ |
||||
#define CONFIG_BOARD_SPECIFIC_LED |
||||
#define CONFIG_GPIO_LED |
||||
#define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ |
||||
#define GREEN_LED_DEV 0 |
||||
#define STATUS_LED_BIT GREEN_LED_GPIO |
||||
#define STATUS_LED_STATE STATUS_LED_ON |
||||
#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) |
||||
#define STATUS_LED_BOOT GREEN_LED_DEV |
||||
|
||||
/* GPIO banks */ |
||||
#ifdef CONFIG_STATUS_LED |
||||
#define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ |
||||
#endif |
||||
|
||||
#endif /* __CONFIG_H */ |
||||
Loading…
Reference in new issue