ppc: Move mpc5xxx clocks to arch_global_data

Move ipb_clk and pci_clk into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>

arch/powerpc/cpu/mpc5xxx/i2c.c

@@ -310,7 +310,7 @@ static int mpc_get_fdr(int speed)
 			{126, 128}
 		};
 
-		ipb = gd->ipb_clk;
+		ipb = gd->arch.ipb_clk;
 		for (i = 7; i >= 0; i--) {
 			for (j = 7; j >= 0; j--) {
 				scl = 2 * (scltap[j].scl2tap +

arch/powerpc/cpu/mpc5xxx/ide.c

@@ -75,7 +75,7 @@ int ide_preinit (void)
 	psdma->PtdCntrl |= 1;
 
 	/* Init timings : we use PIO mode 0 timings */
-	period = 1000000000 / gd->ipb_clk;	/* period in ns */
+	period = 1000000000 / gd->arch.ipb_clk;	/* period in ns */
 
 	t0 = CALC_TIMING (600);
 	t2_8 = CALC_TIMING (290);

arch/powerpc/cpu/mpc5xxx/serial.c

@@ -89,7 +89,7 @@ int serial_init_dev (unsigned long dev_base)
 
 	/* select clock sources */
 	psc->psc_clock_select = 0;
-	baseclk = (gd->ipb_clk + 16) / 32;
+	baseclk = (gd->arch.ipb_clk + 16) / 32;
 
 	/* switch to UART mode */
 	psc->sicr = 0;
@@ -169,7 +169,7 @@ void serial_setbrg_dev (unsigned long dev_base)
 	volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
 	unsigned long baseclk, div;
 
-	baseclk = (gd->ipb_clk + 16) / 32;
+	baseclk = (gd->arch.ipb_clk + 16) / 32;
 
 	/* set up UART divisor */
 	div = (baseclk + (gd->baudrate/2)) / gd->baudrate;

arch/powerpc/cpu/mpc5xxx/speed.c

@@ -66,14 +66,20 @@ int get_clocks (void)
 
 	val = *(vu_long *)MPC5XXX_CDM_CFG;
 	if (val & (1 << 8)) {
-		gd->ipb_clk = gd->bus_clk / 2;
+		gd->arch.ipb_clk = gd->bus_clk / 2;
 	} else {
-		gd->ipb_clk = gd->bus_clk;
+		gd->arch.ipb_clk = gd->bus_clk;
 	}
 	switch (val & 3) {
-		case 0: gd->pci_clk = gd->ipb_clk; break;
+	case 0:
-		case 1: gd->pci_clk = gd->ipb_clk / 2; break;
+		gd->pci_clk = gd->arch.ipb_clk;
-		default: gd->pci_clk = gd->bus_clk / 4; break;
+		break;
+	case 1:
+		gd->pci_clk = gd->arch.ipb_clk / 2;
+		break;
+	default:
+		gd->pci_clk = gd->bus_clk / 4;
+		break;
 	}
 
 	return (0);
@@ -85,7 +91,7 @@ int prt_mpc5xxx_clks (void)
 
 	printf ("       Bus %s MHz, IPB %s MHz, PCI %s MHz\n",
 		strmhz(buf1, gd->bus_clk),
-		strmhz(buf2, gd->ipb_clk),
+		strmhz(buf2, gd->arch.ipb_clk),
 		strmhz(buf3, gd->pci_clk)
 	);
 	return (0);

arch/powerpc/cpu/mpc8220/fec.c

@@ -288,9 +288,11 @@ static int mpc8220_fec_init (struct eth_device *dev, bd_t * bis)
 		 * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
 		 * and do not drop the Preamble.
 		 */
-		/* tbd - rtm */
+		/*
-		/*fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); */
+		 * tbd - rtm
-		/* No MII for 7-wire mode */
+		 * fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
+		 * No MII for 7-wire mode
+		 */
 		fec->eth->mii_speed = 0x00000030;
 	}
 

arch/powerpc/include/asm/global_data.h

@@ -94,6 +94,9 @@ struct arch_global_data {
 #if defined(CONFIG_E500)
 	u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
 #endif
+#if defined(CONFIG_MPC5xxx)
+	unsigned long ipb_clk;
+#endif
 };
 
 /*
@@ -116,9 +119,6 @@ typedef	struct	global_data {
 #if defined(CONFIG_FSL_ESDHC)
 	u32 sdhc_clk;
 #endif
-#if defined(CONFIG_MPC5xxx)
-	unsigned long	ipb_clk;
-#endif
 #if defined(CONFIG_MPC512X)
 	u32 ips_clk;
 	u32 csb_clk;

arch/powerpc/lib/board.c

@@ -589,7 +589,7 @@ void board_init_f(ulong bootflag)
 	bd->bi_ipsfreq = gd->ips_clk;
 #endif /* CONFIG_MPC512X */
 #if defined(CONFIG_MPC5xxx)
-	bd->bi_ipbfreq = gd->ipb_clk;
+	bd->bi_ipbfreq = gd->arch.ipb_clk;
 	bd->bi_pcifreq = gd->pci_clk;
 #endif /* CONFIG_MPC5xxx */
 	bd->bi_baudrate = gd->baudrate;	/* Console Baudrate     */

board/inka4x0/inkadiag.c

@@ -187,7 +187,7 @@ static int ser_init(volatile struct mpc5xxx_psc *psc, int baudrate)
 	/* select clock sources */
 
 	out_be16(&psc->psc_clock_select, 0);
-	baseclk = (gd->ipb_clk + 16) / 32;
+	baseclk = (gd->arch.ipb_clk + 16) / 32;
 
 	/* switch to UART mode */
 	out_be32(&psc->sicr, 0);
@@ -369,7 +369,7 @@ static void buzzer_turn_on(unsigned int freq)
 {
 	volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)(BUZZER_GPT);
 
-	const u32 prescale = gd->ipb_clk / freq / 128;
+	const u32 prescale = gd->arch.ipb_clk / freq / 128;
 	const u32 count = 128;
 	const u32 width = 64;
 
@@ -405,9 +405,9 @@ static int do_inkadiag_buzzer(cmd_tbl_t *cmdtp, int flag, int argc,
 
 	freq = simple_strtol(argv[0], NULL, 0);
 	/* avoid zero prescale in buzzer_turn_on() */
-	if (freq > gd->ipb_clk / 128) {
+	if (freq > gd->arch.ipb_clk / 128) {
 		printf("%dHz exceeds maximum (%ldHz)\n", freq,
-		       gd->ipb_clk / 128);
+		       gd->arch.ipb_clk / 128);
 	} else if (!freq)
 		printf("Zero frequency is senseless\n");
 	else

drivers/input/ps2ser.c

@@ -80,7 +80,7 @@ int ps2ser_init(void)
 
 	/* select clock sources */
 	psc->psc_clock_select = 0;
-	baseclk = (gd->ipb_clk + 16) / 32;
+	baseclk = (gd->arch.ipb_clk + 16) / 32;
 
 	/* switch to UART mode */
 	psc->sicr = 0;

drivers/net/mpc5xxx_fec.c

@@ -440,8 +440,9 @@ static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis)
 		/*
 		 * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
 		 * and do not drop the Preamble.
+		 * No MII for 7-wire mode
 		 */
-		fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1);	/* No MII for 7-wire mode */
+		fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
 	}
 
 	if (fec->xcv_type != SEVENWIRE) {
@@ -644,8 +645,9 @@ static void mpc5xxx_fec_halt(struct eth_device *dev)
 		/*
 		 * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
 		 * and do not drop the Preamble.
+		 * No MII for 7-wire mode
 		 */
-		fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
+		fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
 	}
 
 #if (DEBUG & 0x3)
@@ -909,8 +911,9 @@ int mpc5xxx_fec_initialize(bd_t * bis)
 		/*
 		 * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
 		 * and do not drop the Preamble.
+		 * No MII for 7-wire mode
 		 */
-		fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
+		fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
 	}
 
 	dev->priv = (void *)fec;