at91: move cpu name define to arm/arch/ cpu header

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
master
Jean-Christophe PLAGNIOL-VILLARD 16 years ago committed by Wolfgang Denk
parent 5bb59b3c90
commit b32e189079
  1. 5
      include/asm-arm/arch-at91/at91cap9.h
  2. 9
      include/asm-arm/arch-at91/at91sam9260.h
  3. 4
      include/asm-arm/arch-at91/at91sam9261.h
  4. 4
      include/asm-arm/arch-at91/at91sam9263.h
  5. 5
      include/asm-arm/arch-at91/at91sam9rl.h
  6. 1
      include/configs/at91cap9adk.h
  7. 2
      include/configs/at91sam9260ek.h
  8. 1
      include/configs/at91sam9261ek.h
  9. 1
      include/configs/at91sam9263ek.h
  10. 1
      include/configs/at91sam9rlek.h
  11. 2
      include/configs/pm9263.h

@ -134,4 +134,9 @@
#define CONFIG_DRAM_BASE AT91_CHIPSELECT_6
/*
* Cpu Name
*/
#define AT91_CPU_NAME "AT91CAP9"
#endif

@ -121,4 +121,13 @@
#define AT91SAM9XE_FLASH_BASE 0x00200000 /* Internal FLASH base address */
#define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */
/*
* Cpu Name
*/
#if defined(CONFIG_AT91SAM9260)
#define AT91_CPU_NAME "AT91SAM9260"
#elif defined(CONFIG_AT91SAM9G20)
#define AT91_CPU_NAME "AT91SAM9G20"
#endif
#endif

@ -101,5 +101,9 @@
#define AT91SAM9261_UHP_BASE 0x00500000 /* USB Host controller */
#define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */
/*
* Cpu Name
*/
#define AT91_CPU_NAME "AT91SAM9261"
#endif

@ -124,5 +124,9 @@
#define AT91SAM9263_DMAC_BASE 0x00800000 /* DMA Controller */
#define AT91SAM9263_UHP_BASE 0x00a00000 /* USB Host controller */
/*
* Cpu Name
*/
#define AT91_CPU_NAME "AT91SAM9263"
#endif

@ -112,4 +112,9 @@
#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */
#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */
/*
* Cpu Name
*/
#define AT91_CPU_NAME "AT91SAM9RL"
#endif

@ -28,7 +28,6 @@
#define __CONFIG_H
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91CAP9"
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define CONFIG_SYS_HZ 1000

@ -34,10 +34,8 @@
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#ifdef CONFIG_AT91SAM9G20EK
#define AT91_CPU_NAME "AT91SAM9G20"
#define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/
#else
#define AT91_CPU_NAME "AT91SAM9260"
#define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/
#endif

@ -28,7 +28,6 @@
#define __CONFIG_H
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9261"
#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
#define CONFIG_SYS_HZ 1000

@ -28,7 +28,6 @@
#define __CONFIG_H
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9263"
#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
#define CONFIG_SYS_HZ 1000

@ -28,7 +28,6 @@
#define __CONFIG_H
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9RL"
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define CONFIG_SYS_HZ 1000

@ -29,8 +29,6 @@
#define __CONFIG_H
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9263"
#define CONFIG_DISPLAY_BOARDINFO
#define MASTER_PLL_DIV 15

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