The Purple SoC and eval board are not actively maintained since years. This patch removes the support completely as aggreed with Wolfgang Denk. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>master
Daniel Schwierzeck
14 years ago
committed by
Shinya Kuribayashi
parent
67a490d60d
commit
b38a569901
@ -1,46 +0,0 @@ |
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#
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# (C) Copyright 2003-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS = $(BOARD).o flash.o sconsole.o
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SOBJS = lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -1,32 +0,0 @@ |
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#
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# (C) Copyright 2003
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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#
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# Purple board with MIPS 5Kc CPU core
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#
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# ROM version
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CONFIG_SYS_TEXT_BASE = 0xB0000000
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# RAM version
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#CONFIG_SYS_TEXT_BASE = 0x80100000
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@ -1,595 +0,0 @@ |
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/*
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* (C) Copyright 2003 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/inca-ip.h> |
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
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typedef unsigned long FLASH_PORT_WIDTH; |
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typedef volatile unsigned long FLASH_PORT_WIDTHV; |
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#define FLASH_ID_MASK 0xFFFFFFFF |
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#define FPW FLASH_PORT_WIDTH |
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#define FPWV FLASH_PORT_WIDTHV |
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#define ORMASK(size) ((-size) & OR_AM_MSK) |
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#define FLASH29_REG_ADRS(reg) ((FPWV *)PHYS_FLASH_1 + (reg)) |
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/* FLASH29 command register addresses */ |
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#define FLASH29_REG_FIRST_CYCLE FLASH29_REG_ADRS (0x1555) |
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#define FLASH29_REG_SECOND_CYCLE FLASH29_REG_ADRS (0x2aaa) |
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#define FLASH29_REG_THIRD_CYCLE FLASH29_REG_ADRS (0x3555) |
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#define FLASH29_REG_FOURTH_CYCLE FLASH29_REG_ADRS (0x4555) |
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#define FLASH29_REG_FIFTH_CYCLE FLASH29_REG_ADRS (0x5aaa) |
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#define FLASH29_REG_SIXTH_CYCLE FLASH29_REG_ADRS (0x6555) |
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/* FLASH29 command definitions */ |
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#define FLASH29_CMD_FIRST 0xaaaaaaaa |
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#define FLASH29_CMD_SECOND 0x55555555 |
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#define FLASH29_CMD_FOURTH 0xaaaaaaaa |
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#define FLASH29_CMD_FIFTH 0x55555555 |
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#define FLASH29_CMD_SIXTH 0x10101010 |
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#define FLASH29_CMD_SECTOR 0x30303030 |
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#define FLASH29_CMD_PROGRAM 0xa0a0a0a0 |
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#define FLASH29_CMD_CHIP_ERASE 0x80808080 |
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#define FLASH29_CMD_READ_RESET 0xf0f0f0f0 |
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#define FLASH29_CMD_AUTOSELECT 0x90909090 |
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#define FLASH29_CMD_READ 0x70707070 |
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#define IN_RAM_CMD_READ 0x1 |
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#define IN_RAM_CMD_WRITE 0x2 |
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#define FLASH_WRITE_CMD ((ulong)(flash_write_cmd) & 0x7)+0xbf008000 |
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#define FLASH_READ_CMD ((ulong)(flash_read_cmd) & 0x7)+0xbf008000 |
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typedef void (*FUNCPTR_CP)(ulong *source, ulong *destination, ulong nlongs); |
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typedef void (*FUNCPTR_RD)(int cmd, FPWV * pFA, char * string, int strLen); |
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typedef void (*FUNCPTR_WR)(int cmd, FPWV * pFA, FPW value); |
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static ulong flash_get_size(FPWV *addr, flash_info_t *info); |
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static int write_word(flash_info_t *info, FPWV *dest, FPW data); |
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static void flash_get_offsets(ulong base, flash_info_t *info); |
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static flash_info_t *flash_get_info(ulong base); |
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static void load_cmd(ulong cmd); |
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static ulong in_ram_cmd = 0; |
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/******************************************************************************
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* |
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* Don't change the program architecture |
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* This architecture assure the program |
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* can be relocated to scratch ram |
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*/ |
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static void flash_read_cmd(int cmd, FPWV * pFA, char * string, int strLen) |
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{ |
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int i,j; |
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FPW temp,temp1; |
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FPWV *str; |
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str = (FPWV *)string; |
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j= strLen/4; |
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if(cmd == FLASH29_CMD_AUTOSELECT) |
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{ |
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*(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; |
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*(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; |
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*(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_AUTOSELECT; |
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} |
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if(cmd == FLASH29_CMD_READ) |
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{ |
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i = 0; |
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while(i<j) |
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{ |
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temp = *pFA++; |
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temp1 = *(int *)0xa0000000; |
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*(int *)0xbf0081f8 = temp1 + temp; |
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*str++ = temp; |
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i++; |
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} |
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} |
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if(cmd == FLASH29_CMD_READ_RESET) |
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{ |
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*(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; |
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*(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; |
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*(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; |
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} |
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*(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ |
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} |
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/******************************************************************************
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* |
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* Don't change the program architecture |
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* This architecture assure the program |
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* can be relocated to scratch ram |
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*/ |
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static void flash_write_cmd(int cmd, FPWV * pFA, FPW value) |
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{ |
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*(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; |
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*(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; |
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if (cmd == FLASH29_CMD_SECTOR) |
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{ |
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*(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; |
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*(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; |
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*(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; |
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*pFA = FLASH29_CMD_SECTOR; |
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} |
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if (cmd == FLASH29_CMD_SIXTH) |
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{ |
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*(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; |
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*(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; |
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*(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; |
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*(FLASH29_REG_SIXTH_CYCLE) = FLASH29_CMD_SIXTH; |
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} |
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if (cmd == FLASH29_CMD_PROGRAM) |
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{ |
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*(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_PROGRAM; |
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*pFA = value; |
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} |
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if (cmd == FLASH29_CMD_READ_RESET) |
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{ |
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*(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; |
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} |
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*(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ |
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} |
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static void load_cmd(ulong cmd) |
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{ |
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ulong *src; |
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ulong *dst; |
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FUNCPTR_CP absEntry; |
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ulong func; |
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if (in_ram_cmd & cmd) return; |
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if (cmd == IN_RAM_CMD_READ) |
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{ |
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func = (ulong)flash_read_cmd; |
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} |
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else |
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{ |
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func = (ulong)flash_write_cmd; |
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} |
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src = (ulong *)(func & 0xfffffff8); |
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dst = (ulong *)0xbf008000; |
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absEntry = (FUNCPTR_CP)(0xbf0081d0); |
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absEntry(src,dst,0x38); |
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in_ram_cmd = cmd; |
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} |
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/*-----------------------------------------------------------------------
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* flash_init() |
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* |
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* sets up flash_info and returns size of FLASH (bytes) |
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*/ |
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unsigned long flash_init (void) |
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{ |
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unsigned long size = 0; |
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int i; |
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load_cmd(IN_RAM_CMD_READ); |
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/* Init: no FLASHes known */ |
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for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
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ulong flashbase = PHYS_FLASH_1; |
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ulong * buscon = (ulong *) INCA_IP_EBU_EBU_BUSCON0; |
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/* Disable write protection */ |
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*buscon &= ~INCA_IP_EBU_EBU_BUSCON1_WRDIS; |
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#if 1 |
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memset(&flash_info[i], 0, sizeof(flash_info_t)); |
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#endif |
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flash_info[i].size = |
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flash_get_size((FPW *)flashbase, &flash_info[i]); |
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if (flash_info[i].flash_id == FLASH_UNKNOWN) { |
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printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n", |
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i, flash_info[i].size); |
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} |
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size += flash_info[i].size; |
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} |
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#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE |
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/* monitor protection ON by default */ |
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flash_protect(FLAG_PROTECT_SET, |
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CONFIG_SYS_MONITOR_BASE, |
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CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, |
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flash_get_info(CONFIG_SYS_MONITOR_BASE)); |
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#endif |
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#ifdef CONFIG_ENV_IS_IN_FLASH |
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/* ENV protection ON by default */ |
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flash_protect(FLAG_PROTECT_SET, |
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CONFIG_ENV_ADDR, |
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CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1, |
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flash_get_info(CONFIG_ENV_ADDR)); |
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#endif |
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return size; |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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static void flash_get_offsets (ulong base, flash_info_t *info) |
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{ |
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int i; |
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD |
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&& (info->flash_id & FLASH_TYPEMASK) == FLASH_AM160B) { |
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int bootsect_size[4]; /* number of bytes/boot sector */ |
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int sect_size; /* number of bytes/regular sector */ |
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bootsect_size[0] = 0x00008000; |
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bootsect_size[1] = 0x00004000; |
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bootsect_size[2] = 0x00004000; |
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bootsect_size[3] = 0x00010000; |
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sect_size = 0x00020000; |
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/* set sector offsets for bottom boot block type */ |
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for (i = 0; i < info->sector_count; i++) { |
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info->start[i] = base; |
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base += i < 4 ? bootsect_size[i] : sect_size; |
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} |
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} |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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static flash_info_t *flash_get_info(ulong base) |
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{ |
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int i; |
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flash_info_t * info; |
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i ++) { |
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info = & flash_info[i]; |
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if (info->start[0] <= base && base < info->start[0] + info->size) |
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break; |
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} |
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return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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void flash_print_info (flash_info_t *info) |
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{ |
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int i; |
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uchar *boottype; |
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uchar *bootletter; |
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char *fmt; |
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uchar botbootletter[] = "B"; |
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uchar topbootletter[] = "T"; |
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uchar botboottype[] = "bottom boot sector"; |
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uchar topboottype[] = "top boot sector"; |
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if (info->flash_id == FLASH_UNKNOWN) { |
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printf ("missing or unknown FLASH type\n"); |
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return; |
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} |
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switch (info->flash_id & FLASH_VENDMASK) { |
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case FLASH_MAN_AMD: printf ("AMD "); break; |
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case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; |
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case FLASH_MAN_FUJ: printf ("FUJITSU "); break; |
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case FLASH_MAN_SST: printf ("SST "); break; |
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case FLASH_MAN_STM: printf ("STM "); break; |
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case FLASH_MAN_INTEL: printf ("INTEL "); break; |
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default: printf ("Unknown Vendor "); break; |
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} |
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/* check for top or bottom boot, if it applies */ |
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if (info->flash_id & FLASH_BTYPE) { |
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boottype = botboottype; |
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bootletter = botbootletter; |
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} |
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else { |
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boottype = topboottype; |
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bootletter = topbootletter; |
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} |
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|
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switch (info->flash_id & FLASH_TYPEMASK) { |
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case FLASH_AM160B: |
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fmt = "29LV160B%s (16 Mbit, %s)\n"; |
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break; |
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case FLASH_28F800C3B: |
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case FLASH_28F800C3T: |
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fmt = "28F800C3%s (8 Mbit, %s)\n"; |
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break; |
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case FLASH_INTEL800B: |
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case FLASH_INTEL800T: |
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fmt = "28F800B3%s (8 Mbit, %s)\n"; |
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break; |
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case FLASH_28F160C3B: |
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case FLASH_28F160C3T: |
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fmt = "28F160C3%s (16 Mbit, %s)\n"; |
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break; |
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case FLASH_INTEL160B: |
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case FLASH_INTEL160T: |
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fmt = "28F160B3%s (16 Mbit, %s)\n"; |
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break; |
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case FLASH_28F320C3B: |
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case FLASH_28F320C3T: |
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fmt = "28F320C3%s (32 Mbit, %s)\n"; |
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break; |
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case FLASH_INTEL320B: |
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case FLASH_INTEL320T: |
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fmt = "28F320B3%s (32 Mbit, %s)\n"; |
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break; |
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case FLASH_28F640C3B: |
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case FLASH_28F640C3T: |
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fmt = "28F640C3%s (64 Mbit, %s)\n"; |
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break; |
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case FLASH_INTEL640B: |
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case FLASH_INTEL640T: |
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fmt = "28F640B3%s (64 Mbit, %s)\n"; |
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break; |
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default: |
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fmt = "Unknown Chip Type\n"; |
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break; |
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} |
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printf (fmt, bootletter, boottype); |
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printf (" Size: %ld MB in %d Sectors\n", |
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info->size >> 20, |
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info->sector_count); |
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printf (" Sector Start Addresses:"); |
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for (i=0; i<info->sector_count; ++i) { |
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if ((i % 5) == 0) { |
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printf ("\n "); |
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} |
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|
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printf (" %08lX%s", info->start[i], |
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info->protect[i] ? " (RO)" : " "); |
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} |
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printf ("\n"); |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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|
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/*
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* The following code cannot be run from FLASH! |
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*/ |
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|
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ulong flash_get_size (FPWV *addr, flash_info_t *info) |
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{ |
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FUNCPTR_RD absEntry; |
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FPW retValue; |
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int flag; |
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|
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load_cmd(IN_RAM_CMD_READ); |
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absEntry = (FUNCPTR_RD)FLASH_READ_CMD; |
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|
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flag = disable_interrupts(); |
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absEntry(FLASH29_CMD_AUTOSELECT,0,0,0); |
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if (flag) enable_interrupts(); |
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|
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udelay(100); |
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|
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flag = disable_interrupts(); |
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absEntry(FLASH29_CMD_READ, addr + 1, (char *)&retValue, sizeof(retValue)); |
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absEntry(FLASH29_CMD_READ_RESET,0,0,0); |
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if (flag) enable_interrupts(); |
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|
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udelay(100); |
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|
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switch (retValue) { |
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|
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case (FPW)AMD_ID_LV160B: |
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info->flash_id += FLASH_AM160B; |
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info->sector_count = 35; |
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info->size = 0x00400000; |
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break; /* => 8 or 16 MB */ |
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|
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default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
info->sector_count = 0; |
||||
info->size = 0; |
||||
return (0); /* => no or unknown flash */ |
||||
} |
||||
|
||||
flash_get_offsets((ulong)addr, info); |
||||
|
||||
return (info->size); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
int flash_erase (flash_info_t *info, int s_first, int s_last) |
||||
{ |
||||
FPWV *addr; |
||||
int flag, prot, sect; |
||||
ulong start, now, last; |
||||
FUNCPTR_WR absEntry; |
||||
|
||||
load_cmd(IN_RAM_CMD_WRITE); |
||||
absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD; |
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) { |
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("- missing\n"); |
||||
} else { |
||||
printf ("- no sectors to erase\n"); |
||||
} |
||||
return 1; |
||||
} |
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) { |
||||
case FLASH_AM160B: |
||||
break; |
||||
case FLASH_UNKNOWN: |
||||
default: |
||||
printf ("Can't erase unknown flash type %08lx - aborted\n", |
||||
info->flash_id); |
||||
return 1; |
||||
} |
||||
|
||||
prot = 0; |
||||
for (sect=s_first; sect<=s_last; ++sect) { |
||||
if (info->protect[sect]) { |
||||
prot++; |
||||
} |
||||
} |
||||
|
||||
if (prot) { |
||||
printf ("- Warning: %d protected sectors will not be erased!\n", |
||||
prot); |
||||
} else { |
||||
printf ("\n"); |
||||
} |
||||
|
||||
last = get_timer(0); |
||||
|
||||
/* Start erase on unprotected sectors */ |
||||
for (sect = s_first; sect<=s_last; sect++) { |
||||
|
||||
if (info->protect[sect] != 0) /* protected, skip it */ |
||||
continue; |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts(); |
||||
|
||||
addr = (FPWV *)(info->start[sect]); |
||||
absEntry(FLASH29_CMD_SECTOR, addr, 0); |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts(); |
||||
|
||||
start = get_timer(0); |
||||
|
||||
while ((now = get_timer(start)) <= CONFIG_SYS_FLASH_ERASE_TOUT) { |
||||
|
||||
/* show that we're waiting */ |
||||
if ((get_timer(last)) > CONFIG_SYS_HZ) {/* every second */ |
||||
putc ('.'); |
||||
last = get_timer(0); |
||||
} |
||||
} |
||||
|
||||
flag = disable_interrupts(); |
||||
absEntry(FLASH29_CMD_READ_RESET,0,0); |
||||
if (flag) |
||||
enable_interrupts(); |
||||
} |
||||
|
||||
printf (" done\n"); |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
||||
{ |
||||
FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */ |
||||
int bytes; /* number of bytes to program in current word */ |
||||
int left; /* number of bytes left to program */ |
||||
int i, res; |
||||
|
||||
for (left = cnt, res = 0; |
||||
left > 0 && res == 0; |
||||
addr += sizeof(data), left -= sizeof(data) - bytes) { |
||||
|
||||
bytes = addr & (sizeof(data) - 1); |
||||
addr &= ~(sizeof(data) - 1); |
||||
|
||||
/* combine source and destination data so can program
|
||||
* an entire word of 16 or 32 bits |
||||
*/ |
||||
for (i = 0; i < sizeof(data); i++) { |
||||
data <<= 8; |
||||
if (i < bytes || i - bytes >= left ) |
||||
data += *((uchar *)addr + i); |
||||
else |
||||
data += *src++; |
||||
} |
||||
|
||||
res = write_word(info, (FPWV *)addr, data); |
||||
} |
||||
|
||||
return (res); |
||||
} |
||||
|
||||
static int write_word (flash_info_t *info, FPWV *dest, FPW data) |
||||
{ |
||||
int res = 0; /* result, assume success */ |
||||
FUNCPTR_WR absEntry; |
||||
int flag; |
||||
|
||||
/* Check if Flash is (sufficiently) erased */ |
||||
if ((*dest & data) != data) { |
||||
return (2); |
||||
} |
||||
|
||||
if (info->start[0] != PHYS_FLASH_1) |
||||
{ |
||||
return (3); |
||||
} |
||||
|
||||
load_cmd(IN_RAM_CMD_WRITE); |
||||
absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD; |
||||
|
||||
flag = disable_interrupts(); |
||||
absEntry(FLASH29_CMD_PROGRAM,dest,data); |
||||
if (flag) enable_interrupts(); |
||||
|
||||
udelay(100); |
||||
|
||||
flag = disable_interrupts(); |
||||
absEntry(FLASH29_CMD_READ_RESET,0,0); |
||||
if (flag) enable_interrupts(); |
||||
|
||||
return (res); |
||||
} |
||||
@ -1,36 +0,0 @@ |
||||
/* |
||||
* Memory sub-system initialization code for PURPLE development board. |
||||
* |
||||
* Copyright (c) 2003 Wolfgang Denk <wd@denx.de>
|
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <config.h> |
||||
#include <asm/regdef.h> |
||||
|
||||
#define MC_IOGP 0xBF800800 |
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init: |
||||
li t0, MC_IOGP |
||||
li t1, 0xf24 |
||||
sw t1, 0(t0) |
||||
jr ra |
||||
nop |
||||
@ -1,284 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2003 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <command.h> |
||||
#include <netdev.h> |
||||
#include <asm/inca-ip.h> |
||||
#include <asm/regdef.h> |
||||
#include <asm/mipsregs.h> |
||||
#include <asm/io.h> |
||||
#include <asm/addrspace.h> |
||||
#include <asm/cacheops.h> |
||||
#include <asm/reboot.h> |
||||
|
||||
#include "sconsole.h" |
||||
|
||||
#define cache_unroll(base,op) \ |
||||
__asm__ __volatile__(" \
|
||||
.set noreorder; \
|
||||
.set mips3; \
|
||||
cache %1, (%0); \
|
||||
.set mips0; \
|
||||
.set reorder" \
|
||||
: \
|
||||
: "r" (base), \
|
||||
"i" (op)); |
||||
|
||||
typedef void (*FUNCPTR)(ulong *source, ulong *destination, ulong nlongs); |
||||
|
||||
extern void asc_serial_init (void); |
||||
extern void asc_serial_putc (char); |
||||
extern void asc_serial_puts (const char *); |
||||
extern int asc_serial_getc (void); |
||||
extern int asc_serial_tstc (void); |
||||
extern void asc_serial_setbrg (void); |
||||
|
||||
void _machine_restart(void) |
||||
{ |
||||
void (*f)(void) = (void *) 0xbfc00000; |
||||
|
||||
f(); |
||||
} |
||||
|
||||
static void sdram_timing_init (ulong size) |
||||
{ |
||||
register uint pass; |
||||
register uint done; |
||||
register uint count; |
||||
register uint p0, p1, p2, p3, p4; |
||||
register uint addr; |
||||
|
||||
#define WRITE_MC_IOGP_1 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+(p4<<8)+(p0<<4)+p3; |
||||
#define WRITE_MC_IOGP_2 *(uint *)0xbf800800 = (p1<<14)+(p2<<13)+((p4-16)<<8)+(p0<<4)+p3; |
||||
|
||||
done = 0; |
||||
p0 = 2; |
||||
while (p0 < 4 && done == 0) { |
||||
p1 = 0; |
||||
while (p1 < 2 && done == 0) { |
||||
p2 = 0; |
||||
while (p2 < 2 && done == 0) { |
||||
p3 = 0; |
||||
while (p3 < 16 && done == 0) { |
||||
count = 0; |
||||
p4 = 0; |
||||
while (p4 < 32 && done == 0) { |
||||
WRITE_MC_IOGP_1; |
||||
|
||||
for (addr = CKSEG1 + 0x4000; |
||||
addr < CKSEG1ADDR (size); |
||||
addr = addr + 4) { |
||||
*(uint *) addr = 0xaa55aa55; |
||||
} |
||||
|
||||
pass = 1; |
||||
|
||||
for (addr = CKSEG1 + 0x4000; |
||||
addr < CKSEG1ADDR (size) && pass == 1; |
||||
addr = addr + 4) { |
||||
if (*(uint *) addr != 0xaa55aa55) |
||||
pass = 0; |
||||
} |
||||
|
||||
if (pass == 1) { |
||||
count++; |
||||
} else { |
||||
count = 0; |
||||
} |
||||
|
||||
if (count == 32) { |
||||
WRITE_MC_IOGP_2; |
||||
done = 1; |
||||
} |
||||
p4++; |
||||
} |
||||
p3++; |
||||
} |
||||
p2++; |
||||
} |
||||
p1++; |
||||
} |
||||
p0++; |
||||
if (p0 == 1) |
||||
p0++; |
||||
} |
||||
} |
||||
|
||||
phys_size_t initdram(int board_type) |
||||
{ |
||||
/* The only supported number of SDRAM banks is 4.
|
||||
*/ |
||||
#define CONFIG_SYS_NB 4 |
||||
|
||||
ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0; |
||||
ulong cfgdw = *INCA_IP_SDRAM_MC_CFGDW; |
||||
int cols = cfgpb0 & 0xF; |
||||
int rows = (cfgpb0 & 0xF0) >> 4; |
||||
int dw = cfgdw & 0xF; |
||||
ulong size = (1 << (rows + cols)) * (1 << (dw - 1)) * CONFIG_SYS_NB; |
||||
void (* sdram_init) (ulong); |
||||
|
||||
sdram_init = (void (*)(ulong)) CKSEG0ADDR(&sdram_timing_init); |
||||
|
||||
sdram_init(0x10000); |
||||
|
||||
return size; |
||||
} |
||||
|
||||
int checkboard (void) |
||||
{ |
||||
|
||||
unsigned long chipid = *(unsigned long *)0xB800C800; |
||||
|
||||
printf ("Board: Purple PLB 2800 chip version %ld, ", chipid & 0xF); |
||||
|
||||
printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000); |
||||
|
||||
set_io_port_base(0); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int misc_init_r (void) |
||||
{ |
||||
asc_serial_init (); |
||||
|
||||
sconsole_putc = asc_serial_putc; |
||||
sconsole_puts = asc_serial_puts; |
||||
sconsole_getc = asc_serial_getc; |
||||
sconsole_tstc = asc_serial_tstc; |
||||
sconsole_setbrg = asc_serial_setbrg; |
||||
|
||||
sconsole_flush (); |
||||
return (0); |
||||
} |
||||
|
||||
/*******************************************************************************
|
||||
* |
||||
* copydwords - copy one buffer to another a long at a time |
||||
* |
||||
* This routine copies the first <nlongs> longs from <source> to <destination>. |
||||
*/ |
||||
static void copydwords (ulong *source, ulong *destination, ulong nlongs) |
||||
{ |
||||
ulong temp,temp1; |
||||
ulong *dstend = destination + nlongs; |
||||
|
||||
while (destination < dstend) { |
||||
temp = *source++; |
||||
/* dummy read from sdram */ |
||||
temp1 = *(ulong *)0xa0000000; |
||||
/* avoid optimization from compliler */ |
||||
*(ulong *)0xbf0081f8 = temp1 + temp; |
||||
*destination++ = temp; |
||||
|
||||
} |
||||
} |
||||
|
||||
/*******************************************************************************
|
||||
* |
||||
* copyLongs - copy one buffer to another a long at a time |
||||
* |
||||
* This routine copies the first <nlongs> longs from <source> to <destination>. |
||||
*/ |
||||
static void copyLongs (ulong *source, ulong *destination, ulong nlongs) |
||||
{ |
||||
FUNCPTR absEntry; |
||||
|
||||
absEntry = (FUNCPTR)(0xbf008000+((ulong)copydwords & 0x7)); |
||||
absEntry(source, destination, nlongs); |
||||
} |
||||
|
||||
/*******************************************************************************
|
||||
* |
||||
* programLoad - load program into ram |
||||
* |
||||
* This routine load copydwords into ram |
||||
* |
||||
*/ |
||||
static void programLoad(void) |
||||
{ |
||||
FUNCPTR absEntry; |
||||
ulong *src,*dst; |
||||
|
||||
src = (ulong *)(CONFIG_SYS_TEXT_BASE + 0x428); |
||||
dst = (ulong *)0xbf0081d0; |
||||
|
||||
absEntry = (FUNCPTR)(CONFIG_SYS_TEXT_BASE + 0x400); |
||||
absEntry(src,dst,0x6); |
||||
|
||||
src = (ulong *)((ulong)copydwords & 0xfffffff8); |
||||
dst = (ulong *)0xbf008000; |
||||
|
||||
absEntry(src,dst,0x38); |
||||
} |
||||
|
||||
/*******************************************************************************
|
||||
* |
||||
* copy_code - copy u-boot image from flash to RAM |
||||
* |
||||
* This routine is needed to solve flash problems on this board |
||||
* |
||||
*/ |
||||
void copy_code (ulong dest_addr) |
||||
{ |
||||
extern long uboot_end_data; |
||||
unsigned long start; |
||||
unsigned long end; |
||||
|
||||
/* load copydwords into ram
|
||||
*/ |
||||
programLoad(); |
||||
|
||||
/* copy u-boot code
|
||||
*/ |
||||
copyLongs((ulong *)CONFIG_SYS_MONITOR_BASE, |
||||
(ulong *)dest_addr, |
||||
((ulong)&uboot_end_data - CONFIG_SYS_MONITOR_BASE + 3) / 4); |
||||
|
||||
|
||||
/* flush caches
|
||||
*/ |
||||
|
||||
start = CKSEG0; |
||||
end = start + CONFIG_SYS_DCACHE_SIZE; |
||||
while(start < end) { |
||||
cache_unroll(start,Index_Writeback_Inv_D); |
||||
start += CONFIG_SYS_CACHELINE_SIZE; |
||||
} |
||||
|
||||
start = CKSEG0; |
||||
end = start + CONFIG_SYS_ICACHE_SIZE; |
||||
while(start < end) { |
||||
cache_unroll(start,Index_Invalidate_I); |
||||
start += CONFIG_SYS_CACHELINE_SIZE; |
||||
} |
||||
} |
||||
|
||||
#ifdef CONFIG_PLB2800_ETHER |
||||
int board_eth_init(bd_t *bis) |
||||
{ |
||||
return plb2800_eth_initialize(bis); |
||||
} |
||||
#endif |
||||
@ -1,125 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2002 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <config.h> |
||||
#include <common.h> |
||||
|
||||
#include "sconsole.h" |
||||
|
||||
void (*sconsole_putc) (char) = 0; |
||||
void (*sconsole_puts) (const char *) = 0; |
||||
int (*sconsole_getc) (void) = 0; |
||||
int (*sconsole_tstc) (void) = 0; |
||||
void (*sconsole_setbrg) (void) = 0; |
||||
|
||||
int serial_init (void) |
||||
{ |
||||
sconsole_buffer_t *sb = SCONSOLE_BUFFER; |
||||
|
||||
sb->pos = 0; |
||||
sb->size = 0; |
||||
sb->max_size = CONFIG_SYS_SCONSOLE_SIZE - sizeof (sconsole_buffer_t); |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
void serial_putc (char c) |
||||
{ |
||||
if (sconsole_putc) { |
||||
(*sconsole_putc) (c); |
||||
} else { |
||||
sconsole_buffer_t *sb = SCONSOLE_BUFFER; |
||||
|
||||
if (c) { |
||||
sb->data[sb->pos++] = c; |
||||
if (sb->pos == sb->max_size) { |
||||
sb->pos = 0; |
||||
} |
||||
if (sb->size < sb->max_size) { |
||||
sb->size++; |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
||||
void serial_puts (const char *s) |
||||
{ |
||||
if (sconsole_puts) { |
||||
(*sconsole_puts) (s); |
||||
} else { |
||||
sconsole_buffer_t *sb = SCONSOLE_BUFFER; |
||||
|
||||
while (*s) { |
||||
sb->data[sb->pos++] = *s++; |
||||
if (sb->pos == sb->max_size) { |
||||
sb->pos = 0; |
||||
} |
||||
if (sb->size < sb->max_size) { |
||||
sb->size++; |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
||||
int serial_getc (void) |
||||
{ |
||||
if (sconsole_getc) { |
||||
return (*sconsole_getc) (); |
||||
} else { |
||||
return 0; |
||||
} |
||||
} |
||||
|
||||
int serial_tstc (void) |
||||
{ |
||||
if (sconsole_tstc) { |
||||
return (*sconsole_tstc) (); |
||||
} else { |
||||
return 0; |
||||
} |
||||
} |
||||
|
||||
void serial_setbrg (void) |
||||
{ |
||||
if (sconsole_setbrg) { |
||||
(*sconsole_setbrg) (); |
||||
} |
||||
} |
||||
|
||||
void sconsole_flush (void) |
||||
{ |
||||
if (sconsole_putc) { |
||||
sconsole_buffer_t *sb = SCONSOLE_BUFFER; |
||||
unsigned int end = sb->pos < sb->size |
||||
? sb->pos + sb->max_size - sb->size |
||||
: sb->pos - sb->size; |
||||
|
||||
while (sb->size) { |
||||
(*sconsole_putc) (sb->data[end++]); |
||||
if (end == sb->max_size) { |
||||
end = 0; |
||||
} |
||||
sb->size--; |
||||
} |
||||
} |
||||
} |
||||
@ -1,46 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2002 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef _SCONSOLE_H_ |
||||
#define _SCONSOLE_H_ |
||||
|
||||
#include <config.h> |
||||
|
||||
typedef struct sconsole_buffer_s { |
||||
unsigned long size; |
||||
unsigned long max_size; |
||||
unsigned long pos; |
||||
char data[1]; |
||||
} sconsole_buffer_t; |
||||
|
||||
#define SCONSOLE_BUFFER ((sconsole_buffer_t *) CONFIG_SYS_SCONSOLE_ADDR) |
||||
|
||||
extern void (* sconsole_putc) (char); |
||||
extern void (* sconsole_puts) (const char *); |
||||
extern int (* sconsole_getc) (void); |
||||
extern int (* sconsole_tstc) (void); |
||||
extern void (* sconsole_setbrg) (void); |
||||
|
||||
extern void sconsole_flush (void); |
||||
|
||||
#endif |
||||
@ -1,75 +0,0 @@ |
||||
/* |
||||
* (C) Copyright 2003 |
||||
* Wolfgang Denk Engineering, <wd@denx.de> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/* |
||||
OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips") |
||||
*/ |
||||
OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradlittlemips") |
||||
OUTPUT_ARCH(mips) |
||||
ENTRY(_start) |
||||
SECTIONS |
||||
{ |
||||
. = 0x00000000; |
||||
|
||||
. = ALIGN(4); |
||||
.text : |
||||
{ |
||||
arch/mips/cpu/start.o (.text) |
||||
board/purple/lowlevel_init.o (.text) |
||||
. = DEFINED(env_offset) ? env_offset : .; |
||||
common/env_embedded.o (.ppcenv) |
||||
|
||||
*(.text) |
||||
} |
||||
|
||||
. = ALIGN(4); |
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
||||
|
||||
. = ALIGN(4); |
||||
.data : { *(.data) } |
||||
|
||||
. = .; |
||||
_gp = ALIGN(16) + 0x7ff0; |
||||
|
||||
.got : { |
||||
__got_start = .; |
||||
*(.got) |
||||
__got_end = .; |
||||
} |
||||
|
||||
.sdata : { *(.sdata) } |
||||
|
||||
.u_boot_cmd : { |
||||
__u_boot_cmd_start = .; |
||||
*(.u_boot_cmd) |
||||
__u_boot_cmd_end = .; |
||||
} |
||||
|
||||
uboot_end_data = .; |
||||
num_got_entries = (__got_end - __got_start) >> 2; |
||||
|
||||
. = ALIGN(4); |
||||
.sbss (NOLOAD) : { *(.sbss) } |
||||
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); } |
||||
uboot_end = .; |
||||
} |
||||
@ -1,84 +0,0 @@ |
||||
Installation Instructions: |
||||
-------------------------- |
||||
|
||||
1. Put the s2 switch into the following position: |
||||
|
||||
Off On |
||||
------ |
||||
|x | |
||||
| x| |
||||
|x | |
||||
| X| |
||||
------ |
||||
|
||||
Put the s3 switch into the following position: |
||||
|
||||
Off On |
||||
------ |
||||
| x | |
||||
| x | |
||||
| x| |
||||
| x| |
||||
------ |
||||
|
||||
Put the s4 switch into the following position: |
||||
|
||||
Off On |
||||
------ |
||||
|x | |
||||
|x | |
||||
|x | |
||||
|x | |
||||
|x | |
||||
| x| |
||||
| x| |
||||
|x | |
||||
------ |
||||
|
||||
2. Connect to the serial console and to the BDI. Power on. On the |
||||
serial line, you should see: |
||||
|
||||
PURPLE@1.2> |
||||
|
||||
3. Type '8'. No echo will be displayed. In response, you should get: |
||||
|
||||
7A(pass) |
||||
|
||||
4. From BDI, enter command: |
||||
|
||||
mmw 0xb800d860 0x0042c7ff |
||||
|
||||
5. Then, from BDI: |
||||
|
||||
erase 0xB0000000 |
||||
erase 0xB0008000 |
||||
erase 0xB000C000 |
||||
erase 0xB0010000 |
||||
erase 0xB0020000 |
||||
|
||||
prog 0xB0000000 <u-boot.bin> bin |
||||
|
||||
6. Power off. Restore the original S2 switch position: |
||||
|
||||
Off On |
||||
------ |
||||
| x| |
||||
| x| |
||||
|x | |
||||
| X| |
||||
------ |
||||
|
||||
Power on. U-Boot should come up. |
||||
|
||||
|
||||
Implementation Notes: |
||||
--------------------- |
||||
|
||||
Due to the RAM/flash bus arbitration problem the suggested workaround |
||||
had to be implemented. It works okay. On the downside is that you |
||||
can't really check whether 'erase' is complete by polling flash as it |
||||
is usually done. Instead, the flash driver simply waits for a given |
||||
time and assumes that erase then has passed. This behaviour is |
||||
identical to what the VxWorks driver does; also, the same timeout (6 |
||||
seconds) was chosen. Note that this timeout applies for each erase |
||||
operation, i. e. per erased sector. |
||||
@ -1,173 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2003 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* This file contains the configuration parameters for the PURPLE board. |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
#define CONFIG_MIPS32 1 /* MIPS 5Kc CPU core */ |
||||
#define CONFIG_PURPLE 1 /* on a PURPLE Board */ |
||||
|
||||
#define CPU_CLOCK_RATE 125000000 /* 125 MHz clock for the MIPS core */ |
||||
#define ASC_CLOCK_RATE 62500000 /* 62.5 MHz ASC clock */ |
||||
|
||||
#define INFINEON_EBU_BOOTCFG 0xE0CC |
||||
|
||||
#define CONFIG_STACKSIZE (128 * 1024) |
||||
|
||||
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
||||
|
||||
#define CONFIG_BAUDRATE 19200 |
||||
|
||||
/* valid baudrates */ |
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
||||
|
||||
#define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
||||
|
||||
#define CONFIG_PREBOOT "echo;" \ |
||||
"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
|
||||
"echo" |
||||
|
||||
#undef CONFIG_BOOTARGS |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||
"nfsroot=${serverip}:${rootpath}\0" \
|
||||
"ramargs=setenv bootargs root=/dev/ram rw\0" \
|
||||
"addip=setenv bootargs ${bootargs} " \
|
||||
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
|
||||
":${hostname}:${netdev}:off\0" \
|
||||
"addmisc=setenv bootargs ${bootargs} " \
|
||||
"console=ttyS0,${baudrate} " \
|
||||
"ethaddr=${ethaddr} " \
|
||||
"panic=1\0" \
|
||||
"flash_nfs=run nfsargs addip addmisc;" \
|
||||
"bootm ${kernel_addr}\0" \
|
||||
"flash_self=run ramargs addip addmisc;" \
|
||||
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
|
||||
"net_nfs=tftp 80500000 ${bootfile};" \
|
||||
"run nfsargs addip addmisc;bootm\0" \
|
||||
"rootpath=/opt/eldk/mips_5KC\0" \
|
||||
"bootfile=/tftpboot/purple/uImage\0" \
|
||||
"kernel_addr=B0040000\0" \
|
||||
"ramdisk_addr=B0100000\0" \
|
||||
"u-boot=/tftpboot/purple/u-boot.bin\0" \
|
||||
"load=tftp 80500000 ${u-boot}\0" \
|
||||
"update=protect off 1:0-4;era 1:0-4;" \
|
||||
"cp.b 80500000 B0000000 ${filesize}\0" \
|
||||
"" |
||||
#define CONFIG_BOOTCOMMAND "run flash_self" |
||||
|
||||
|
||||
/*
|
||||
* BOOTP options |
||||
*/ |
||||
#define CONFIG_BOOTP_BOOTFILESIZE |
||||
#define CONFIG_BOOTP_BOOTPATH |
||||
#define CONFIG_BOOTP_GATEWAY |
||||
#define CONFIG_BOOTP_HOSTNAME |
||||
|
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
|
||||
#define CONFIG_CMD_ELF |
||||
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x80000000 |
||||
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
||||
|
||||
#define CONFIG_SYS_MALLOC_LEN 128*1024 |
||||
|
||||
#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 |
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
||||
#define CONFIG_SYS_PROMPT "PURPLE # " /* Monitor Command Prompt */ |
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE/2) |
||||
#define CONFIG_SYS_HZ 1000 |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */ |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x80200000 |
||||
#define CONFIG_SYS_MEMTEST_END 0x80800000 |
||||
|
||||
#define CONFIG_MISC_INIT_R |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH and environment organization |
||||
*/ |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||
#define CONFIG_SYS_MAX_FLASH_SECT (35) /* max number of sectors on one chip */ |
||||
|
||||
#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */ |
||||
|
||||
/* The following #defines are needed to get flash environment right */ |
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
||||
#define CONFIG_SYS_MONITOR_LEN (192 << 10) |
||||
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
||||
|
||||
/* timeout values are in ticks */ |
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (6 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (6 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
||||
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1 |
||||
|
||||
/* Address and size of Primary Environment Sector */ |
||||
#define CONFIG_ENV_ADDR 0xB0008000 |
||||
#define CONFIG_ENV_SIZE 0x4000 |
||||
|
||||
#define CONFIG_FLASH_32BIT |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
|
||||
#define CONFIG_PLB2800_ETHER |
||||
#define CONFIG_NET_MULTI |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration |
||||
*/ |
||||
#define CONFIG_SYS_DCACHE_SIZE 16384 |
||||
#define CONFIG_SYS_ICACHE_SIZE 16384 |
||||
#define CONFIG_SYS_CACHELINE_SIZE 32 |
||||
|
||||
/*
|
||||
* Temporary buffer for serial data until the real serial driver |
||||
* is initialised (memtest will destroy this buffer) |
||||
*/ |
||||
#define CONFIG_SYS_SCONSOLE_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET - \ |
||||
CONFIG_SYS_DCACHE_SIZE / 2) |
||||
#define CONFIG_SYS_SCONSOLE_SIZE (CONFIG_SYS_DCACHE_SIZE / 4) |
||||
|
||||
#endif /* __CONFIG_H */ |
||||
Loading…
Reference in new issue