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@ -273,6 +273,7 @@ |
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#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
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#define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
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#elif defined(CONFIG_PPC_P2041) |
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@ -289,6 +290,7 @@ |
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#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
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#define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
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#elif defined(CONFIG_PPC_P3041) |
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@ -305,6 +307,7 @@ |
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#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
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#define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
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#elif defined(CONFIG_PPC_P4040) |
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@ -358,6 +361,7 @@ |
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#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
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#define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
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#elif defined(CONFIG_PPC_P5020) |
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@ -374,6 +378,7 @@ |
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#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" |
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#define CONFIG_SYS_FSL_USB1_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB2_PHY_ENABLE |
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#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY |
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 |
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#else |
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