Tom Rini
7 years ago
commit
b75643ad0a
@ -1,6 +0,0 @@ |
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# Build a combined spl + u-boot image
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ifdef CONFIG_SPL |
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ifndef CONFIG_SPL_BUILD |
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ALL-y += u-boot-sunxi-with-spl.bin
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endif |
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endif |
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@ -0,0 +1,36 @@ |
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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/* |
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* Device Tree Source for A20-SOM204-EVB-eMMC Board |
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* |
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* Copyright (C) 2018 Olimex Ltd. |
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* Author: Stefan Mavrodiev <stefan@olimex.com> |
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*/ |
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/dts-v1/; |
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#include "sun7i-a20-olimex-som204-evb.dts" |
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/ { |
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model = "Olimex A20-SOM204-EVB-eMMC"; |
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compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20"; |
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mmc2_pwrseq: mmc2_pwrseq { |
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compatible = "mmc-pwrseq-emmc"; |
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reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>; |
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}; |
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}; |
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&mmc2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mmc2_pins_a>; |
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vmmc-supply = <®_vcc3v3>; |
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mmc-pwrseq = <&mmc2_pwrseq>; |
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bus-width = <4>; |
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non-removable; |
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status = "okay"; |
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emmc: emmc@0 { |
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reg = <0>; |
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compatible = "mmc-card"; |
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broken-hpi; |
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}; |
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}; |
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@ -0,0 +1,296 @@ |
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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/* |
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* Device Tree Source for A20-SOM204-EVB Board |
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* |
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* Copyright (C) 2018 Olimex Ltd. |
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* Author: Stefan Mavrodiev <stefan@olimex.com> |
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*/ |
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/dts-v1/; |
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#include "sun7i-a20.dtsi" |
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#include "sunxi-common-regulators.dtsi" |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/interrupt-controller/irq.h> |
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#include <dt-bindings/pwm/pwm.h> |
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/ { |
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model = "Olimex A20-SOM204-EVB"; |
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compatible = "olimex,a20-olimex-som204-evb", "allwinner,sun7i-a20"; |
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aliases { |
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serial0 = &uart0; |
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serial1 = &uart4; |
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serial2 = &uart7; |
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spi0 = &spi1; |
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spi1 = &spi2; |
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ethernet1 = &rtl8723bs; |
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}; |
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chosen { |
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stdout-path = "serial0:115200n8"; |
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}; |
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leds { |
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compatible = "gpio-leds"; |
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stat { |
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label = "a20-som204-evb:green:stat"; |
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gpios = <&pio 8 0 GPIO_ACTIVE_HIGH>; |
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default-state = "on"; |
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}; |
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led1 { |
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label = "a20-som204-evb:green:led1"; |
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gpios = <&pio 8 10 GPIO_ACTIVE_HIGH>; |
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default-state = "on"; |
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}; |
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led2 { |
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label = "a20-som204-evb:yellow:led2"; |
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gpios = <&pio 8 11 GPIO_ACTIVE_HIGH>; |
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default-state = "on"; |
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}; |
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}; |
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rtl_pwrseq: rtl_pwrseq { |
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compatible = "mmc-pwrseq-simple"; |
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reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>; |
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}; |
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}; |
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&ahci { |
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target-supply = <®_ahci_5v>; |
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status = "okay"; |
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}; |
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&codec { |
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status = "okay"; |
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}; |
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&cpu0 { |
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cpu-supply = <®_dcdc2>; |
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}; |
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&ehci0 { |
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status = "okay"; |
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}; |
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&ehci1 { |
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status = "okay"; |
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}; |
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&gmac { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&gmac_pins_rgmii_a>; |
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phy = <&phy3>; |
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phy-mode = "rgmii"; |
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phy-supply = <®_vcc3v3>; |
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snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; |
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snps,reset-active-low; |
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snps,reset-delays-us = <0 10000 1000000>; |
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status = "okay"; |
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phy3: ethernet-phy@3 { |
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reg = <3>; |
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}; |
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}; |
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&i2c0 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&i2c0_pins_a>; |
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status = "okay"; |
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axp209: pmic@34 { |
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reg = <0x34>; |
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interrupt-parent = <&nmi_intc>; |
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
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}; |
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}; |
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/* Exposed to UEXT1 */ |
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&i2c1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&i2c1_pins_a>; |
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status = "okay"; |
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eeprom: eeprom@50 { |
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compatible = "atmel,24c16"; |
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reg = <0x50>; |
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pagesize = <16>; |
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}; |
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}; |
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/* Exposed to UEXT2 */ |
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&i2c2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&i2c2_pins_a>; |
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status = "okay"; |
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}; |
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&ir0 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&ir0_rx_pins_a>; |
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status = "okay"; |
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}; |
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&mmc0 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mmc0_pins_a>; |
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vmmc-supply = <®_vcc3v3>; |
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bus-width = <4>; |
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cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; |
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cd-inverted; |
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status = "okay"; |
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}; |
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&mmc3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&mmc3_pins_a>; |
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vmmc-supply = <®_vcc3v3>; |
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mmc-pwrseq = <&rtl_pwrseq>; |
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bus-width = <4>; |
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non-removable; |
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status = "okay"; |
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rtl8723bs: sdio_wifi@1 { |
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reg = <1>; |
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}; |
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}; |
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&ohci0 { |
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status = "okay"; |
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}; |
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&ohci1 { |
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status = "okay"; |
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}; |
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&otg_sram { |
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status = "okay"; |
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}; |
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&pio { |
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bt_uart_pins: bt_uart_pins@0 { |
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pins = "PG6", "PG7", "PG8"; |
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function = "uart3"; |
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}; |
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}; |
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#include "axp209.dtsi" |
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®_ahci_5v { |
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gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>; |
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status = "okay"; |
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}; |
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®_dcdc2 { |
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regulator-always-on; |
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regulator-min-microvolt = <1000000>; |
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regulator-max-microvolt = <1400000>; |
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regulator-name = "vdd-cpu"; |
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}; |
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®_dcdc3 { |
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regulator-always-on; |
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regulator-min-microvolt = <1000000>; |
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regulator-max-microvolt = <1400000>; |
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regulator-name = "vdd-int-dll"; |
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}; |
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®_ldo1 { |
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regulator-always-on; |
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regulator-min-microvolt = <1300000>; |
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regulator-max-microvolt = <1300000>; |
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regulator-name = "vdd-rtc"; |
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}; |
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®_ldo2 { |
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regulator-always-on; |
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regulator-min-microvolt = <3000000>; |
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regulator-max-microvolt = <3000000>; |
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regulator-name = "avcc"; |
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}; |
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®_ldo4 { |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-name = "vcc-pg"; |
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}; |
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®_usb0_vbus { |
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gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>; |
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status = "okay"; |
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}; |
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®_usb1_vbus { |
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status = "okay"; |
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}; |
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®_usb2_vbus { |
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status = "okay"; |
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}; |
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/* Exposed to UEXT1 */ |
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&spi1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&spi1_pins_a>, |
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<&spi1_cs0_pins_a>; |
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status = "okay"; |
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}; |
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/* Exposed to UEXT2 */ |
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&spi2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&spi2_pins_a>, |
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<&spi2_cs0_pins_a>; |
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status = "okay"; |
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}; |
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&uart0 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&uart0_pins_a>; |
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status = "okay"; |
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}; |
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/* Used for RTL8723BS bluetooth */ |
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&uart3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&bt_uart_pins>; |
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status = "okay"; |
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}; |
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/* Exposed to UEXT1 */ |
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&uart4 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&uart4_pins_a>; |
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status = "okay"; |
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}; |
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/* Exposed to UEXT2 */ |
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&uart7 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&uart7_pins_a>; |
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status = "okay"; |
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}; |
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&usb_otg { |
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dr_mode = "otg"; |
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status = "okay"; |
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}; |
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&usb_power_supply { |
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status = "okay"; |
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}; |
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&usbphy { |
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usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ |
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usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ |
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usb0_vbus_power-supply = <&usb_power_supply>; |
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usb0_vbus-supply = <®_usb0_vbus>; |
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usb1_vbus-supply = <®_usb1_vbus>; |
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usb2_vbus-supply = <®_usb2_vbus>; |
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status = "okay"; |
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}; |
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@ -0,0 +1,34 @@ |
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CONFIG_ARM=y |
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CONFIG_ARCH_SUNXI=y |
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CONFIG_MACH_SUN7I=y |
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CONFIG_DRAM_CLK=384 |
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CONFIG_MMC0_CD_PIN="PH1" |
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2 |
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CONFIG_USB0_VBUS_PIN="PC17" |
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CONFIG_USB0_VBUS_DET="PH5" |
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CONFIG_I2C1_ENABLE=y |
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CONFIG_SATAPWR="PC3" |
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CONFIG_GMAC_TX_DELAY=4 |
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CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb-emmc" |
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CONFIG_AHCI=y |
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
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CONFIG_SPL=y |
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CONFIG_SPL_I2C_SUPPORT=y |
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# CONFIG_CMD_FLASH is not set |
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# CONFIG_CMD_FPGA is not set |
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# CONFIG_SPL_DOS_PARTITION is not set |
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# CONFIG_SPL_ISO_PARTITION is not set |
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# CONFIG_SPL_PARTITION_UUIDS is not set |
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CONFIG_SCSI_AHCI=y |
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CONFIG_ETH_DESIGNWARE=y |
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CONFIG_PHY_ADDR=3 |
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CONFIG_PHY_MICREL=y |
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CONFIG_PHY_MICREL_KSZ90X1=y |
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CONFIG_RGMII=y |
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CONFIG_SUN7I_GMAC=y |
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CONFIG_AXP_ALDO3_VOLT=2800 |
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CONFIG_AXP_ALDO4_VOLT=2800 |
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CONFIG_SCSI=y |
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CONFIG_USB_EHCI_HCD=y |
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CONFIG_USB_MUSB_GADGET=y |
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CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y |
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@ -0,0 +1,33 @@ |
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CONFIG_ARM=y |
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CONFIG_ARCH_SUNXI=y |
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CONFIG_MACH_SUN7I=y |
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CONFIG_DRAM_CLK=384 |
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CONFIG_MMC0_CD_PIN="PH1" |
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CONFIG_USB0_VBUS_PIN="PC17" |
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CONFIG_USB0_VBUS_DET="PH5" |
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CONFIG_I2C1_ENABLE=y |
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CONFIG_SATAPWR="PC3" |
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CONFIG_GMAC_TX_DELAY=4 |
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CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb" |
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CONFIG_AHCI=y |
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
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CONFIG_SPL=y |
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CONFIG_SPL_I2C_SUPPORT=y |
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# CONFIG_CMD_FLASH is not set |
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# CONFIG_CMD_FPGA is not set |
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# CONFIG_SPL_DOS_PARTITION is not set |
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# CONFIG_SPL_ISO_PARTITION is not set |
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# CONFIG_SPL_PARTITION_UUIDS is not set |
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CONFIG_SCSI_AHCI=y |
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CONFIG_ETH_DESIGNWARE=y |
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CONFIG_PHY_ADDR=3 |
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CONFIG_PHY_MICREL=y |
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CONFIG_PHY_MICREL_KSZ90X1=y |
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CONFIG_RGMII=y |
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CONFIG_SUN7I_GMAC=y |
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CONFIG_AXP_ALDO3_VOLT=2800 |
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CONFIG_AXP_ALDO4_VOLT=2800 |
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CONFIG_SCSI=y |
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CONFIG_USB_EHCI_HCD=y |
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CONFIG_USB_MUSB_GADGET=y |
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CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y |
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