ARM: UniPhier: remove stop_mpll() from PH1-Pro4 PLL initialization

This function was intended for MN2WS0235 (what we call PH1-Pro4TV).
On that SoC, MPLL is already running on the power-on reset and it
makes sense to stop the PLL at early boot-up.
On the other hand, PH1-Pro4(R) does not have SC_MPLLOSCCTL register,
so this function has no point.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

arch/arm/mach-uniphier/include/mach/sc-regs.h

@@ -11,10 +11,6 @@
 
 #define SC_BASE_ADDR			0x61840000
 
-#define SC_MPLLOSCCTL                   (SC_BASE_ADDR | 0x1184)
-#define SC_MPLLOSCCTL_MPLLEN		(0x1 << 0)
-#define SC_MPLLOSCCTL_MPLLST		(0x1 << 1)
-
 #define SC_DPLLCTRL			(SC_BASE_ADDR | 0x1200)
 #define SC_DPLLCTRL_SSC_EN		(0x1 << 31)
 #define SC_DPLLCTRL_FOUTMODE_MASK        (0xf << 16)

arch/arm/mach-uniphier/ph1-pro4/pll_init.c

@@ -46,22 +46,6 @@ static void dpll_init(void)
 	writel(tmp, SC_DPLLCTRL2);
 }
 
-static void stop_mpll(void)
-{
-	u32 tmp;
-
-	tmp = readl(SC_MPLLOSCCTL);
-
-	if (!(tmp & SC_MPLLOSCCTL_MPLLST))
-		return; /* already stopped */
-
-	tmp &= ~SC_MPLLOSCCTL_MPLLEN;
-	writel(tmp, SC_MPLLOSCCTL);
-
-	while (readl(SC_MPLLOSCCTL) & SC_MPLLOSCCTL_MPLLST)
-		;
-}
-
 static void vpll_init(void)
 {
 	u32 tmp, clk_mode_axosel;
@@ -157,7 +141,6 @@ static void vpll_init(void)
 void pll_init(void)
 {
 	dpll_init();
-	stop_mpll();
 	vpll_init();
 
 	/*