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@ -294,11 +294,13 @@ skip_debug_init: |
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mtspr ivor7,r1 /* Floating point unavailable */ |
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li r1,0x0c00 |
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mtspr ivor8,r1 /* System call */ |
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li r1,0x1000 |
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mtspr ivor10,r1 /* Decrementer (PIT for 440) */ |
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li r1,0x1400 |
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mtspr ivor13,r1 /* Data TLB error */ |
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li r1,0x0a00 |
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mtspr ivor9,r1 /* Auxiliary Processor unavailable */ |
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li r1,0x0900 |
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mtspr ivor10,r1 /* Decrementer */ |
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li r1,0x1300 |
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mtspr ivor13,r1 /* Data TLB error */ |
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li r1,0x1400 |
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mtspr ivor14,r1 /* Instr TLB error */ |
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li r1,0x2000 |
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mtspr ivor15,r1 /* Debug */ |
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@ -503,11 +505,81 @@ version_string: |
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.ascii " (", __DATE__, " - ", __TIME__, ")" |
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.ascii CONFIG_IDENT_STRING, "\0" |
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/* |
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* Maybe this should be moved somewhere else because the current |
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* location (0x100) is where the CriticalInput Execption should be. |
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*/ |
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. = EXC_OFF_SYS_RESET |
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.globl _start_of_vectors
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_start_of_vectors: |
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/* Critical input. */ |
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CRIT_EXCEPTION(0x100, CritcalInput, UnknownException) |
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#ifdef CONFIG_440 |
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/* Machine check */ |
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MCK_EXCEPTION(0x200, MachineCheck, MachineCheckException) |
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#else |
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CRIT_EXCEPTION(0x200, MachineCheck, MachineCheckException) |
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#endif /* CONFIG_440 */ |
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/* Data Storage exception. */ |
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STD_EXCEPTION(0x300, DataStorage, UnknownException) |
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/* Instruction Storage exception. */ |
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STD_EXCEPTION(0x400, InstStorage, UnknownException) |
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/* External Interrupt exception. */ |
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STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt) |
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/* Alignment exception. */ |
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. = 0x600 |
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Alignment: |
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EXCEPTION_PROLOG(SRR0, SRR1) |
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mfspr r4,DAR |
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stw r4,_DAR(r21) |
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mfspr r5,DSISR |
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stw r5,_DSISR(r21) |
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addi r3,r1,STACK_FRAME_OVERHEAD |
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li r20,MSR_KERNEL |
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rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ |
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lwz r6,GOT(transfer_to_handler) |
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mtlr r6 |
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blrl |
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.L_Alignment: |
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.long AlignmentException - _start + _START_OFFSET |
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.long int_return - _start + _START_OFFSET |
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/* Program check exception */ |
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. = 0x700 |
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ProgramCheck: |
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EXCEPTION_PROLOG(SRR0, SRR1) |
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addi r3,r1,STACK_FRAME_OVERHEAD |
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li r20,MSR_KERNEL |
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rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ |
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lwz r6,GOT(transfer_to_handler) |
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mtlr r6 |
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blrl |
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.L_ProgramCheck: |
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.long ProgramCheckException - _start + _START_OFFSET |
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.long int_return - _start + _START_OFFSET |
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#ifdef CONFIG_440 |
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STD_EXCEPTION(0x800, FPUnavailable, UnknownException) |
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STD_EXCEPTION(0x900, Decrementer, DecrementerPITException) |
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STD_EXCEPTION(0xa00, APU, UnknownException) |
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#endif
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STD_EXCEPTION(0xc00, SystemCall, UnknownException) |
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#ifdef CONFIG_440 |
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STD_EXCEPTION(0x1300, DataTLBError, UnknownException) |
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STD_EXCEPTION(0x1400, InstructionTLBError, UnknownException) |
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#else |
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STD_EXCEPTION(0x1000, PIT, DecrementerPITException) |
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STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException) |
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STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException) |
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#endif |
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CRIT_EXCEPTION(0x2000, DebugBreakpoint, DebugException ) |
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.globl _end_of_vectors
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_end_of_vectors: |
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. = _START_OFFSET |
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#endif |
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.globl _start
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_start: |
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@ -1017,107 +1089,6 @@ start_ram: |
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#ifndef CONFIG_NAND_SPL |
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/*****************************************************************************/ |
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.globl _start_of_vectors
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_start_of_vectors: |
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#if 0 |
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/*TODO Fixup _start above so we can do this*/ |
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/* Critical input. */ |
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CRIT_EXCEPTION(0x100, CritcalInput, CritcalInputException) |
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#endif |
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/* Machine check */ |
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CRIT_EXCEPTION(0x200, MachineCheck, MachineCheckException) |
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/* Data Storage exception. */ |
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STD_EXCEPTION(0x300, DataStorage, UnknownException) |
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/* Instruction Storage exception. */ |
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STD_EXCEPTION(0x400, InstStorage, UnknownException) |
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/* External Interrupt exception. */ |
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STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt) |
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/* Alignment exception. */ |
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. = 0x600 |
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Alignment: |
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EXCEPTION_PROLOG |
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mfspr r4,DAR |
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stw r4,_DAR(r21) |
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mfspr r5,DSISR |
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stw r5,_DSISR(r21) |
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addi r3,r1,STACK_FRAME_OVERHEAD |
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li r20,MSR_KERNEL |
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rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ |
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lwz r6,GOT(transfer_to_handler) |
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mtlr r6 |
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blrl |
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.L_Alignment: |
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.long AlignmentException - _start + EXC_OFF_SYS_RESET |
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.long int_return - _start + EXC_OFF_SYS_RESET |
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/* Program check exception */ |
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. = 0x700 |
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ProgramCheck: |
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EXCEPTION_PROLOG |
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addi r3,r1,STACK_FRAME_OVERHEAD |
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li r20,MSR_KERNEL |
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rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */ |
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lwz r6,GOT(transfer_to_handler) |
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mtlr r6 |
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blrl |
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.L_ProgramCheck: |
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.long ProgramCheckException - _start + EXC_OFF_SYS_RESET |
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.long int_return - _start + EXC_OFF_SYS_RESET |
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/* No FPU on MPC8xx. This exception is not supposed to happen. |
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*/ |
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STD_EXCEPTION(0x800, FPUnavailable, UnknownException) |
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/* I guess we could implement decrementer, and may have |
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* to someday for timekeeping. |
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*/ |
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STD_EXCEPTION(0x900, Decrementer, timer_interrupt) |
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STD_EXCEPTION(0xa00, Trap_0a, UnknownException) |
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STD_EXCEPTION(0xb00, Trap_0b, UnknownException) |
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STD_EXCEPTION(0xc00, SystemCall, UnknownException) |
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STD_EXCEPTION(0xd00, SingleStep, UnknownException) |
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STD_EXCEPTION(0xe00, Trap_0e, UnknownException) |
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STD_EXCEPTION(0xf00, Trap_0f, UnknownException) |
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/* On the MPC8xx, this is a software emulation interrupt. It occurs |
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* for all unimplemented and illegal instructions. |
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*/ |
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STD_EXCEPTION(0x1000, PIT, PITException) |
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STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException) |
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STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException) |
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STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException) |
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STD_EXCEPTION(0x1400, DataTLBError, UnknownException) |
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STD_EXCEPTION(0x1500, Reserved5, UnknownException) |
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STD_EXCEPTION(0x1600, Reserved6, UnknownException) |
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STD_EXCEPTION(0x1700, Reserved7, UnknownException) |
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STD_EXCEPTION(0x1800, Reserved8, UnknownException) |
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STD_EXCEPTION(0x1900, Reserved9, UnknownException) |
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STD_EXCEPTION(0x1a00, ReservedA, UnknownException) |
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STD_EXCEPTION(0x1b00, ReservedB, UnknownException) |
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STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException) |
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STD_EXCEPTION(0x1d00, InstructionBreakpoint, UnknownException) |
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STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException) |
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STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException) |
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CRIT_EXCEPTION(0x2000, DebugBreakpoint, DebugException ) |
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.globl _end_of_vectors
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_end_of_vectors: |
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. = 0x2100 |
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/* |
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* This code finishes saving the registers to the exception frame |
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* and jumps to the appropriate handler for the exception. |
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@ -1133,28 +1104,12 @@ transfer_to_handler: |
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SAVE_4GPRS(8, r21) |
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SAVE_8GPRS(12, r21) |
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SAVE_8GPRS(24, r21) |
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#if 0 |
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andi. r23,r23,MSR_PR |
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mfspr r23,SPRG3 /* if from user, fix up tss.regs */ |
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beq 2f |
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addi r24,r1,STACK_FRAME_OVERHEAD |
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stw r24,PT_REGS(r23) |
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2: addi r2,r23,-TSS /* set r2 to current */ |
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tovirt(r2,r2,r23) |
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#endif |
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mflr r23 |
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andi. r24,r23,0x3f00 /* get vector offset */ |
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stw r24,TRAP(r21) |
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li r22,0 |
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stw r22,RESULT(r21) |
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mtspr SPRG2,r22 /* r1 is now kernel sp */ |
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#if 0 |
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addi r24,r2,TASK_STRUCT_SIZE /* check for kernel stack overflow */ |
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cmplw 0,r1,r2 |
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cmplw 1,r1,r24 |
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crand 1,1,4 |
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bgt stack_ovf /* if r2 < r1 < r2+TASK_STRUCT_SIZE */ |
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#endif |
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lwz r24,0(r23) /* virtual address of handler */ |
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lwz r23,4(r23) /* where to go when done */ |
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mtspr SRR0,r24 |
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@ -1215,16 +1170,64 @@ crit_return: |
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REST_GPR(31, r1) |
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lwz r2,_NIP(r1) /* Restore environment */ |
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lwz r0,_MSR(r1) |
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mtspr 990,r2 /* SRR2 */ |
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mtspr 991,r0 /* SRR3 */ |
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mtspr csrr0,r2 |
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mtspr csrr1,r0 |
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lwz r0,GPR0(r1) |
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lwz r2,GPR2(r1) |
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lwz r1,GPR1(r1) |
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SYNC |
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rfci |
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/* Cache functions. |
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*/ |
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#ifdef CONFIG_440 |
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mck_return: |
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mfmsr r28 /* Disable interrupts */ |
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li r4,0 |
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ori r4,r4,MSR_EE |
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andc r28,r28,r4 |
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SYNC /* Some chip revs need this... */ |
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mtmsr r28 |
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SYNC |
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lwz r2,_CTR(r1) |
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lwz r0,_LINK(r1) |
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mtctr r2 |
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mtlr r0 |
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lwz r2,_XER(r1) |
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lwz r0,_CCR(r1) |
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mtspr XER,r2 |
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mtcrf 0xFF,r0 |
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REST_10GPRS(3, r1) |
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REST_10GPRS(13, r1) |
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REST_8GPRS(23, r1) |
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REST_GPR(31, r1) |
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lwz r2,_NIP(r1) /* Restore environment */ |
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lwz r0,_MSR(r1) |
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mtspr mcsrr0,r2 |
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mtspr mcsrr1,r0 |
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lwz r0,GPR0(r1) |
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lwz r2,GPR2(r1) |
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lwz r1,GPR1(r1) |
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SYNC |
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rfmci |
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#endif /* CONFIG_440 */ |
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/* |
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* Cache functions. |
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* |
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* NOTE: currently the 440s run with dcache _disabled_ once relocated to DRAM, |
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* although for some cache-ralated calls stubs have to be provided to satisfy |
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* symbols resolution. |
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* |
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*/ |
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#ifdef CONFIG_440 |
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.globl dcache_disable
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dcache_disable: |
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blr |
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.globl dcache_status
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dcache_status: |
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blr |
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#else |
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flush_dcache: |
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addis r9,r0,0x0002 /* set mask for EE and CE msr bits */ |
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ori r9,r9,0x8000 |
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@ -1303,24 +1306,13 @@ dcache_status: |
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mfdccr r3 |
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srwi r3, r3, 31 /* >>31 => select bit 0 */ |
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blr |
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#endif |
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.globl get_pvr
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get_pvr: |
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mfspr r3, PVR |
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blr |
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#if !defined(CONFIG_440) |
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.globl wr_pit
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wr_pit: |
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mtspr pit, r3 |
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blr |
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#endif |
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.globl wr_tcr
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wr_tcr: |
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mtspr tcr, r3 |
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blr |
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/*------------------------------------------------------------------------------- */ |
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/* Function: out16 */ |
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/* Description: Output 16 bits */ |
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@ -1518,7 +1510,7 @@ relocate_code: |
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* initialization, now running from RAM. |
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*/ |
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addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET |
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addi r0, r10, in_ram - _start + _START_OFFSET |
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mtlr r0 |
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blr /* NEVER RETURNS! */ |
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@ -1588,7 +1580,7 @@ clear_bss: |
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*/ |
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.globl trap_init
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trap_init: |
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lwz r7, GOT(_start) |
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lwz r7, GOT(_start_of_vectors) |
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lwz r8, GOT(_end_of_vectors) |
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li r9, 0x100 /* reset vector always at 0x100 */ |
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@ -1608,35 +1600,48 @@ trap_init: |
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/* |
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* relocate `hdlr' and `int_return' entries |
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*/ |
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li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET |
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li r8, Alignment - _start + EXC_OFF_SYS_RESET |
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li r7, .L_MachineCheck - _start + _START_OFFSET |
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li r8, Alignment - _start + _START_OFFSET |
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2: |
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bl trap_reloc |
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addi r7, r7, 0x100 /* next exception vector */ |
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addi r7, r7, 0x100 /* next exception vector */ |
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cmplw 0, r7, r8 |
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blt 2b |
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li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET |
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li r7, .L_Alignment - _start + _START_OFFSET |
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bl trap_reloc |
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li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET |
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li r7, .L_ProgramCheck - _start + _START_OFFSET |
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bl trap_reloc |
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li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET |
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li r8, SystemCall - _start + EXC_OFF_SYS_RESET |
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3: |
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bl trap_reloc |
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addi r7, r7, 0x100 /* next exception vector */ |
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cmplw 0, r7, r8 |
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blt 3b |
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#ifdef CONFIG_440 |
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li r7, .L_FPUnavailable - _start + _START_OFFSET |
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bl trap_reloc |
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li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET |
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li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET |
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4: |
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bl trap_reloc |
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addi r7, r7, 0x100 /* next exception vector */ |
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cmplw 0, r7, r8 |
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blt 4b |
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li r7, .L_Decrementer - _start + _START_OFFSET |
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bl trap_reloc |
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li r7, .L_APU - _start + _START_OFFSET |
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bl trap_reloc |
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li r7, .L_InstructionTLBError - _start + _START_OFFSET |
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bl trap_reloc |
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li r7, .L_DataTLBError - _start + _START_OFFSET |
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bl trap_reloc |
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#else /* CONFIG_440 */ |
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li r7, .L_PIT - _start + _START_OFFSET |
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bl trap_reloc |
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li r7, .L_InstructionTLBMiss - _start + _START_OFFSET |
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bl trap_reloc |
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li r7, .L_DataTLBMiss - _start + _START_OFFSET |
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bl trap_reloc |
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#endif /* CONFIG_440 */ |
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li r7, .L_DebugBreakpoint - _start + _START_OFFSET |
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bl trap_reloc |
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#if !defined(CONFIG_440) |
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addi r7,r0,0x1000 /* set ME bit (Machine Exceptions) */ |
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