@ -12,6 +12,8 @@
*/
# include <common.h>
# include <dm.h>
# include <ns16550.h>
# include <asm/io.h>
# include <asm/omap_musb.h>
# include <asm/arch/am35x_def.h>
@ -34,6 +36,22 @@ DECLARE_GLOBAL_DATA_PTR;
# define AM3517_IP_SW_RESET 0x48002598
# define CPGMACSS_SW_RST (1 << 1)
# define PHY_GPIO 30
/* This is only needed until SPL gets OF support */
# ifdef CONFIG_SPL_BUILD
static const struct ns16550_platdata am3517_serial = {
. base = OMAP34XX_UART3 ,
. reg_shift = 2 ,
. clock = V_NS16550_CLK ,
. fcr = UART_FCR_DEFVAL ,
} ;
U_BOOT_DEVICE ( am3517_uart ) = {
" ns16550_serial " ,
& am3517_serial
} ;
# endif
/*
* Routine : board_init
@ -113,30 +131,35 @@ int misc_init_r(void)
am3517_evm_musb_init ( ) ;
/* activate PHY reset */
gpio_direction_output ( 30 , 0 ) ;
gpio_set_value ( 30 , 0 ) ;
ctr = 0 ;
do {
udelay ( 1000 ) ;
ctr + + ;
} while ( ctr < 300 ) ;
/* deactivate PHY reset */
gpio_set_value ( 30 , 1 ) ;
/* allow the PHY to stabilize and settle down */
ctr = 0 ;
do {
udelay ( 1000 ) ;
ctr + + ;
} while ( ctr < 300 ) ;
/* ensure that the module is out of reset */
reset = readl ( AM3517_IP_SW_RESET ) ;
reset & = ( ~ CPGMACSS_SW_RST ) ;
writel ( reset , AM3517_IP_SW_RESET ) ;
if ( gpio_request ( PHY_GPIO , " gpio_30 " ) = = 0 ) {
/* activate PHY reset */
gpio_direction_output ( PHY_GPIO , 0 ) ;
gpio_set_value ( PHY_GPIO , 0 ) ;
ctr = 0 ;
do {
udelay ( 1000 ) ;
ctr + + ;
} while ( ctr < 300 ) ;
/* deactivate PHY reset */
gpio_set_value ( PHY_GPIO , 1 ) ;
/* allow the PHY to stabilize and settle down */
ctr = 0 ;
do {
udelay ( 1000 ) ;
ctr + + ;
} while ( ctr < 300 ) ;
/* ensure that the module is out of reset */
reset = readl ( AM3517_IP_SW_RESET ) ;
reset & = ( ~ CPGMACSS_SW_RST ) ;
writel ( reset , AM3517_IP_SW_RESET ) ;
/* Free requested GPIO */
gpio_free ( PHY_GPIO ) ;
}
return 0 ;
}
Adam Ford
7 years ago
committed by
Tom Rini