Several files are out of order. This means that when the moveconfig tool moves CONFIG options to Kconfig it generates a large diff. To avoid this, reorder the files first. Signed-off-by: Simon Glass <sjg@chromium.org>master
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c294ac5c16
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b880fcf021
@ -1,5 +1,5 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_P3041DS=y |
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CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" |
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CONFIG_SPI_FLASH=y |
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@ -1,5 +1,5 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_P5020DS=y |
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CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" |
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CONFIG_SPI_FLASH=y |
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@ -1,5 +1,5 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_P5040DS=y |
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CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" |
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CONFIG_SPI_FLASH=y |
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@ -1,6 +1,6 @@ |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_SPI_FLASH=y |
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@ -1,6 +1,6 @@ |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_SPI_FLASH=y |
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@ -1,5 +1,5 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT" |
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CONFIG_SPI_FLASH=y |
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@ -1,6 +1,6 @@ |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_SPI_FLASH=y |
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@ -1,5 +1,5 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_SPI_FLASH=y |
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@ -1,6 +1,6 @@ |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_SPI_FLASH=y |
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@ -1,6 +1,6 @@ |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_SPI_FLASH=y |
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@ -1,5 +1,5 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT" |
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CONFIG_SPI_FLASH=y |
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@ -1,6 +1,6 @@ |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_SPI_FLASH=y |
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@ -1,5 +1,5 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_PPC=y |
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CONFIG_MPC85xx=y |
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CONFIG_TARGET_T104XRDB=y |
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CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4" |
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CONFIG_SPI_FLASH=y |
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@ -1,10 +1,9 @@ |
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CONFIG_ARM=y |
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CONFIG_TARGET_CGTQMX6EVAL=y |
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/congatec/cgtqmx6eval/imximage.cfg,MX6Q" |
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CONFIG_CMD_NET=y |
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CONFIG_DM=y |
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CONFIG_DM_THERMAL=y |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_FLASH is not set |
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# CONFIG_CMD_SETEXPR is not set |
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CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > " |
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CONFIG_DM=y |
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CONFIG_DM_THERMAL=y |
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@ -1,10 +1,10 @@ |
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CONFIG_ARM=y |
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CONFIG_TARGET_LS1021AQDS=y |
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds" |
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CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_SETEXPR is not set |
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds" |
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CONFIG_OF_CONTROL=y |
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CONFIG_DM=y |
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CONFIG_DM_SPI=y |
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CONFIG_SPI_FLASH=y |
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CONFIG_DM_SPI=y |
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CONFIG_ARM=y |
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CONFIG_TARGET_LS1021ATWR=y |
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr" |
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CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_SETEXPR is not set |
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr" |
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CONFIG_OF_CONTROL=y |
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CONFIG_DM=y |
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CONFIG_DM_SPI=y |
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CONFIG_SPI_FLASH=y |
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CONFIG_DM_SPI=y |
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@ -1,4 +1,4 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6UL" |
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CONFIG_ARM=y |
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CONFIG_TARGET_MX6UL_14X14_EVK=y |
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CONFIG_SPL=y |
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6UL" |
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CONFIG_ARM=y |
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CONFIG_ARCH_SOCFPGA=y |
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CONFIG_TARGET_SOCFPGA_ARRIA5=y |
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CONFIG_SYS_MALLOC_F_LEN=0x2000 |
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" |
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CONFIG_SPL=y |
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CONFIG_SPL_STACK_R=y |
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CONFIG_SPL_STACK_R_ADDR=0x00800000 |
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# CONFIG_CMD_IMLS is not set |
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# CONFIG_CMD_FLASH is not set |
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CONFIG_OF_CONTROL=y |
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CONFIG_SPL_OF_CONTROL=y |
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CONFIG_SPI_FLASH=y |
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CONFIG_SPL_DM=y |
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CONFIG_SPL_MMC_SUPPORT=y |
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CONFIG_DM_SEQ_ALIAS=y |
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CONFIG_SPL_SIMPLE_BUS=y |
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CONFIG_DM_SPI=y |
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CONFIG_DM_SPI_FLASH=y |
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CONFIG_SPL_SPI_SUPPORT=y |
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CONFIG_SPL_STACK_R=y |
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CONFIG_SPL_STACK_R_ADDR=0x00800000 |
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CONFIG_SYS_MALLOC_F_LEN=0x2000 |
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CONFIG_SPI_FLASH=y |
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