Stefan Roese
18 years ago
commit
b8b7870652
@ -0,0 +1,603 @@ |
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/*
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* (C) Copyright 2006 |
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* Markus Klotzbuecher, DENX Software Engineering, mk@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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/*
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* Host Port Interface (HPI) |
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*/ |
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/* debug levels:
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* 0 : errors |
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* 1 : usefull info |
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* 2 : lots of info |
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* 3 : noisy |
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*/ |
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#define DEBUG 0 |
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#include <config.h> |
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#include <common.h> |
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#include <mpc8xx.h> |
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#include "pld.h" |
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#include "hpi.h" |
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#define _NOT_USED_ 0xFFFFFFFF |
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/* original table:
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* - inserted loops to achieve long CS low and high Periods (~217ns) |
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* - move cs high 2/4 to the right |
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*/ |
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const uint dsp_table_slow[] = |
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{ |
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/* single read (offset 0x00 in upm ram) */ |
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0x8fffdc04, 0x0fffdc84, 0x0fffdc84, 0x0fffdc00, |
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0x3fffdc04, 0xffffdc84, 0xffffdc84, 0xffffdc05, |
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/* burst read (offset 0x08 in upm ram) */ |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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/* single write (offset 0x18 in upm ram) */ |
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0x8fffd004, 0x0fffd084, 0x0fffd084, 0x3fffd000, |
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0xffffd084, 0xffffd084, 0xffffd005, _NOT_USED_, |
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/* burst write (offset 0x20 in upm ram) */ |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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/* refresh (offset 0x30 in upm ram) */ |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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/* exception (offset 0x3C in upm ram) */ |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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}; |
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/* dsp hpi upm ram table
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* works fine for noninc access, failes on incremental. |
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* - removed first word |
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*/ |
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const uint dsp_table_fast[] = |
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{ |
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/* single read (offset 0x00 in upm ram) */ |
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0x8fffdc04, 0x0fffdc04, 0x0fffdc00, 0x3fffdc04, |
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0xffffdc05, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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/* burst read (offset 0x08 in upm ram) */ |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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/* single write (offset 0x18 in upm ram) */ |
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0x8fffd004, 0x0fffd004, 0x3fffd000, 0xffffd005, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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/* burst write (offset 0x20 in upm ram) */ |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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/* refresh (offset 0x30 in upm ram) */ |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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/* exception (offset 0x3C in upm ram) */ |
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_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
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}; |
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#ifdef CONFIG_SPC1920_HPI_TEST |
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#undef HPI_TEST_OSZI |
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#define HPI_TEST_CHUNKSIZE 0x1000 |
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#define HPI_TEST_PATTERN 0x00000000 |
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#define HPI_TEST_START 0x0 |
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#define HPI_TEST_END 0x30000 |
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#define TINY_AUTOINC_DATA_SIZE 16 /* 32bit words */ |
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#define TINY_AUTOINC_BASE_ADDR 0x0 |
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static int hpi_activate(void); |
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static void hpi_inactivate(void); |
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static void dsp_reset(void); |
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static int hpi_write_inc(u32 addr, u32 *data, u32 count); |
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static int hpi_read_inc(u32 addr, u32 *buf, u32 count); |
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static int hpi_write_noinc(u32 addr, u32 data); |
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static u32 hpi_read_noinc(u32 addr); |
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int hpi_test(void); |
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static int hpi_write_addr_test(u32 addr); |
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static int hpi_read_write_test(u32 addr, u32 data); |
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static int hpi_tiny_autoinc_test(void); |
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#endif /* CONFIG_SPC1920_HPI_TEST */ |
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/* init the host port interface on UPMA */ |
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int hpi_init(void) |
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{ |
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volatile immap_t *immr = (immap_t *) CFG_IMMR; |
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volatile memctl8xx_t *memctl = &immr->im_memctl; |
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volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE; |
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upmconfig(UPMA, (uint *)dsp_table_slow, sizeof(dsp_table_slow)/sizeof(uint)); |
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udelay(100); |
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memctl->memc_mamr = CFG_MAMR; |
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memctl->memc_or3 = CFG_OR3; |
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memctl->memc_br3 = CFG_BR3; |
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/* reset dsp */ |
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dsp_reset(); |
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/* activate hpi switch*/ |
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pld->dsp_hpi_on = 0x1; |
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udelay(100); |
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return 0; |
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} |
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#ifdef CONFIG_SPC1920_HPI_TEST |
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/* activate the Host Port interface */ |
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static int hpi_activate(void) |
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{ |
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volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE; |
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/* turn on hpi */ |
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pld->dsp_hpi_on = 0x1; |
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udelay(5); |
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/* turn on the power EN_DSP_POWER high*/ |
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/* currently always on TBD */ |
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/* setup hpi control register */ |
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HPI_HPIC_1 = (u16) 0x0008; |
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HPI_HPIC_2 = (u16) 0x0008; |
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udelay(100); |
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return 0; |
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} |
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/* turn off the host port interface */ |
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static void hpi_inactivate(void) |
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{ |
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volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE; |
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/* deactivate hpi */ |
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pld->dsp_hpi_on = 0x0; |
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/* reset the dsp */ |
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/* pld->dsp_reset = 0x0; */ |
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/* turn off the power EN_DSP_POWER# high*/ |
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/* currently always on TBD */ |
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} |
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/* reset the DSP */ |
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static void dsp_reset(void) |
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{ |
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volatile spc1920_pld_t *pld = (spc1920_pld_t *) CFG_SPC1920_PLD_BASE; |
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pld->dsp_reset = 0x1; |
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pld->dsp_hpi_on = 0x0; |
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udelay(300000); |
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pld->dsp_reset = 0x0; |
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pld->dsp_hpi_on = 0x1; |
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} |
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/* write using autoinc (count is number of 32bit words) */ |
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static int hpi_write_inc(u32 addr, u32 *data, u32 count) |
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{ |
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int i; |
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u16 addr1, addr2; |
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addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */ |
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addr2 = (u16) (addr & 0xffff); |
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/* write address */ |
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HPI_HPIA_1 = addr1; |
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HPI_HPIA_2 = addr2; |
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debugX(4, "writing from data=0x%x to 0x%x\n", data, (data+count)); |
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for(i=0; i<count; i++) { |
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HPI_HPID_INC_1 = (u16) ((data[i] >> 16) & 0xffff); |
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HPI_HPID_INC_2 = (u16) (data[i] & 0xffff); |
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debugX(4, "hpi_write_inc: data1=0x%x, data2=0x%x\n", |
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(u16) ((data[i] >> 16) & 0xffff), |
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(u16) (data[i] & 0xffff)); |
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} |
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#if 0 |
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while(data_ptr < (u16*) (data + count)) { |
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HPI_HPID_INC_1 = *(data_ptr++); |
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HPI_HPID_INC_2 = *(data_ptr++); |
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} |
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#endif |
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/* return number of bytes written */ |
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return count; |
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} |
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/*
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* read using autoinc (count is number of 32bit words) |
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*/ |
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static int hpi_read_inc(u32 addr, u32 *buf, u32 count) |
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{ |
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int i; |
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u16 addr1, addr2, data1, data2; |
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addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */ |
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addr2 = (u16) (addr & 0xffff); |
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/* write address */ |
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HPI_HPIA_1 = addr1; |
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HPI_HPIA_2 = addr2; |
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for(i=0; i<count; i++) { |
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data1 = HPI_HPID_INC_1; |
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data2 = HPI_HPID_INC_2; |
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debugX(4, "hpi_read_inc: data1=0x%x, data2=0x%x\n", data1, data2); |
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buf[i] = (((u32) data1) << 16) | (data2 & 0xffff); |
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} |
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#if 0 |
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while(buf_ptr < (u16*) (buf + count)) { |
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*(buf_ptr++) = HPI_HPID_INC_1; |
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*(buf_ptr++) = HPI_HPID_INC_2; |
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} |
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#endif |
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/* return number of bytes read */ |
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return count; |
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} |
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/* write to non- auto inc regs */ |
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static int hpi_write_noinc(u32 addr, u32 data) |
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{ |
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u16 addr1, addr2, data1, data2; |
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addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */ |
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addr2 = (u16) (addr & 0xffff); |
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/* printf("hpi_write_noinc: addr1=0x%x, addr2=0x%x\n", addr1, addr2); */ |
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HPI_HPIA_1 = addr1; |
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HPI_HPIA_2 = addr2; |
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data1 = (u16) ((data >> 16) & 0xffff); |
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data2 = (u16) (data & 0xffff); |
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/* printf("hpi_write_noinc: data1=0x%x, data2=0x%x\n", data1, data2); */ |
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HPI_HPID_NOINC_1 = data1; |
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HPI_HPID_NOINC_2 = data2; |
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return 0; |
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} |
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/* read from non- auto inc regs */ |
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static u32 hpi_read_noinc(u32 addr) |
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{ |
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u16 addr1, addr2, data1, data2; |
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u32 ret; |
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addr1 = (u16) ((addr >> 16) & 0xffff); /* First HW is most significant */ |
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addr2 = (u16) (addr & 0xffff); |
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HPI_HPIA_1 = addr1; |
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HPI_HPIA_2 = addr2; |
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/* printf("hpi_read_noinc: addr1=0x%x, addr2=0x%x\n", addr1, addr2); */ |
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data1 = HPI_HPID_NOINC_1; |
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data2 = HPI_HPID_NOINC_2; |
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/* printf("hpi_read_noinc: data1=0x%x, data2=0x%x\n", data1, data2); */ |
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ret = (((u32) data1) << 16) | (data2 & 0xffff); |
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return ret; |
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} |
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/*
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* Host Port Interface Tests |
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*/ |
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#ifndef HPI_TEST_OSZI |
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/* main test function */ |
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int hpi_test(void) |
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{ |
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int err = 0; |
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u32 i, ii, pattern, tmp; |
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pattern = HPI_TEST_PATTERN; |
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u32 test_data[HPI_TEST_CHUNKSIZE]; |
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u32 read_data[HPI_TEST_CHUNKSIZE]; |
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debugX(2, "hpi_test: activating hpi..."); |
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hpi_activate(); |
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debugX(2, "OK.\n"); |
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#if 0 |
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/* Dump the first 1024 bytes
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* |
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*/ |
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for(i=0; i<1024; i+=4) { |
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if(i%16==0) |
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printf("\n0x%08x: ", i); |
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printf("0x%08x ", hpi_read_noinc(i)); |
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} |
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#endif |
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/* HPIA read-write test
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* |
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*/ |
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debugX(1, "hpi_test: starting HPIA read-write tests...\n"); |
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err |= hpi_write_addr_test(0xdeadc0de); |
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err |= hpi_write_addr_test(0xbeefd00d); |
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err |= hpi_write_addr_test(0xabcd1234); |
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err |= hpi_write_addr_test(0xaaaaaaaa); |
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if(err) { |
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debugX(1, "hpi_test: HPIA read-write tests: *** FAILED ***\n"); |
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return -1; |
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} |
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debugX(1, "hpi_test: HPIA read-write tests: OK\n"); |
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/* read write test using nonincremental data regs
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* |
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*/ |
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debugX(1, "hpi_test: starting nonincremental tests...\n"); |
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for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) { |
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err |= hpi_read_write_test(i, pattern); |
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/* stolen from cmd_mem.c */ |
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if(pattern & 0x80000000) { |
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pattern = -pattern; /* complement & increment */ |
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} else { |
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pattern = ~pattern; |
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} |
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err |= hpi_read_write_test(i, pattern); |
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if(err) { |
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debugX(1, "hpi_test: nonincremental tests *** FAILED ***\n"); |
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return -1; |
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} |
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} |
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debugX(1, "hpi_test: nonincremental test OK\n"); |
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/* read write a chunk of data using nonincremental data regs
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* |
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*/ |
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debugX(1, "hpi_test: starting nonincremental chunk tests...\n"); |
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pattern = HPI_TEST_PATTERN; |
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for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) { |
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hpi_write_noinc(i, pattern); |
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/* stolen from cmd_mem.c */ |
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if(pattern & 0x80000000) { |
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pattern = -pattern; /* complement & increment */ |
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} else { |
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pattern = ~pattern; |
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} |
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} |
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pattern = HPI_TEST_PATTERN; |
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for(i=HPI_TEST_START; i<HPI_TEST_END; i+=4) { |
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tmp = hpi_read_noinc(i); |
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if(tmp != pattern) { |
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debugX(1, "hpi_test: noninc chunk test *** FAILED *** @ 0x%x, written=0x%x, read=0x%x\n", i, pattern, tmp); |
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err = -1; |
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} |
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/* stolen from cmd_mem.c */ |
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if(pattern & 0x80000000) { |
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pattern = -pattern; /* complement & increment */ |
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} else { |
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pattern = ~pattern; |
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} |
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} |
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if(err) |
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return -1; |
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debugX(1, "hpi_test: nonincremental chunk test OK\n"); |
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#ifdef DO_TINY_TEST |
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/* small verbose test using autoinc and nonautoinc to compare
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* |
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*/ |
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debugX(1, "hpi_test: tiny_autoinc_test...\n"); |
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hpi_tiny_autoinc_test(); |
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debugX(1, "hpi_test: tiny_autoinc_test done\n"); |
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#endif /* DO_TINY_TEST */ |
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/* $%& write a chunk of data using the autoincremental regs
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* |
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*/ |
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debugX(1, "hpi_test: starting autoinc test %d chunks with 0x%x bytes...\n", |
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((HPI_TEST_END - HPI_TEST_START) / HPI_TEST_CHUNKSIZE), |
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HPI_TEST_CHUNKSIZE); |
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for(i=HPI_TEST_START; |
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i < ((HPI_TEST_END - HPI_TEST_START) / HPI_TEST_CHUNKSIZE); |
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i++) { |
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/* generate the pattern data */ |
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debugX(3, "generating pattern data: "); |
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for(ii = 0; ii < HPI_TEST_CHUNKSIZE; ii++) { |
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debugX(3, "0x%x ", pattern); |
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test_data[ii] = pattern; |
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read_data[ii] = 0x0; /* zero to be sure */ |
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/* stolen from cmd_mem.c */ |
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if(pattern & 0x80000000) { |
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pattern = -pattern; /* complement & increment */ |
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} else { |
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pattern = ~pattern; |
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} |
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} |
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debugX(3, "done\n"); |
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debugX(2, "Writing autoinc data @ 0x%x\n", i); |
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hpi_write_inc(i, test_data, HPI_TEST_CHUNKSIZE); |
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debugX(2, "Reading autoinc data @ 0x%x\n", i); |
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hpi_read_inc(i, read_data, HPI_TEST_CHUNKSIZE); |
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/* compare */ |
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for(ii = 0; ii < HPI_TEST_CHUNKSIZE; ii++) { |
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debugX(3, "hpi_test_autoinc: @ 0x%x, written=0x%x, read=0x%x", i+ii, test_data[ii], read_data[ii]); |
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if(read_data[ii] != test_data[ii]) { |
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debugX(0, "hpi_test: autoinc test @ 0x%x, written=0x%x, read=0x%x *** FAILED ***\n", i+ii, test_data[ii], read_data[ii]); |
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return -1; |
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} |
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} |
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} |
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debugX(1, "hpi_test: autoinc test OK\n"); |
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return 0; |
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} |
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#else /* HPI_TEST_OSZI */ |
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int hpi_test(void) |
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{ |
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int i; |
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u32 read_data[TINY_AUTOINC_DATA_SIZE]; |
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|
||||
unsigned int dummy_data[TINY_AUTOINC_DATA_SIZE] = { |
||||
0x11112222, 0x33334444, 0x55556666, 0x77778888, |
||||
0x9999aaaa, 0xbbbbcccc, 0xddddeeee, 0xffff1111, |
||||
0x00010002, 0x00030004, 0x00050006, 0x00070008, |
||||
0x0009000a, 0x000b000c, 0x000d000e, 0x000f0001 |
||||
}; |
||||
|
||||
debugX(0, "hpi_test: activating hpi..."); |
||||
hpi_activate(); |
||||
debugX(0, "OK.\n"); |
||||
|
||||
while(1) { |
||||
led9(1); |
||||
debugX(0, " writing to autoinc...\n"); |
||||
hpi_write_inc(TINY_AUTOINC_BASE_ADDR, |
||||
dummy_data, TINY_AUTOINC_DATA_SIZE); |
||||
|
||||
debugX(0, " reading from autoinc...\n"); |
||||
hpi_read_inc(TINY_AUTOINC_BASE_ADDR, |
||||
read_data, TINY_AUTOINC_DATA_SIZE); |
||||
|
||||
for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++) { |
||||
debugX(0, " written=0x%x, read(inc)=0x%x\n", |
||||
dummy_data[i], read_data[i]); |
||||
} |
||||
led9(0); |
||||
udelay(2000000); |
||||
} |
||||
return 0; |
||||
} |
||||
#endif |
||||
|
||||
/* test if Host Port Address Register can be written correctly */ |
||||
static int hpi_write_addr_test(u32 addr) |
||||
{ |
||||
u32 read_back; |
||||
/* write address */ |
||||
HPI_HPIA_1 = ((u16) (addr >> 16)); /* First HW is most significant */ |
||||
HPI_HPIA_2 = ((u16) addr); |
||||
|
||||
read_back = (((u32) HPI_HPIA_1)<<16) | ((u32) HPI_HPIA_2); |
||||
|
||||
if(read_back == addr) { |
||||
debugX(2, " hpi_write_addr_test OK: written=0x%x, read=0x%x\n", |
||||
addr, read_back); |
||||
return 0; |
||||
} else { |
||||
debugX(0, " hpi_write_addr_test *** FAILED ***: written=0x%x, read=0x%x\n", |
||||
addr, read_back); |
||||
return -1; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
/* test if a simple read/write sequence succeeds */ |
||||
static int hpi_read_write_test(u32 addr, u32 data) |
||||
{ |
||||
u32 read_back; |
||||
|
||||
hpi_write_noinc(addr, data); |
||||
read_back = hpi_read_noinc(addr); |
||||
|
||||
if(read_back == data) { |
||||
debugX(2, " hpi_read_write_test: OK, addr=0x%x written=0x%x, read=0x%x\n", addr, data, read_back); |
||||
return 0; |
||||
} else { |
||||
debugX(0, " hpi_read_write_test: *** FAILED ***, addr=0x%x written=0x%x, read=0x%x\n", addr, data, read_back); |
||||
return -1; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int hpi_tiny_autoinc_test(void) |
||||
{ |
||||
int i; |
||||
u32 read_data[TINY_AUTOINC_DATA_SIZE]; |
||||
u32 read_data_noinc[TINY_AUTOINC_DATA_SIZE]; |
||||
|
||||
unsigned int dummy_data[TINY_AUTOINC_DATA_SIZE] = { |
||||
0x11112222, 0x33334444, 0x55556666, 0x77778888, |
||||
0x9999aaaa, 0xbbbbcccc, 0xddddeeee, 0xffff1111, |
||||
0x00010002, 0x00030004, 0x00050006, 0x00070008, |
||||
0x0009000a, 0x000b000c, 0x000d000e, 0x000f0001 |
||||
}; |
||||
|
||||
printf(" writing to autoinc...\n"); |
||||
hpi_write_inc(TINY_AUTOINC_BASE_ADDR, dummy_data, TINY_AUTOINC_DATA_SIZE); |
||||
|
||||
printf(" reading from autoinc...\n"); |
||||
hpi_read_inc(TINY_AUTOINC_BASE_ADDR, read_data, TINY_AUTOINC_DATA_SIZE); |
||||
|
||||
printf(" reading from noinc for comparison...\n"); |
||||
for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++) |
||||
read_data_noinc[i] = hpi_read_noinc(TINY_AUTOINC_BASE_ADDR+i*4); |
||||
|
||||
for(i=0; i < (TINY_AUTOINC_DATA_SIZE); i++) { |
||||
printf(" written=0x%x, read(inc)=0x%x, read(noinc)=0x%x\n", |
||||
dummy_data[i], read_data[i], read_data_noinc[i]); |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
#endif /* CONFIG_SPC1920_HPI_TEST */ |
||||
@ -0,0 +1,28 @@ |
||||
/*
|
||||
* (C) Copyright 2006 |
||||
* Markus Klotzbuecher, DENX Software Engineering, mk@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
int hpi_init(void); |
||||
|
||||
#ifdef CONFIG_SPC1920_HPI_TEST |
||||
int hpi_test(void); |
||||
#endif |
||||
@ -0,0 +1,193 @@ |
||||
/*
|
||||
* (C) Copyright 2006 |
||||
* Markus Klotzbuecher, mk@denx.de |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) |
||||
* Extremly Accurate DS3231 Real Time Clock (RTC). |
||||
* |
||||
* copied from ds1337.c |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <command.h> |
||||
#include <rtc.h> |
||||
#include <i2c.h> |
||||
|
||||
#if defined(CONFIG_RTC_DS3231) && (CONFIG_COMMANDS & CFG_CMD_DATE) |
||||
|
||||
/*---------------------------------------------------------------------*/ |
||||
#undef DEBUG_RTC |
||||
|
||||
#ifdef DEBUG_RTC |
||||
#define DEBUGR(fmt,args...) printf(fmt ,##args) |
||||
#else |
||||
#define DEBUGR(fmt,args...) |
||||
#endif |
||||
/*---------------------------------------------------------------------*/ |
||||
|
||||
/*
|
||||
* RTC register addresses |
||||
*/ |
||||
#define RTC_SEC_REG_ADDR 0x0 |
||||
#define RTC_MIN_REG_ADDR 0x1 |
||||
#define RTC_HR_REG_ADDR 0x2 |
||||
#define RTC_DAY_REG_ADDR 0x3 |
||||
#define RTC_DATE_REG_ADDR 0x4 |
||||
#define RTC_MON_REG_ADDR 0x5 |
||||
#define RTC_YR_REG_ADDR 0x6 |
||||
#define RTC_CTL_REG_ADDR 0x0e |
||||
#define RTC_STAT_REG_ADDR 0x0f |
||||
|
||||
|
||||
/*
|
||||
* RTC control register bits |
||||
*/ |
||||
#define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */ |
||||
#define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */ |
||||
#define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */ |
||||
#define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */ |
||||
#define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */ |
||||
#define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */ |
||||
|
||||
/*
|
||||
* RTC status register bits |
||||
*/ |
||||
#define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */ |
||||
#define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */ |
||||
#define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */ |
||||
|
||||
|
||||
static uchar rtc_read (uchar reg); |
||||
static void rtc_write (uchar reg, uchar val); |
||||
static uchar bin2bcd (unsigned int n); |
||||
static unsigned bcd2bin (uchar c); |
||||
|
||||
|
||||
/*
|
||||
* Get the current time from the RTC |
||||
*/ |
||||
void rtc_get (struct rtc_time *tmp) |
||||
{ |
||||
uchar sec, min, hour, mday, wday, mon_cent, year, control, status; |
||||
|
||||
control = rtc_read (RTC_CTL_REG_ADDR); |
||||
status = rtc_read (RTC_STAT_REG_ADDR); |
||||
sec = rtc_read (RTC_SEC_REG_ADDR); |
||||
min = rtc_read (RTC_MIN_REG_ADDR); |
||||
hour = rtc_read (RTC_HR_REG_ADDR); |
||||
wday = rtc_read (RTC_DAY_REG_ADDR); |
||||
mday = rtc_read (RTC_DATE_REG_ADDR); |
||||
mon_cent = rtc_read (RTC_MON_REG_ADDR); |
||||
year = rtc_read (RTC_YR_REG_ADDR); |
||||
|
||||
DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " |
||||
"hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", |
||||
year, mon_cent, mday, wday, hour, min, sec, control, status); |
||||
|
||||
if (status & RTC_STAT_BIT_OSF) { |
||||
printf ("### Warning: RTC oscillator has stopped\n"); |
||||
/* clear the OSF flag */ |
||||
rtc_write (RTC_STAT_REG_ADDR, |
||||
rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF); |
||||
} |
||||
|
||||
tmp->tm_sec = bcd2bin (sec & 0x7F); |
||||
tmp->tm_min = bcd2bin (min & 0x7F); |
||||
tmp->tm_hour = bcd2bin (hour & 0x3F); |
||||
tmp->tm_mday = bcd2bin (mday & 0x3F); |
||||
tmp->tm_mon = bcd2bin (mon_cent & 0x1F); |
||||
tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900); |
||||
tmp->tm_wday = bcd2bin ((wday - 1) & 0x07); |
||||
tmp->tm_yday = 0; |
||||
tmp->tm_isdst= 0; |
||||
|
||||
DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
||||
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
||||
tmp->tm_hour, tmp->tm_min, tmp->tm_sec); |
||||
} |
||||
|
||||
|
||||
/*
|
||||
* Set the RTC |
||||
*/ |
||||
void rtc_set (struct rtc_time *tmp) |
||||
{ |
||||
uchar century; |
||||
|
||||
DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
||||
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
||||
tmp->tm_hour, tmp->tm_min, tmp->tm_sec); |
||||
|
||||
rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); |
||||
|
||||
century = (tmp->tm_year >= 2000) ? 0x80 : 0; |
||||
rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century); |
||||
|
||||
rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1)); |
||||
rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday)); |
||||
rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); |
||||
rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); |
||||
rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); |
||||
} |
||||
|
||||
|
||||
/*
|
||||
* Reset the RTC. We also enable the oscillator output on the |
||||
* SQW/INTB* pin and program it for 32,768 Hz output. Note that |
||||
* according to the datasheet, turning on the square wave output |
||||
* increases the current drain on the backup battery from about |
||||
* 600 nA to 2uA. |
||||
*/ |
||||
void rtc_reset (void) |
||||
{ |
||||
rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2); |
||||
} |
||||
|
||||
|
||||
/*
|
||||
* Helper functions |
||||
*/ |
||||
|
||||
static |
||||
uchar rtc_read (uchar reg) |
||||
{ |
||||
return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); |
||||
} |
||||
|
||||
|
||||
static void rtc_write (uchar reg, uchar val) |
||||
{ |
||||
i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); |
||||
} |
||||
|
||||
static unsigned bcd2bin (uchar n) |
||||
{ |
||||
return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F)); |
||||
} |
||||
|
||||
static unsigned char bin2bcd (unsigned int n) |
||||
{ |
||||
return (((n / 10) << 4) | (n % 10)); |
||||
} |
||||
|
||||
#endif /* (CONFIG_RTC_DS3231) && (CONFIG_COMMANDS & CFG_CMD_DATE) */ |
||||
Loading…
Reference in new issue