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@ -35,12 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; |
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#endif |
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#endif |
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#ifndef CONFIG_DM_USB |
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enum { |
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USB_PORTS_MAX = 3, /* Maximum ports we allow */ |
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}; |
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#endif |
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/* Parameters we need for USB */ |
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enum { |
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PARAM_DIVN, /* PLL FEEDBACK DIVIDer */ |
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@ -82,9 +76,6 @@ struct fdt_usb { |
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unsigned ulpi:1; /* 1 if port has external ULPI transceiver */ |
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unsigned enabled:1; /* 1 to enable, 0 to disable */ |
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unsigned has_legacy_mode:1; /* 1 if this port has legacy mode */ |
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#ifndef CONFIG_DM_USB |
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unsigned initialized:1; /* has this port already been initialized? */ |
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#endif |
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enum usb_ctlr_type type; |
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enum usb_init_type init_type; |
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enum dr_mode dr_mode; /* dual role mode */ |
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@ -93,11 +84,6 @@ struct fdt_usb { |
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struct gpio_desc phy_reset_gpio; /* GPIO to reset ULPI phy */ |
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}; |
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#ifndef CONFIG_DM_USB |
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static struct fdt_usb port[USB_PORTS_MAX]; /* List of valid USB ports */ |
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static unsigned port_count; /* Number of available ports */ |
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#endif |
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/*
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* This table has USB timing parameters for each Oscillator frequency we |
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* support. There are four sets of values: |
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@ -173,8 +159,6 @@ static const u8 utmip_elastic_limit = 16; |
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static const u8 utmip_hs_sync_start_delay = 9; |
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struct fdt_usb_controller { |
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/* TODO(sjg@chromium.org): Remove when we only use driver model */ |
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int compat; |
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/* flag to determine whether controller supports hostpc register */ |
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u32 has_hostpc:1; |
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const unsigned *pll_parameter; |
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@ -182,17 +166,14 @@ struct fdt_usb_controller { |
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static struct fdt_usb_controller fdt_usb_controllers[USB_CTRL_COUNT] = { |
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{ |
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.compat = COMPAT_NVIDIA_TEGRA20_USB, |
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.has_hostpc = 0, |
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.pll_parameter = (const unsigned *)T20_usb_pll, |
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}, |
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{ |
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.compat = COMPAT_NVIDIA_TEGRA30_USB, |
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.has_hostpc = 1, |
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.pll_parameter = (const unsigned *)T30_usb_pll, |
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}, |
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{ |
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.compat = COMPAT_NVIDIA_TEGRA114_USB, |
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.has_hostpc = 1, |
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.pll_parameter = (const unsigned *)T114_usb_pll, |
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}, |
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@ -754,12 +735,6 @@ int usb_common_init(struct fdt_usb *config, enum usb_init_type init) |
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return -1; |
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} |
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#ifndef CONFIG_DM_USB |
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/* skip init, if the port is already initialized */ |
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if (config->initialized && config->init_type == init) |
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return 0; |
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#endif |
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debug("%d, %d\n", config->utmi, config->ulpi); |
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if (config->utmi) |
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ret = init_utmi_usb_controller(config, init); |
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@ -796,130 +771,6 @@ static const struct ehci_ops tegra_ehci_ops = { |
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.powerup_fixup = tegra_ehci_powerup_fixup, |
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}; |
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#ifndef CONFIG_DM_USB |
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/*
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* process_usb_nodes() - Process a list of USB nodes, adding them to our list |
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* of USB ports. |
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* @blob: fdt blob |
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* @node_list: list of nodes to process (any <=0 are ignored) |
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* @count: number of nodes to process |
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* @id: controller type (enum usb_ctlr_type) |
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* |
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* Return: 0 - ok, -1 - error |
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*/ |
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static int process_usb_nodes(const void *blob, int node_list[], int count, |
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enum usb_ctlr_type id) |
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{ |
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struct fdt_usb config; |
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int node, i; |
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int clk_done = 0; |
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port_count = 0; |
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for (i = 0; i < count; i++) { |
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if (port_count == USB_PORTS_MAX) { |
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printf("tegrausb: Cannot register more than %d ports\n", |
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USB_PORTS_MAX); |
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return -1; |
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} |
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debug("USB %d: ", i); |
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node = node_list[i]; |
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if (!node) |
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continue; |
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if (fdt_decode_usb(blob, node, &config)) { |
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debug("Cannot decode USB node %s\n", |
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fdt_get_name(blob, node, NULL)); |
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return -1; |
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} |
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if (!clk_done) { |
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config_clock(get_pll_timing( |
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&fdt_usb_controllers[id])); |
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clk_done = 1; |
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} |
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config.type = id; |
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config.initialized = 0; |
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/* add new USB port to the list of available ports */ |
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port[port_count++] = config; |
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} |
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return 0; |
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} |
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int usb_process_devicetree(const void *blob) |
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{ |
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int node_list[USB_PORTS_MAX]; |
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int count, err = 0; |
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int i; |
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for (i = 0; i < ARRAY_SIZE(fdt_usb_controllers); i++) { |
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count = fdtdec_find_aliases_for_id(blob, "usb", |
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fdt_usb_controllers[i].compat, node_list, |
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USB_PORTS_MAX); |
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if (count) { |
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err = process_usb_nodes(blob, node_list, count, i); |
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if (err) |
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printf("%s: Error processing USB node!\n", |
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__func__); |
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return err; |
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} |
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} |
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return err; |
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} |
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/**
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* Start up the given port number (ports are numbered from 0 on each board). |
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* This returns values for the appropriate hccr and hcor addresses to use for |
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* USB EHCI operations. |
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* |
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* @param index port number to start |
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* @param hccr returns start address of EHCI HCCR registers |
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* @param hcor returns start address of EHCI HCOR registers |
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* @return 0 if ok, -1 on error (generally invalid port number) |
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*/ |
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int ehci_hcd_init(int index, enum usb_init_type init, |
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struct ehci_hccr **hccr, struct ehci_hcor **hcor) |
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{ |
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struct fdt_usb *config; |
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struct usb_ctlr *usbctlr; |
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int ret; |
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if (index >= port_count) |
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return -1; |
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config = &port[index]; |
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ehci_set_controller_priv(index, config, &tegra_ehci_ops); |
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ret = usb_common_init(config, init); |
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if (ret) { |
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printf("tegrausb: Cannot init port %d\n", index); |
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return ret; |
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} |
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config->initialized = 1; |
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usbctlr = config->reg; |
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*hccr = (struct ehci_hccr *)&usbctlr->cap_length; |
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*hcor = (struct ehci_hcor *)&usbctlr->usb_cmd; |
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return 0; |
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} |
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/*
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* Bring down the specified USB controller |
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*/ |
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int ehci_hcd_stop(int index) |
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{ |
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usb_common_uninit(&port[index]); |
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port[index].initialized = 0; |
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return 0; |
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} |
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#endif /* !CONFIG_DM_USB */ |
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#ifdef CONFIG_DM_USB |
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static int ehci_usb_ofdata_to_platdata(struct udevice *dev) |
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{ |
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struct fdt_usb *priv = dev_get_priv(dev); |
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@ -987,4 +838,3 @@ U_BOOT_DRIVER(usb_ehci) = { |
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.priv_auto_alloc_size = sizeof(struct fdt_usb), |
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.flags = DM_FLAG_ALLOC_PRIV_DMA, |
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}; |
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#endif |
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Tom Rini
10 years ago